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150 条记录 (耗时 0.036 秒)

    Transistor and method of manufacturing the same
    7.
    发明申请
    Transistor and method of manufacturing the same 有权
    晶体管及其制造方法

    公开(公告)号：US20090224238A1

    公开(公告)日：2009-09-10

    申请号：US12289252

    申请日：2008-10-23

    申请人： Sun-il Kim ,  Young-soo Park ,  I-hun Song ,  Chang-jung Kim ,  Jae-chul Park ,  Sang-wook Kim

    发明人： Sun-il Kim ,  Young-soo Park ,  I-hun Song ,  Chang-jung Kim ,  Jae-chul Park ,  Sang-wook Kim

    IPC分类号： H01L29/786 ,  H01L21/336

    CPC分类号： H01L29/7869

    摘要： A transistor according to example embodiments may include a channel layer, a source and a drain respectively contacting ends of the channel layer, a gate electrode separated from the channel layer, a gate insulating layer interposed between the channel layer and the gate electrode, and/or an insertion layer that is formed between the channel layer and the gate insulating layer. The insertion layer may have a work function different from that of the channel layer.

    摘要翻译： 根据示例实施例的晶体管可以包括沟道层，分别接触沟道层的端部的源极和漏极，与沟道层分离的栅电极，介于沟道层和栅电极之间的栅极绝缘层和/ 或形成在沟道层和栅极绝缘层之间的插入层。 插入层可以具有与沟道层不同的功函数。

    Thin film transistor, method of manufacturing the same, and flat panel display having the same
    9.
    发明授权
    Thin film transistor, method of manufacturing the same, and flat panel display having the same 有权
    薄膜晶体管，其制造方法和具有该薄膜晶体管的平板显示器

    公开(公告)号：US08188472B2

    公开(公告)日：2012-05-29

    申请号：US12007085

    申请日：2008-01-07

    申请人： Jae-chul Park ,  Chang-jung Kim ,  Sun-il Kim ,  I-hun Song ,  Young-soo Park

    发明人： Jae-chul Park ,  Chang-jung Kim ,  Sun-il Kim ,  I-hun Song ,  Young-soo Park

    IPC分类号： H01L21/786

    CPC分类号： H01L29/78618 ,  H01L29/78621 ,  H01L29/7869

    摘要： A thin film transistor (TFT), a method of manufacturing the TFT, and a flat panel display comprising the TFT are provided. The TFT includes a gate, a gate insulating layer that contacts the gate, a channel layer that contacts the gate insulating layer and faces the gate with the gate insulating layer therebetween, a source that contacts an end of the channel layer; and a drain that contacts an other end of the channel layer, wherein the channel layer is an amorphous oxide semiconductor layer, and each of the source and the drain is a conductive oxide layer comprising an oxide semiconductor layer having a conductive impurity in the oxide semiconductor layer. A low resistance metal layer can further be included on the source and drain. A driving circuit of a unit pixel of a flat panel display includes the TFT.

    摘要翻译： 提供薄膜晶体管（TFT），制造TFT的方法以及包括TFT的平板显示器。 TFT包括栅极，与栅极接触的栅极绝缘层，与栅极绝缘层接触且与栅极绝缘层面对栅极的沟道层，接触沟道层的端部的源极; 以及与沟道层的另一端接触的漏极，其中，所述沟道层为非晶氧化物半导体层，所述源极和漏极中的每一个为包含氧化物半导体中具有导电杂质的氧化物半导体层的导电氧化物层 层。 源极和漏极可以进一步包含低电阻金属层。 平板显示器的单位像素的驱动电路包括TFT。

    Stacked memory device and method thereof
    10.
    发明申请
    Stacked memory device and method thereof 有权
    堆叠式存储器件及其方法

    公开(公告)号：US20100091541A1

    公开(公告)日：2010-04-15

    申请号：US12588275

    申请日：2009-10-09

    申请人： Jae-chul Park ,  Kee-won Kwon ,  I-hun Song ,  Young-soo Park ,  Chang-jung Kim ,  Sang-wook Kim ,  Sun-il Kim

    发明人： Jae-chul Park ,  Kee-won Kwon ,  I-hun Song ,  Young-soo Park ,  Chang-jung Kim ,  Sang-wook Kim ,  Sun-il Kim

    IPC分类号： G11C5/02 ,  G11C8/10 ,  G11C11/00 ,  G11C7/00

    CPC分类号： G11C5/02 ,  G11C5/143 ,  G11C7/18 ,  G11C8/12 ,  G11C13/0023 ,  G11C2213/71

    摘要： A stacked memory device includes a plurality of memory layers, where at least one of the plurality of memory layers is stacked on another of the plurality of memory layers and each of the memory layers includes an array of memory cells, a first active circuit unit configured to classify and process address information for at least one of the memory cells as vertical address information and horizontal address information, and at least one second active circuit unit configured to generate a memory selection signal for at least one of the memory cells based on signals processed by the first active circuit unit.

    摘要翻译： 堆叠存储器件包括多个存储器层，其中多个存储器层中的至少一个堆叠在多个存储器层中的另一个上，并且每个存储器层包括存储器单元阵列，第一有源电路单元配置 将至少一个存储器单元的地址信息分类并处理为垂直地址信息和水平地址信息，以及至少一个第二有源电路单元，配置为基于处理的信号为存储器单元中的至少一个生成存储器选择信号 由第一有源电路单元。