公开(公告)号：US5891567A

公开(公告)日：1999-04-06

申请号：US894706

申请日：1997-08-29

申请人： Sung-Joong Kim ,  Gi-Woong Kim ,  Sang-Min Lee ,  Duk-Yong Choi

发明人： Sung-Joong Kim ,  Gi-Woong Kim ,  Sang-Min Lee ,  Duk-Yong Choi

IPC分类号： B60C9/00 ,  D01F6/62 ,  D02G3/02 ,  D02G3/48 ,  D02J1/22 ,  D02G3/00

CPC分类号： B60C9/0042 ,  D01F6/62 ,  Y10T428/2913 ,  Y10T428/2969

摘要： A polyester filamentary yarn having a novel internal microstructure, a polyester tire cord produced from the yarn and a process for production thereof are provided. The polyester yarn of the present invention comprising at least 90 mol % polyethylene terephthalate and having a fineness of 3 to 5 denier per filament, wherein said yarn satisfies the following i).about.iii) characteristics, after it has been treated for 3 minutes at temperature of 240.degree.0 C., tension of 0.1 g/d, said yarn satisfies the following iv).about.vii) variations of mircrostructural physical properties: i) a density of 1.38.about.1.39 g/cm.sup.3, ii) a birefringence index in amorphous portions of 0.06.about.0.09, iii) tan .delta. peak temperature of 140 .degree. C. and below, iv) the increment of a percent crystallinity (.DELTA.X.sub.c) of 10.about.20 wt. %, v) the decrement of an amorphous orientation coefficient (.DELTA.F.sub.a) of at least 0.05, vi) the increment of a long period value (.DELTA.LP) of at least 10.ANG., and vii) the decrement to tan .delta. peak temperature (.DELTA. tan .delta..sub.peak) of at least 5 .degree. C. The filamentary yam is dipped in a rubber solution to produce a tire cord which exhibits excellent dimensional stability and fatigue resistance when it has been incorporated in a rubber matrix of a tire.

摘要翻译： PCT No.PCT / KR96 / 00248 Sec。 371日期1997年8月29日 102（e）日期1997年8月29日PCT 1996年12月26日PCT公布。 出版物WO97 / 24478 日本1997年7月10日提供了具有新颖的内部微观结构的聚酯长丝纱线，由该纱线生产的聚酯轮胎帘线及其制造方法。 本发明的聚酯纱线包含至少90mol％的聚对苯二甲酸乙二醇酯，细度为3至5旦尼尔/丝，其中所述纱线在温度下处理3分钟后满足以下i）差异iii）特性 240°C，张力为0.1g / d，所述纱线满足以下iv）差异vii）微结构物理性能的变化：i）密度1.38差异1.39g / cm 3，ii）非晶部分的双折射指数 的0.06差异为0.09，iii）tanδ峰值温度为140℃及以下，iv）增加10％DIFFERENCE 20wt。％的结晶度（DELTA Xc） ％，v）非晶取向系数（DELTA Fa）的减少至少为0.05，vi）长周期值（DELTA LP）的增量至少为10安培，以及vii）减少至tanδ峰值温度（ DELTA棕褐色三角洲峰）。将丝状纱线浸入橡胶溶液中以产生轮胎帘线，当轮胎帘线已经被结合到轮胎的橡胶基质中时，其显示出优异的尺寸稳定性和耐疲劳性。

公开(公告)号：US06767756B2

公开(公告)日：2004-07-27

申请号：US10453100

申请日：2003-06-03

申请人： Joo-Hoon Lee ,  Duk-Yong Choi

发明人： Joo-Hoon Lee ,  Duk-Yong Choi

IPC分类号： H01L2100

CPC分类号： G02B6/1228 ,  G02B6/136

摘要： Disclosed is a method for manufacturing a tapered optical waveguide through which waveguides of different sizes are connected with each other optically. In the method, a photo-resist pattern having an inclined profile is formed on the core layer by means of a gray-scale mask, then the profile of the tapered waveguide can be precisely controlled by controlling the profile of the photo-resist pattern and the etching-selection ratio between the photo-resist and the core layer.

摘要翻译： 公开了一种用于制造锥形光波导的方法，通过该锥形光波导将不同尺寸的波导彼此光学连接。 在该方法中，通过灰度掩模在芯层上形成具有倾斜轮廓的光致抗蚀剂图案，然后可以通过控制光刻胶图案的轮廓来精确地控制锥形波导的轮廓， 光刻胶与芯层之间的蚀刻选择比。

公开(公告)号：US06859602B2

公开(公告)日：2005-02-22

申请号：US10600686

申请日：2003-06-20

申请人： Joo-Hoon Lee ,  Duk-Yong Choi

发明人： Joo-Hoon Lee ,  Duk-Yong Choi

IPC分类号： G02B6/13 ,  G02B6/12 ,  G02B6/122 ,  G02B6/125 ,  G02B6/136 ,  G02B6/30 ,  G02B6/34 ,  G02B6/10 ,  H01L21/00

CPC分类号： G02B6/125 ,  G02B6/1228 ,  G02B6/136 ,  G02B6/305 ,  G02B2006/12173 ,  G02B2006/12195

摘要： Disclosed is a method for fabricating planar light waveguide circuits, wherein the circuit has a structure that includes a substrate comprised of a core and under-clad layers, an optical circuit, and a plurality of arrayed waveguides coupled thereon. More specifically, the method includes the steps of layering a hard layer on the core layer for forming a mask pattern of the planar light waveguide circuit; forming the mask pattern on the hard layer; layering a photoresist layer on a branch of the optical circuit and the arrayed waveguides of the mask pattern; forming a vertical taper structure on the photoresist layer using a gray scale mask; and, etching the core layer using the photoresist layer with the vertical taper structure and the mask pattern.

摘要翻译： 公开了一种用于制造平面光波导电路的方法，其中电路具有包括由芯和下包层的基板，光电路和耦合在其上的多个阵列波导的结构。 更具体地，该方法包括以下步骤：在芯层​​上分层硬层以形成平面光波导电路的掩模图案; 在硬层上形成掩模图案; 在光电路的分支和掩模图案的阵列波导上分层光致抗蚀剂层; 使用灰度掩模在所述光致抗蚀剂层上形成垂直锥形结构; 并且使用具有垂直锥形结构和掩模图案的光致抗蚀剂层蚀刻芯层。

公开(公告)号：US06624080B2

公开(公告)日：2003-09-23

申请号：US09906884

申请日：2001-07-17

申请人： Sun-Tae Jung ,  Duk-Yong Choi ,  Joo-Hoon Lee

发明人： Sun-Tae Jung ,  Duk-Yong Choi ,  Joo-Hoon Lee

IPC分类号： H01L21302

CPC分类号： H01L21/0332 ,  G02B6/136 ,  G02B2006/12061 ,  G02B2006/12173 ,  G02B2006/12176

摘要： There is provided a metal etching mask fabrication method. Chrome is first sputtered on a silica layer and a photoresist, which is thicker than the chrome layer, is deposited on the chrome layer. The photoresist layer is patterned, a first nickel is sputtered on the photoresist pattern layer and onto a first portion of the chrome layer exposed by the patterning. A second nickel layer is formed on the portions of the first nickel layer in contact with the first portion of the chrome layer by electroplating. The photoresist pattern has side walls having acute angles to prevent contact between the first nickel layer on the photoresist and the second nickel layer on the first portion of the chrome layer. The photoresist pattern layer and the first nickel layer formed on the photoresist pattern layer are removed using a solvent, and the chrome layer is removed by dry etching in plasma using a gas.

公开(公告)号：US06841860B2

公开(公告)日：2005-01-11

申请号：US10244196

申请日：2002-09-16

申请人： Joo-Hoon Lee ,  Duk-Yong Choi ,  Dong-Su Kim

发明人： Joo-Hoon Lee ,  Duk-Yong Choi ,  Dong-Su Kim

IPC分类号： G02B6/122 ,  G02B6/42 ,  H01L21/60 ,  H01S5/02 ,  H01L23/02

CPC分类号： G02B6/423 ,  G02B6/4232 ,  H01S5/02

摘要： Disclosed are a flip-chip bonding structure for improving the vertical alignment of an optical device relative to a PLC and a flip-chip bonding method for achieving this structure. The flip-chip bonding structure includes: a semiconductor substrate; a lower-clad layer formed on the upper surface of the semiconductor substrate, wherein the lower-clad layer is depressed on a designated area for mounting an optical device; vertical alignment structures formed on a part of the upper surface of the depressed area of the lower-clad layer and determining a vertical alignment position of the optical device on the semiconductor substrate; electrodes formed on another part of the upper surface of the depressed area of the lower-clad layer; a solder bump formed on the upper surfaces of the electrodes; and, an optical device bonded to the substrate by a flip-chip bonding method using the solder bump.

摘要翻译： 公开了一种用于改善光学器件相对于PLC的垂直取向的倒装芯片接合结构和用于实现该结构的倒装芯片接合方法。 倒装芯片接合结构包括：半导体衬底; 形成在所述半导体衬底的上表面上的下包层，其中所述下包覆层被压在用于安装光学器件的指定区域上; 垂直取向结构形成在下包层的凹陷区域的上表面的一部分上，并确定半导体衬底上的光学器件的垂直取向位置; 形成在下包层的凹陷区域的上表面的另一部分上的电极; 形成在电极的上表面上的焊料凸块; 以及通过使用焊料凸块的倒装芯片接合方法结合到基板的光学器件。

公开(公告)号：US06799713B2

公开(公告)日：2004-10-05

申请号：US10654111

申请日：2003-09-03

申请人： Joo-Hoon Lee ,  Duk-Yong Choi ,  Dong-Su Kim

发明人： Joo-Hoon Lee ,  Duk-Yong Choi ,  Dong-Su Kim

IPC分类号： B23K3102

CPC分类号： G02B6/423 ,  G02B6/4232 ,  H01S5/02

摘要： Disclosed are a flip-chip bonding structure for improving the vertical alignment of an optical device relative to a PLC and a flip-chip bonding method for achieving this structure. The flip-chip bonding structure includes: a semiconductor substrate; a lower-clad layer formed on the upper surface of the semiconductor substrate, wherein the lower-clad layer is depressed on a designated area for mounting an optical device; vertical alignment structures formed on a part of the upper surface of the depressed area of the lower-clad layer and determining a vertical alignment position of the optical device on the semiconductor substrate; electrodes formed on another part of the upper surface of the depressed area of the lower-clad layer; a solder bump formed on the upper surfaces of the electrodes; and, an optical device bonded to the substrate by a flip-chip bonding method using the solder bump.

摘要翻译： 公开了一种用于改善光学器件相对于PLC的垂直取向的倒装芯片接合结构和用于实现该结构的倒装芯片接合方法。 倒装芯片接合结构包括：半导体衬底; 形成在所述半导体衬底的上表面上的下包层，其中所述下包覆层被压在用于安装光学器件的指定区域上; 垂直取向结构形成在下包层的凹陷区域的上表面的一部分上，并确定半导体衬底上的光学器件的垂直取向位置; 形成在下包层的凹陷区域的上表面的另一部分上的电极; 形成在电极的上表面上的焊料凸块; 以及通过使用焊料凸块的倒装芯片接合方法结合到基板的光学器件。