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公开(公告)号:US20220244638A1
公开(公告)日:2022-08-04
申请号:US17512959
申请日:2021-10-28
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Hidetoshi Inoue , Kenji Kawano , Yuki Sato , Takafumi Ando , Michael Lueders , Stefan Herzer , Jeffrey Morroni
IPC: G03F7/00 , H01L21/027
Abstract: A permanent resist, such as TMMF, is used when patterning conductive material on a substrate, enabling lines that have a higher line-to-space ratio (L/S) or a higher aspect ratio (T/L) or both. Pattern density can thus be increased, allowing for improved performance (e.g., greater efficiency, in the case of transformer coil patterning) and greater heat dissipation. As examples, the permanent-resist-based patterning fabrication methods can be used to create transformer coils within an integrated circuit (IC) module, or a routable lead frame for one or more IC dies.
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公开(公告)号:US20240006392A1
公开(公告)日:2024-01-04
申请号:US17852925
申请日:2022-06-29
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Anton Winkler , Christopher Manack , Jeffrey Morroni , Hidetoshi Inoue , Yuki Sato , Kenji Otake
CPC classification number: H01L25/165 , H01L24/16 , H01L24/32 , H01L24/73 , H01L23/3128 , H01L23/295 , H01L28/10 , H01L28/40 , H01L24/29 , H01L24/81 , H01L24/94 , H01L21/54 , H01F27/292 , H01F27/327 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2224/2919 , H01L2224/29186 , H01L2224/81447 , H01F41/005
Abstract: In one example, an integrated circuit comprises: a substrate; a semiconductor die; metal interconnects coupled between the semiconductor die and the substrate; an insulation layer coupled between the semiconductor die and the substrate, the insulation layer surrounding the metal interconnects; an inductor coupled to the substrate; and a magnetic material encapsulating the semiconductor die, the inductor, the metal interconnects and the insulation layer, the magnetic material having a different material from the insulation layer.
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公开(公告)号:US20240006259A1
公开(公告)日:2024-01-04
申请号:US17852979
申请日:2022-06-29
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Hidetoshi Inoue , Kenji Otake , Yuki Sato , Takafumi Ando , Jeffrey Morroni , Anton Winkler , Yi Yan
CPC classification number: H01L23/295 , H01L24/16 , H01L23/3128 , H01L25/165 , H01L28/10 , H01L2224/81447 , H01L24/81 , H01L21/561 , H01F27/327 , H01F41/005 , H01L2224/16227 , H01L28/40
Abstract: In one example, an integrated circuit comprises: a substrate; a semiconductor die; metal interconnects, the semiconductor die being mounted to the substrate via the metal interconnects; an inductor mounted to the substrate; and a magnetic material encapsulating the semiconductor die, the inductor, and the metal interconnects, the magnetic material including: coated metal particles, which are coated with a first insulation material; and a second insulation material, in which the coated metal particles are suspended.
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公开(公告)号:US20250081476A1
公开(公告)日:2025-03-06
申请号:US18459230
申请日:2023-08-31
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Hidetoshi Inoue , Kenji Otake , Sombuddha Chakraborty , Taisuke Kazama
IPC: H10N35/00 , H01L23/00 , H01L23/495 , H01L25/065
Abstract: A packaged integrated circuit (IC) includes a package substrate, an electronic device on the package substrate, and metal interconnects coupled between the electronic device and the package substrate. The packaged IC also includes an insulation material on the package substrate and encapsulating the electronic device. The insulation material surrounds the metal interconnects. An inductor is over the electronic device and is coupled to the package substrate. A magnetic material is on the insulation material and encapsulates the inductor. The magnetic material is different from the insulation material.
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公开(公告)号:US20250006575A1
公开(公告)日:2025-01-02
申请号:US18217504
申请日:2023-06-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Daiki Komatsu , Hidetoshi Inoue
Abstract: A semiconductor package includes a substrate, a semiconductor die, metal interconnects, the semiconductor die being mounted to the substrate via the metal interconnects, an inductor mounted to the substrate, a magnetic material encapsulating the semiconductor die, the inductor, and the metal interconnects, the magnetic material including metal particles suspended in a first insulation material, and a second insulation material covering the magnetic material, wherein the second insulation material is substantially free of metal particles.
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