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公开(公告)号:US20240319234A1
公开(公告)日:2024-09-26
申请号:US18737108
申请日:2024-06-07
Applicant: Texas Instruments Incorporated
Inventor: Dok Won Lee , Jo Bito , Keith Ryan Green
CPC classification number: G01R15/207 , G01R15/202 , H01L23/49586 , H10N52/00 , H10N52/80 , H10B61/00 , H10N59/00
Abstract: In one example, a device comprises a lead frame, a semiconductor die, a spacer, and a magnetic concentrator. The lead frame comprises a conductor. The spacer is between the semiconductor die and the conductor. The magnetic concentrator overlaps at least partially with the conductor.
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公开(公告)号:US11422167B2
公开(公告)日:2022-08-23
申请号:US16932299
申请日:2020-07-17
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Dok Won Lee , Jo Bito , Keith Ryan Green
IPC: G01R15/20 , H01L43/06 , H01L23/495 , H01L43/04 , H01L27/22
Abstract: A packaged current sensor includes a lead frame, an integrated circuit, an isolation spacer, a first magnetic concentrator, and a second magnetic concentrator. The lead frame includes a conductor. The isolation spacer is between the lead frame and the integrated circuit. The first magnetic concentrator is aligned with the conductor. The second magnetic concentrator is aligned with the conductor.
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公开(公告)号:US09791521B2
公开(公告)日:2017-10-17
申请号:US14670078
申请日:2015-03-26
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Michael Edwin Butenhoff , Keith Ryan Green , Anuj Jain
CPC classification number: G01R33/0023 , G01R33/072
Abstract: A method for verifying an operation of a Hall-effect sensor without an applied magnetic field. The method can include providing a bias signal to a first pair of terminals of a Hall-effect element, applying a Hall current signal to a second pair of terminals of the Hall-effect element, measuring a Hall output voltage across the second pair of terminals and comparing the measured Hall output voltage to an expected Hall output voltage that would be provided by a corresponding applied magnetic field.
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公开(公告)号:US11899082B2
公开(公告)日:2024-02-13
申请号:US17015327
申请日:2020-09-09
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Keith Ryan Green , Tony Ray Larson
CPC classification number: G01R33/072 , H10N52/101 , H10N52/80 , H10N52/01
Abstract: An integrated circuit includes a doped region having a first conductivity type formed in a semiconductor substrate having a second conductivity type. A dielectric layer is located between the doped region and a surface plane of the semiconductor substrate, and a polysilicon layer is located over the dielectric layer. First, second, third and fourth terminals are connected to the doped region, the first and third terminals defining a conductive path through the doped region and the second and fourth terminals defining a second conductive path through the doped region, the second path intersecting the first path.
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公开(公告)号:US20230129179A1
公开(公告)日:2023-04-27
申请号:US17508706
申请日:2021-10-22
Applicant: Texas Instruments Incorporated
Inventor: Keith Ryan Green , Erika Lynn Mazotti , William David French , Ricky Alan Jackson
Abstract: A microelectronic device has a Hall sensor that includes a Hall plate in a semiconductor material. The Hall sensor includes contact regions in the semiconductor material, contacting the Hall plate. The Hall sensor includes an isolation structure with a dielectric material contacting the semiconductor material, on at least two opposite sides of each of the contact regions. The isolation structure is laterally separated from the contact regions by gaps. The Hall sensor further includes a conductive spacer over the gaps, the conductive spacer being separated from the semiconductor material by an insulating layer.
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公开(公告)号:US10663355B2
公开(公告)日:2020-05-26
申请号:US15639492
申请日:2017-06-30
Applicant: Texas Instruments Incorporated
Inventor: Keith Ryan Green , Byron Jon Roderick Shulver
Abstract: A device having a first terminal region and a second terminal region. The first terminal region includes fine-tune (FT) metal stripes that are separated from each other by a first distance along the longitudinal direction. The second terminal region is spaced apart from the first terminal region by at least an inter-terminal distance. The second terminal region includes coarse-tune (CT) metal stripes that are separated from each other by a second distance along the longitudinal direction. The second distance is greater than the first distance, and the inter-terminal distance greater than the second distance. Each of the FT metal stripes may be selected as a first access location, and each of the CT metal stripes may be selected as a second access location. A pair of selected first and second access locations access a sheet resistance defined by a distance therebetween.
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公开(公告)号:US10211255B2
公开(公告)日:2019-02-19
申请号:US15865825
申请日:2018-01-09
Applicant: Texas Instruments Incorporated
Inventor: Dok Won Lee , William David French , Keith Ryan Green
Abstract: Disclosed examples provide wafer-level integration of magnetoresistive sensors and Hall-effect sensors in a single integrated circuit, in which one or more vertical and/or horizontal Hall sensors are formed on or in a substrate along with transistors and other circuitry, and a magnetoresistive sensor circuit is formed in the IC metallization structure.
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公开(公告)号:US20190003900A1
公开(公告)日:2019-01-03
申请号:US15639492
申请日:2017-06-30
Applicant: Texas Instruments Incorporated
Inventor: Keith Ryan Green , Byron Jon Roderick Shulver
CPC classification number: G01K7/25 , G01K7/023 , G01K7/223 , G01K15/005 , G01K2007/163
Abstract: A device having a first terminal region and a second terminal region. The first terminal region includes fine-tune (FT) metal stripes that are separated from each other by a first distance along the longitudinal direction. The second terminal region is spaced apart from the first terminal region by at least an inter-terminal distance. The second terminal region includes coarse-tune (CT) metal stripes that are separated from each other by a second distance along the longitudinal direction. The second distance is greater than the first distance, and the inter-terminal distance greater than the second distance. Each of the FT metal stripes may be selected as a first access location, and each of the CT metal stripes may be selected as a second access location. A pair of selected first and second access locations access a sheet resistance defined by a distance therebetween.
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公开(公告)号:US20180123023A1
公开(公告)日:2018-05-03
申请号:US15335726
申请日:2016-10-27
Applicant: Texas Instruments Incorporated
Inventor: Keith Ryan Green , louri Mirgorodski
CPC classification number: H01L43/06 , H01L22/30 , H01L43/065 , H01L43/14
Abstract: A vertical Hall element and method of fabricating are disclosed. The method includes forming a buried region having a first conductivity type in a substrate having a second conductivity type and implanting a dopant of the first conductivity type into a well region between the top surface of the substrate and the buried region. The buried region has a doping concentration increasing with an increasing depth from a top surface of the substrate and the well region has a doping concentration decreasing from the top surface of the substrate to the buried region. The method includes forming first through fifth contacts on the well region. First and second contacts define a conductive path and second and third contacts define another conductive path through the well region. The fourth contact is formed between first and second contacts and the fifth contact is formed between second and third contacts.
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公开(公告)号:US20220075007A1
公开(公告)日:2022-03-10
申请号:US17015347
申请日:2020-09-09
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Keith Ryan Green , Dimitar Trifonov , Tony Ray Larson
Abstract: A semiconductor device includes first and second Hall-effect sensors. Each sensor has first and third opposite terminals and second and fourth opposite terminals. A control circuit is configured to direct a current through the first and second sensors and to measure a corresponding Hall voltage of the first and second sensors. Directing includes applying a first source voltage in a first direction between the first and third terminals of the first sensor and applying a second source voltage in a second direction between the first and third terminals of the second sensor. A third source voltage is applied in a third direction between the second and fourth terminals of the first sensor, and a fourth source voltage is applied in a fourth direction between the second and fourth terminals of the second sensor. The third direction is rotated clockwise from the first direction and the fourth direction rotated counter-clockwise from the second direction.
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