SLEW-RATE CONTROL FOR POWER STAGES
    1.
    发明公开

    公开(公告)号:US20240113611A1

    公开(公告)日:2024-04-04

    申请号:US17956100

    申请日:2022-09-29

    Abstract: A circuit includes a half-bridge circuit is configured to provide a switching voltage responsive to respective high-side and low-side drive signals. High-side slew control circuitry is configured to provide a high-side slew-compensated control signal responsive to a high-side enable signal and a slew current signal representative of a slew rate at a switching output. A high-side driver is configured to provide the high-side drive signal responsive to the high-side slew-compensated control signal. Low-side slew control circuitry is configured to provide a low-side slew-compensated drive signal responsive to a low-side enable signal and the slew current signal. A low-side driver is configured to provide the low-side drive signal responsive to the low-side slew-compensated control signal. A capacitor is coupled between the high-side and low-side slew control circuitry and is configured to convert the slew rate to the slew current signal.

    UNIDIRECTIONAL RING MITIGATION IN A VOLTAGE CONVERTER

    公开(公告)号:US20180294710A1

    公开(公告)日:2018-10-11

    申请号:US15716647

    申请日:2017-09-27

    Abstract: A system includes a high side transistor switch coupled to a first voltage node and a low side transistor switch coupled to the high side transistor switch at a switch node. The system further includes a unidirectional decoupling capacitor circuit including a capacitive component. The unidirectional decoupling capacitor circuit is coupled between the first voltage node and a common potential. Responsive to a voltage on the first voltage node being more than a threshold greater than an input voltage to the first voltage node, the unidirectional decoupling capacitor circuit is configured to sink current from the first voltage node to the capacitive component. The capacitive component can therefore be charged, with the charge used to subsequently power a load.

    BIAS GENERATION FOR POWER CONVERTER
    5.
    发明公开

    公开(公告)号:US20240313656A1

    公开(公告)日:2024-09-19

    申请号:US18184913

    申请日:2023-03-16

    CPC classification number: H02M3/33507 H02M1/08

    Abstract: An apparatus includes: a first transistor coupled between a primary-side terminal and a bias terminal, the first transistor having a first control terminal; a second transistor coupled between the bias terminal and a ground terminal, the second transistor having a second control terminal; and a control circuit having a control input, a reference input, and first and second control outputs, the control input coupled to the bias terminal, the first control output coupled to the first control terminal, the second control output coupled to the second control terminal, and the control circuit configured to provide first and second control signals having a same switching frequency at the respective first and second control outputs responsive to a first voltage at the control input and a second voltage at the reference input.

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