Voltage regulation circuit
    1.
    发明授权

    公开(公告)号:US11581810B2

    公开(公告)日:2023-02-14

    申请号:US17376549

    申请日:2021-07-15

    Abstract: A voltage regulation circuit includes a switching output terminal, a high-side output transistor, a low-side output transistor, a high-side replica transistor, a low-side replica transistor, and a comparator circuit. The high-side output transistor is configured to drive the switching output terminal. The low-side output transistor is configured to drive the switching output terminal. The high-side replica transistor is coupled to the high-side output transistor. The low-side replica transistor is coupled to the high-side replica transistor and the low-side output transistor. The comparator circuit is coupled to the high-side replica transistor and the low-side replica transistor, and is configured to compare a signal received from both the high-side replica transistor and the low-side replica transistor to a ramp signal.

    TRANSIENT EVENT DETECTOR CIRCUIT AND METHOD
    2.
    发明申请

    公开(公告)号:US20190123641A1

    公开(公告)日:2019-04-25

    申请号:US16225771

    申请日:2018-12-19

    Abstract: Disclosed examples include a transient event detector circuit to detect transient events in a switching converter, including a DLL circuit to detect changes in a duty cycle of a pulse width modulation signal used to operate a switching converter, and an output circuit to provide a status output signal in a first state when no transient event is detected, and to provide the status output signal in a second state indicating a transient event in the switching converter in response to a detected change in the duty cycle of the pulse width modulation signal.

    Adaptive gain and bandwidth ramp generator

    公开(公告)号:US11695320B2

    公开(公告)日:2023-07-04

    申请号:US17214527

    申请日:2021-03-26

    Abstract: In some examples, a circuit includes a resistor network, a filter, a current generator, and a capacitor. The resistor network has a resistor network output and is adapted to be coupled between a switch terminal of a power converter (104) and a ground terminal. The filter has a filter input and a filter output, the filter input coupled to the resistor network output. The current generator has a current generator output and first and second current generator inputs, the first current generator input configured to receive an input voltage and the second current generator input coupled to the filter output. The capacitor is coupled between the current generator output and the ground terminal.

    Compensation in a voltage mode switch-mode converter

    公开(公告)号:US11569741B2

    公开(公告)日:2023-01-31

    申请号:US16950660

    申请日:2020-11-17

    Abstract: In some examples, a circuit comprises a first field effect transistor (FET) having a first gate adapted to couple to a reference voltage source, a first source coupled to a first current source, and a first drain coupled to a second current source. The circuit comprises a second FET having a second gate coupled to the first drain, a second drain coupled to the first current source, and a second source coupled to a first resistor. The circuit comprises a third FET having a third gate adapted to couple to a feedback loop of a voltage converter, a third source coupled to a third current source, and a third drain coupled to a fourth current source. The circuit comprises a fourth FET having a fourth gate coupled to the third drain, a fourth drain coupled to the third current source, and a fourth source coupled to a second resistor.

    Transient event detector circuit and method

    公开(公告)号:US10199929B2

    公开(公告)日:2019-02-05

    申请号:US15284262

    申请日:2016-10-03

    Abstract: Disclosed examples include a transient event detector circuit to detect transient events in a switching converter, including a DLL circuit to detect changes in a duty cycle of a pulse width modulation signal used to operate a switching converter, and an output circuit to provide a status output signal in a first state when no transient event is detected, and to provide the status output signal in a second state indicating a transient event in the switching converter in response to a detected change in the duty cycle of the pulse width modulation signal.

    Multiphase power regulator with discontinuous conduction mode control

    公开(公告)号:US10270346B2

    公开(公告)日:2019-04-23

    申请号:US15853494

    申请日:2017-12-22

    Abstract: A multiphase power regulator includes a plurality of phases coupled in parallel to provide a load current as a combination of phase currents at an output voltage, each phase including at least one power transistor switched to provide a respective phase current based at least in part on a comparator output signal, and a current-sense low pass filter to sense the phase current. The regulator further includes a gm stage to generate the current set point voltage based at least in part on the output voltage, a comparator to compare a voltage from the current-sense low pass filters to the current set point voltage and a current set point adjustment circuit to provide an auxiliary control signal to decrease the current set point voltage responsive to a change in comparator output and then to increase the current set point voltage responsive to another change in comparator output.

    Power regulator with prevention of inductor current reversal

    公开(公告)号:US10243464B2

    公开(公告)日:2019-03-26

    申请号:US15854061

    申请日:2017-12-26

    Abstract: A controller including a voltage synthesizer for a switching regulator includes a synthesizer input to be coupled to an input of the regulator. First and second replica switching transistors are connected at a first node. A resistor couples between the first node and a second node, and a capacitor couples between the second node and ground. A transconductance stage compares a voltage sampled onto the capacitor to the output voltage of the regulator and generates an output signal in response to the comparison. A first switch couples between first and second inputs of the transconductance stage. The first switch is turned on during each cycle of operation of the voltage synthesizer to reset the capacitor voltage to the output voltage of the regulator.

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