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公开(公告)号:US20230101610A1
公开(公告)日:2023-03-30
申请号:US17490918
申请日:2021-09-30
Applicant: Texas Instruments Incorporated
Inventor: Meng-Chia LEE , Sunglyong KIM , Seetharaman SRIDHAR , Sameer PENDHARKAR
IPC: H01L29/78
Abstract: An integrated circuit includes an epitaxial layer over a semiconductor substrate. The epitaxial layer has a first conductivity type and a top surface. First, second and third trenches are located in the epitaxial layer. The trenches respectively include first, second and third field plates. First and second body members are located within the epitaxial layer and have a different second conductivity type. The first body member is located between the first and second trenches, and the second body member is located between the second and third trenches. The first body member extends a first distance between the top surface and the substrate, and the second body member extends a lesser second distance between the top surface and the substrate.
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公开(公告)号:US20200312710A1
公开(公告)日:2020-10-01
申请号:US16546499
申请日:2019-08-21
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Hong YANG , Seetharaman SRIDHAR , Ya ping CHEN , Fei MA , Yunlong LIU , Sunglyong KIM
IPC: H01L21/762 , H01L21/763 , H01L21/324 , H01L21/308 , H01L21/02 , H01L29/66
Abstract: A semiconductor device has a semiconductor material in a substrate. The semiconductor device has an MOS transistor. A trench in the substrate extends from a top surface of the substrate) into the semiconductor material. A shield is disposed in the trench. The shield has a contact portion which extends toward a top surface of the trench. A gate of the MOS transistor is disposed in the trench over the shield. The gate is electrically isolated from the shield. The gate is electrically isolated from the contact portion of the shield by a shield isolation layer which covers an angled surface of the contact portion extending toward the top of the trench. Methods of forming the semiconductor device are disclosed.
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公开(公告)号:US20220223731A1
公开(公告)日:2022-07-14
申请号:US17147875
申请日:2021-01-13
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Sunglyong KIM , Seetharaman SRIDHAR , Meng-Chia LEE , Thomas Eugene GREBS , Hong YANG
IPC: H01L29/78 , H01L23/482 , H01L29/06 , H01L29/10 , H01L29/40 , H01L21/765 , H01L29/66
Abstract: A semiconductor device includes first, second and third trenches formed in a semiconductor layer having a first conductivity type. Each trench includes a corresponding field plate and a corresponding gate over each field plate. A first body region having a second opposite conductivity type is between the first and second gates, and a second body region having the second conductivity type is located between the second and third gates. A first source region is located over the first body region and a second source region is located over the second body region, the first and second source regions having the first conductivity type. A first gate bus is conductively connected to the first gate and a second gate bus is conductively connected to the second gate, the first gate bus conductively isolated from the second gate bus.
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公开(公告)号:US20220208601A1
公开(公告)日:2022-06-30
申请号:US17695119
申请日:2022-03-15
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Hong YANG , Seetharaman SRIDHAR , Ya ping CHEN , Fei MA , Yunlong LIU , Sunglyong KIM
IPC: H01L21/762 , H01L21/763 , H01L29/66 , H01L21/308 , H01L21/02 , H01L21/324
Abstract: A semiconductor device has a semiconductor material in a substrate. The semiconductor device has an MOS transistor. A trench in the substrate extends from a top surface of the substrate) into the semiconductor material. A shield is disposed in the trench. The shield has a contact portion which extends toward a top surface of the trench. A gate of the MOS transistor is disposed in the trench over the shield. The gate is electrically isolated from the shield. The gate is electrically isolated from the contact portion of the shield by a shield isolation layer which covers an angled surface of the contact portion extending toward the top of the trench. Methods of forming the semiconductor device are disclosed.
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公开(公告)号:US20200243647A1
公开(公告)日:2020-07-30
申请号:US16846754
申请日:2020-04-13
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Sunglyong KIM , Seetharaman SRIDHAR , Sameer PENDHARKAR
Abstract: A semiconductor device includes a MOS transistor located within a semiconductor substrate of a first conductivity type. The transistor includes a body well located between a drain well and a substrate contact well. A buried voltage blocking region of a second conductivity type is located within the substrate and is connected to the body well. The buried voltage blocking region extends toward the substrate contact well, with an unmodified portion of the substrate remaining between the voltage blocking region and the substrate contact well.
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公开(公告)号:US20190206997A1
公开(公告)日:2019-07-04
申请号:US15876989
申请日:2018-01-22
Applicant: Texas Instruments Incorporated
Inventor: Sunglyong KIM , Seetharaman SRIDHAR , Sameer PENDHARKAR
CPC classification number: H01L29/0882 , H01L29/0623 , H01L29/1045 , H01L29/66659 , H01L29/66681 , H01L29/7816 , H01L29/7835
Abstract: A semiconductor device includes a MOS transistor located within a semiconductor substrate of a first conductivity type. The transistor includes a body well located between a drain well and a substrate contact well. A buried voltage blocking region of a second conductivity type is located within the substrate and is connected to the body well. The buried voltage blocking region extends toward the substrate contact well, with an unmodified portion of the substrate remaining between the voltage blocking region and the substrate contact well.
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