公开(公告)号：US09853086B2

公开(公告)日：2017-12-26

申请号：US15350694

申请日：2016-11-14

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Henry Litzmann Edwards ,  Toan Tran ,  Jeffrey R. Debord ,  Ashesh Parikh ,  Bradley David Sucher

IPC: H01L29/66 ,  H01L27/16 ,  H01L35/04 ,  H01L21/265 ,  H01L21/8238 ,  H01L27/06 ,  H01L29/34 ,  H01L35/32 ,  H01L35/34 ,  H01L27/092

CPC classification number: H01L27/16 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/823878 ,  H01L27/0617 ,  H01L27/092 ,  H01L29/34 ,  H01L35/04 ,  H01L35/32 ,  H01L35/34

Abstract: In described examples, an embedded thermoelectric device is formed by forming isolation trenches in a substrate, concurrently between CMOS transistors and between thermoelectric elements of the embedded thermoelectric device. Dielectric material is formed in the isolation trenches to provide field oxide which laterally isolates the CMOS transistors and the thermoelectric elements. Germanium is implanted into the substrate in areas for the thermoelectric elements, and the substrate is subsequently annealed, to provide a germanium density of at least 0.10 atomic percent in the thermoelectric elements between the isolation trenches. The germanium may be implanted before the isolation trenches are formed, after the isolation trenches are formed and before the dielectric material is formed in the isolation trenches, and/or after the dielectric material is formed in the isolation trenches.

公开(公告)号：US09231025B2

公开(公告)日：2016-01-05

申请号：US14292119

申请日：2014-05-30

Applicant: Texas Instruments Incorporated

Inventor： Henry Litzmann Edwards ,  Kenneth James Maggio ,  Toan Tran ,  Jihong Chen ,  Jeffrey R. Debord

IPC: H01L27/00 ,  H01L27/16 ,  H01L35/04 ,  H01L27/092 ,  H01L21/8238 ,  H01L21/265 ,  H01L37/00

CPC classification number: H01L35/34 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/823878 ,  H01L27/0617 ,  H01L27/092 ,  H01L27/10876 ,  H01L27/16 ,  H01L29/34 ,  H01L35/04 ,  H01L37/00 ,  H01L2924/13091

Abstract: An integrated circuit containing CMOS transistors and an embedded thermoelectric device may be formed by forming field oxide in isolation trenches to isolate the CMOS transistors and thermoelectric elements of the embedded thermoelectric device. N-type dopants are implanted into the substrate to provide at least 1×1018 cm−3 n-type dopants in n-type thermoelectric elements and the substrate under the field oxide between the n-type thermoelectric elements. P-type dopants are implanted into the substrate to provide at least 1×1018 cm−3 p-type dopants in p-type thermoelectric elements and the substrate under the field oxide between the p-type thermoelectric elements. The n-type dopants and p-type dopants may be implanted before the field oxide are formed, after the isolation trenches for the field oxide are formed and before dielectric material is formed in the isolation trenches, and/or after the field oxide is formed.

Abstract translation: 可以通过在隔离沟槽中形成场氧化物来隔离嵌入式热电装置的CMOS晶体管和热电元件来形成包含CMOS晶体管和嵌入式热电装置的集成电路。 将N型掺杂剂注入到衬底中以在n型热电元件中提供至少1×1018cm-3n型掺杂剂和在n型热电元件之间的场氧化物下的衬底。 P型掺杂剂被注入到衬底中以在p型热电元件中提供至少1×1018cm-3p型掺杂剂，并且在p型热电元件之间的场氧化物之下提供衬底。 在形成场氧化物的隔离沟槽之后，在隔离沟槽中形成介电材料之前和/或在形成场氧化物之后，可以在形成场氧化物之前，注入n型掺杂剂和p型掺杂剂 。

公开(公告)号：US20150349022A1

公开(公告)日：2015-12-03

申请号：US14292198

申请日：2014-05-30

Applicant: Texas Instruments Incorporated

Inventor： Henry Litzmann Edwards ,  Toan Tran ,  Jeffrey R. Debord ,  Ashesh Parikh ,  Bradley David Sucher

IPC: H01L27/16 ,  H01L21/265 ,  H01L21/8238 ,  H01L35/04 ,  H01L27/092

CPC classification number: H01L27/16 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/823878 ,  H01L27/0617 ,  H01L27/092 ,  H01L29/34 ,  H01L35/04 ,  H01L35/32 ,  H01L35/34

Abstract: An integrated circuit containing CMOS transistors and an embedded thermoelectric device is formed by forming isolation trenches in a substrate, concurrently between the CMOS transistors and between thermoelectric elements of the embedded thermoelectric device. Dielectric material is formed in the isolation trenches to provide field oxide which laterally isolates the CMOS transistors and the thermoelectric elements. Germanium is implanted into the substrate in areas for the thermoelectric elements, and the substrate is subsequently annealed, to provide a germanium density of at least 0.10 atomic percent in the thermoelectric elements between the isolation trenches. The germanium may be implanted before the isolation trenches are formed, after the isolation trenches are formed and before the dielectric material is formed in the isolation trenches, and/or after the dielectric material is formed in the isolation trenches.

Abstract translation: 通过在CMOS晶体管之间和嵌入式热电元件的热电元件之间同时形成衬底中的隔离沟槽，形成包含CMOS晶体管和嵌入式热电元件的集成电路。 介电材料形成在隔离沟槽中，以提供横向隔离CMOS晶体管和热电元件的场氧化物。 在用于热电元件的区域中将锗植入衬底中，并且随后对衬底进行退火，以在隔离沟槽之间的热电元件中提供至少0.10原子％的锗密度。 在形成隔离沟槽之后，在形成隔离沟槽之后并且在隔离沟槽内形成电介质材料之前和/或在隔离沟槽中形成电介质材料之后，可以注入锗。

公开(公告)号：US09496313B2

公开(公告)日：2016-11-15

申请号：US14292198

申请日：2014-05-30

Applicant: Texas Instruments Incorporated

Inventor： Henry Litzmann Edwards ,  Toan Tran ,  Jeffrey R. Debord ,  Ashesh Parikh ,  Bradley David Sucher

IPC: H01L29/66 ,  H01L27/16 ,  H01L35/04 ,  H01L21/265 ,  H01L27/06 ,  H01L27/092 ,  H01L21/8238

CPC classification number: H01L27/16 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/823878 ,  H01L27/0617 ,  H01L27/092 ,  H01L29/34 ,  H01L35/04 ,  H01L35/32 ,  H01L35/34

Abstract: An integrated circuit containing CMOS transistors and an embedded thermoelectric device is formed by forming isolation trenches in a substrate, concurrently between the CMOS transistors and between thermoelectric elements of the embedded thermoelectric device. Dielectric material is formed in the isolation trenches to provide field oxide which laterally isolates the CMOS transistors and the thermoelectric elements. Germanium is implanted into the substrate in areas for the thermoelectric elements, and the substrate is subsequently annealed, to provide a germanium density of at least 0.10 atomic percent in the thermoelectric elements between the isolation trenches. The germanium may be implanted before the isolation trenches are formed, after the isolation trenches are formed and before the dielectric material is formed in the isolation trenches, and/or after the dielectric material is formed in the isolation trenches.

Abstract translation: 通过在CMOS晶体管之间和嵌入式热电元件的热电元件之间同时形成衬底中的隔离沟槽，形成包含CMOS晶体管和嵌入式热电元件的集成电路。 介电材料形成在隔离沟槽中，以提供横向隔离CMOS晶体管和热电元件的场氧化物。 在用于热电元件的区域中将锗植入衬底中，并且随后对衬底进行退火，以在隔离沟槽之间的热电元件中提供至少0.10原子％的锗密度。 在形成隔离沟槽之后，在形成隔离沟槽之后并且在隔离沟槽内形成电介质材料之前和/或在隔离沟槽中形成电介质材料之后，可以注入锗。

公开(公告)号：US20240040783A1

公开(公告)日：2024-02-01

申请号：US17877807

申请日：2022-07-29

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Toan Tran ,  Stephen A. Keller

IPC: H01L27/11521 ,  H01L29/423 ,  H01L29/788 ,  H01L21/28 ,  H01L29/66

CPC classification number: H01L27/11521 ,  H01L29/42328 ,  H01L29/7881 ,  H01L29/40114 ,  H01L29/66825

Abstract: A Flash IC device having IREAD compensation and a method of fabricating the same. Responsive to determining a gate pattern misalignment, one or more implant conditions for implanting a dopant may be selected to achieve balanced IREAD characteristics between adjacent bitcells of the Flash IC device.

公开(公告)号：US20170062518A1

公开(公告)日：2017-03-02

申请号：US15350694

申请日：2016-11-14

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Henry Litzmann Edwards ,  Toan Tran ,  Jeffrey R. Debord ,  Ashesh Parikh ,  Bradley David Sucher

IPC: H01L27/16 ,  H01L35/32 ,  H01L21/8238 ,  H01L21/265 ,  H01L35/04 ,  H01L35/34

CPC classification number: H01L27/16 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/823878 ,  H01L27/0617 ,  H01L27/092 ,  H01L29/34 ,  H01L35/04 ,  H01L35/32 ,  H01L35/34

Abstract: In described examples, an embedded thermoelectric device is formed by forming isolation trenches in a substrate, concurrently between CMOS transistors and between thermoelectric elements of the embedded thermoelectric device. Dielectric material is formed in the isolation trenches to provide field oxide which laterally isolates the CMOS transistors and the thermoelectric elements. Germanium is implanted into the substrate in areas for the thermoelectric elements, and the substrate is subsequently annealed, to provide a germanium density of at least 0.10 atomic percent in the thermoelectric elements between the isolation trenches. The germanium may be implanted before the isolation trenches are formed, after the isolation trenches are formed and before the dielectric material is formed in the isolation trenches, and/or after the dielectric material is formed in the isolation trenches.

Abstract translation: 在所述实施例中，通过在CMOS晶体管之间以及嵌入式热电元件的热电元件之间同时形成衬底中的隔离沟槽来形成嵌入式热电元件。 介电材料形成在隔离沟槽中，以提供横向隔离CMOS晶体管和热电元件的场氧化物。 在用于热电元件的区域中将锗植入衬底中，并且随后对衬底进行退火，以在隔离沟槽之间的热电元件中提供至少0.10原子％的锗密度。 在形成隔离沟槽之后，在形成隔离沟槽之后并且在隔离沟槽内形成电介质材料之前和/或在隔离沟槽中形成电介质材料之后，可以注入锗。

公开(公告)号：US09437799B2

公开(公告)日：2016-09-06

申请号：US14957314

申请日：2015-12-02

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Henry Litzmann Edwards ,  Kenneth James Maggio ,  Toan Tran ,  Jihong Chen ,  Jeffrey R. Debord

IPC: H01L27/00 ,  H01L35/34 ,  H01L27/16 ,  H01L27/092 ,  H01L27/108

CPC classification number: H01L35/34 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/823878 ,  H01L27/0617 ,  H01L27/092 ,  H01L27/10876 ,  H01L27/16 ,  H01L29/34 ,  H01L35/04 ,  H01L37/00 ,  H01L2924/13091

Abstract: An integrated circuit containing CMOS transistors and an embedded thermoelectric device may be formed by forming field oxide in isolation trenches to isolate the CMOS transistors and thermoelectric elements of the embedded thermoelectric device. N-type dopants are implanted into the substrate to provide at least 1×1018 cm−3 n-type dopants in n-type thermoelectric elements and the substrate under the field oxide between the n-type thermoelectric elements. P-type dopants are implanted into the substrate to provide at least 1×1018 cm−3 p-type dopants in p-type thermoelectric elements and the substrate under the field oxide between the p-type thermoelectric elements. The n-type dopants and p-type dopants may be implanted before the field oxide are formed, after the isolation trenches for the field oxide are formed and before dielectric material is formed in the isolation trenches, and/or after the field oxide is formed.

Abstract translation: 可以通过在隔离沟槽中形成场氧化物来隔离嵌入式热电装置的CMOS晶体管和热电元件来形成包含CMOS晶体管和嵌入式热电装置的集成电路。 将N型掺杂剂注入到衬底中以在n型热电元件中提供至少1×1018cm-3n型掺杂剂和在n型热电元件之间的场氧化物下的衬底。 P型掺杂剂被注入到衬底中以在p型热电元件中提供至少1×1018cm-3p型掺杂剂，并且在p型热电元件之间的场氧化物之下提供衬底。 在形成场氧化物的隔离沟槽之后，在隔离沟槽中形成介电材料之前和/或在形成场氧化物之后，可以在形成场氧化物之前，注入n型掺杂剂和p型掺杂剂 。

公开(公告)号：US20160155925A1

公开(公告)日：2016-06-02

申请号：US14957314

申请日：2015-12-02

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Henry Litzmann Edwards ,  Kenneth James Maggio ,  Toan Tran ,  Jihong Chen ,  Jeffrey R. Debord

IPC: H01L35/34 ,  H01L27/16

CPC classification number: H01L35/34 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/823878 ,  H01L27/0617 ,  H01L27/092 ,  H01L27/10876 ,  H01L27/16 ,  H01L29/34 ,  H01L35/04 ,  H01L37/00 ,  H01L2924/13091

Abstract: An integrated circuit containing CMOS transistors and an embedded thermoelectric device may be formed by forming field oxide in isolation trenches to isolate the CMOS transistors and thermoelectric elements of the embedded thermoelectric device. N-type dopants are implanted into the substrate to provide at least 1×1018 cm−3 n-type dopants in n-type thermoelectric elements and the substrate under the field oxide between the n-type thermoelectric elements. P-type dopants are implanted into the substrate to provide at least 1×1018 cm−3 p-type dopants in p-type thermoelectric elements and the substrate under the field oxide between the p-type thermoelectric elements. The n-type dopants and p-type dopants may be implanted before the field oxide are formed, after the isolation trenches for the field oxide are formed and before dielectric material is formed in the isolation trenches, and/or after the field oxide is formed.

Abstract translation: 可以通过在隔离沟槽中形成场氧化物来隔离嵌入式热电装置的CMOS晶体管和热电元件来形成包含CMOS晶体管和嵌入式热电装置的集成电路。 将N型掺杂剂注入到衬底中以在n型热电元件中提供至少1×1018cm-3n型掺杂剂和在n型热电元件之间的场氧化物下的衬底。 P型掺杂剂被注入到衬底中以在p型热电元件中提供至少1×1018cm-3p型掺杂剂，并且在p型热电元件之间的场氧化物之下提供衬底。 在形成场氧化物的隔离沟槽之后，在隔离沟槽中形成介电材料之前和/或在形成场氧化物之后，可以在形成场氧化物之前，注入n型掺杂剂和p型掺杂剂 。