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公开(公告)号：US12149236B2
公开(公告)日：2024-11-19
申请号：US17827406
申请日：2022-05-27
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Venkatesh Guduri , Ashish Ojha , Priyank Anand , Richeek Maitra
IPC: H03K17/00 , H03K17/30 , H03K17/687
Abstract: In an example, a system includes a first transistor and a second transistor, the first transistor and the second transistor configured to provide current to a load. The system also includes a sense transistor coupled to the first transistor, the sense transistor configured to sense a current flowing through the first transistor. The system includes an amplifier coupled to the sense transistor, where the amplifier includes a first input, a second input, and an output. The system also includes pre-bias circuitry coupled to the amplifier, where the pre-bias circuitry is configured to provide a voltage to the first input of the amplifier responsive to the first transistor being off, where the voltage biases the amplifier.
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公开(公告)号：US20230382246A1
公开(公告)日：2023-11-30
申请号：US17826822
申请日：2022-05-27
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Priyank Anand , Ashish Ojha , Krishnamurthy Shankar , Venkatesh Guduri
Abstract: Examples of contactor controllers, systems and methods enable quick-turn-off (QTO) using an output voltage of a contactor controller when its supply voltage is below a threshold but does not interfere with QTO when sufficient supply voltage is available. In an example, when VM loss occurs, a high-side (HS) clamp of a contactor controller is disabled, and a low-side (LS) clamp current is generated using the output voltage. The LS clamp current may be adjusted to achieve a desired QTO voltage. In another example, a HS clamp is disabled and the charging of the gate of a LS field-effect transistor (FET) is enabled only when the output voltage increases above a power-off QTO threshold (less than the LS clamp voltage); the QTO voltage is set by a voltage detection and comparison circuit of the contactor controller.
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公开(公告)号：US12179617B2
公开(公告)日：2024-12-31
申请号：US17826822
申请日：2022-05-27
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Priyank Anand , Ashish Ojha , Krishnamurthy Shankar , Venkatesh Guduri
Abstract: Examples of contactor controllers, systems and methods enable quick-turn-off (QTO) using an output voltage of a contactor controller when its supply voltage is below a threshold but does not interfere with QTO when sufficient supply voltage is available. In an example, when VM loss occurs, a high-side (HS) clamp of a contactor controller is disabled, and a low-side (LS) clamp current is generated using the output voltage. The LS clamp current may be adjusted to achieve a desired QTO voltage. In another example, a HS clamp is disabled and the charging of the gate of a LS field-effect transistor (FET) is enabled only when the output voltage increases above a power-off QTO threshold (less than the LS clamp voltage); the QTO voltage is set by a voltage detection and comparison circuit of the contactor controller.
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公开(公告)号：US10680608B2
公开(公告)日：2020-06-09
申请号：US15231350
申请日：2016-08-08
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Priyank Anand , Anand Kannan , Venkatesh Guduri
IPC: H03K17/00 , H03K17/693 , H03K17/16
Abstract: A multiplexer comprises: a first switch; a second switch; a dummy component coupled to the first switch and the second switch and configured to: reduce a first charge injection of the first switch, and reduce a second charge injection of the second switch; and an output coupled to the first switch, the second switch, and the dummy component. A method comprises: providing an output from either a first switch or a second switch; coupling, by a dummy component, to the first switch and the second switch; using a BBM action; and reducing, by the dummy component, a first charge injection of the first switch or a second charge injection of the second switch.
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公开(公告)号：US20250076909A1
公开(公告)日：2025-03-06
申请号：US18240734
申请日：2023-08-31
Applicant: Texas Instruments Incorporated
Inventor： Venkatesh Guduri , Ganapathi Shankar
IPC: G05F1/575 , G05F3/26 , H03K17/082 , H03K17/10 , H03K17/687
Abstract: A load current sensing circuit includes a sense leg including a sense transistor with a gate coupled to the output of a high-side gate driver, a feedback transistor, and a sense resistor coupled in series between a power supply and ground. An amplifier has differential inputs coupled to the sense leg and to an output, and an output coupled to the feedback transistor gate. A bias circuit has a first transistor coupled between the power supply voltage and the first bias voltage terminal, and a gate receiving, from a first leg, a first differential from the output voltage. A second leg in the amplifier bias circuit generates a gate voltage, for a second transistor coupled between ground and a second bias voltage terminal, that is at a second differential from a voltage at the first bias voltage terminal. The amplifier is biased between the first and second bias voltages.
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Patent Agency Ranking
公开(公告)号：US11409350B1
公开(公告)日：2022-08-09
申请号：US17390276
申请日：2021-07-30
Applicant: Texas Instruments Incorporated
Inventor： Ganapathi Shankar Krishnamurthy , Venkatesh Guduri
IPC: G06F1/32 , G06F9/44 , G06F1/3206 , G06F9/4401 , G06F1/3287
Abstract: An integrated circuit including an autosleep circuit and a voltage regulator. The autosleep circuit includes a latch, a voltage detection circuit outputting a signal to a set input of the latch responsive to a voltage at its input exceeding a threshold voltage, and a delay timer outputting a signal to a reset input of the latch responsive to inactivity at one or more input terminals. A voltage regulator is configured to generate a voltage for biasing a subsystem such as digital logic, and is also the input voltage to the voltage detection circuit. The voltage regulator includes a plurality of transistors in parallel, one gated by the output of the latch and each of the others gated by one of the one or more input terminals. The voltage regulator includes an output leg that generates the output voltage responsive to one of the parallel transistors being turned on.
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公开(公告)号：US20250091458A1
公开(公告)日：2025-03-20
申请号：US18961768
申请日：2024-11-27
Applicant: Texas Instruments Incorporated
Inventor： Priyank Anand , Ashish Ojha , Krishnamurthy Shankar , Venkatesh Guduri
Abstract: Examples of contactor controllers, systems and methods enable quick-turn-off (QTO) using an output voltage of a contactor controller when its supply voltage is below a threshold but does not interfere with QTO when sufficient supply voltage is available. In an example, when VM loss occurs, a high-side (HS) clamp of a contactor controller is disabled, and a low-side (LS) clamp current is generated using the output voltage. The LS clamp current may be adjusted to achieve a desired QTO voltage. In another example, a HS clamp is disabled and the charging of the gate of a LS field-effect transistor (FET) is enabled only when the output voltage increases above a power-off QTO threshold (less than the LS clamp voltage); the QTO voltage is set by a voltage detection and comparison circuit of the contactor controller.
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公开(公告)号：US11614479B2
公开(公告)日：2023-03-28
申请号：US17409633
申请日：2021-08-23
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Sandeep Kalyadan , Krishnamurthy Ganapathi Shankar , Venkatesh Guduri
Abstract: A device includes FETs with control terminals. A gate driver circuit causes the FETs to turn on and to enter a high-impedance state in response to an OCP signal. A current sense circuit senses an FET current through the FETs and sends the OCP signal to the gate driver circuit when the FET current exceeds an OCP current for longer than an OCP deglitch period. A test sequencer, in response to receiving an external test mode signal, sets the OCP current to a preset OCP test current, sets the OCP deglitch period to a preset OCP deglitch test period, and causes the gate driver circuit to turn on the plurality of FETs.
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公开(公告)号：US20220416697A1
公开(公告)日：2022-12-29
申请号：US17357812
申请日：2021-06-24
Applicant: Texas Instruments Incorporated
Inventor： Venkatesh Guduri , Venkata Naresh Kotikelapudi , Ganapathi Shankar Krishnamurthy , Ashish Ojha
IPC: H02P7/03
Abstract: A driver circuit includes a first switch which has a first terminal coupled to a voltage supply terminal, a second terminal coupled to a high-side gate, and a third terminal coupled to receive a voltage supply enable signal. The first switch is operable to connect the voltage supply terminal to the high-side gate responsive to the voltage supply enable signal. The driver circuit includes a second switch which has a first terminal coupled to a charge pump terminal, a second terminal coupled to the high side gate, and a third terminal coupled to receive a charge pump enable signal. The second switch is operable to connect the charge pump terminal to the high-side gate responsive to the charge pump enable signal.
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公开(公告)号：US11539315B1
公开(公告)日：2022-12-27
申请号：US17357812
申请日：2021-06-24
Applicant: Texas Instruments Incorporated
Inventor： Venkatesh Guduri , Venkata Naresh Kotikelapudi , Ganapathi Shankar Krishnamurthy , Ashish Ojha
Abstract: A driver circuit includes a first switch which has a first terminal coupled to a voltage supply terminal, a second terminal coupled to a high-side gate, and a third terminal coupled to receive a voltage supply enable signal. The first switch is operable to connect the voltage supply terminal to the high-side gate responsive to the voltage supply enable signal. The driver circuit includes a second switch which has a first terminal coupled to a charge pump terminal, a second terminal coupled to the high side gate, and a third terminal coupled to receive a charge pump enable signal. The second switch is operable to connect the charge pump terminal to the high-side gate responsive to the charge pump enable signal.
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