公开(公告)号：US20060056204A1

公开(公告)日：2006-03-16

申请号：US10943318

申请日：2004-09-16

申请人： Ta-yung Yang ,  Guo-Kiang Hung ,  Jenn-yu Lin ,  Chuh-Ching Li ,  Shao-Wei Chiu

发明人： Ta-yung Yang ,  Guo-Kiang Hung ,  Jenn-yu Lin ,  Chuh-Ching Li ,  Shao-Wei Chiu

IPC分类号： H02M5/27

CPC分类号： H02M3/33507

摘要： The present invention discloses a switching control circuit for a primary-side controlled power converter. A voltage-waveform detector produces a voltage-feedback signal and a discharge-time signal. A current-waveform detector generates a current-waveform signal by measuring a primary-side switching current. An integrator generates a current-feedback signal by integrating the current-waveform signal with the discharge time. A time constant of the integrator is correlated with the switching frequency, thus the current-feedback signal is proportional to an output current of the power converter. A PWM circuit controls the pulse width of the switching signal in response to the outputs of a voltage-loop error amplifier and a current-loop error amplifier. The output voltage and the maximum output current of the power converter are therefore regulated.

摘要翻译： 本发明公开了一种用于初级侧受控电力转换器的开关控制电路。 电压波形检测器产生电压反馈信号和放电时间信号。 电流波形检测器通过测量初级侧开关电流产生电流波形信号。 积分器通过将电流波形信号与放电时间进行积分来产生电流反馈信号。 积分器的时间常数与开关频率相关，因此电流反馈信号与功率转换器的输出电流成比例。 PWM电路响应于电压环路误差放大器和电流环路误差放大器的输出来控制开关信号的脉冲宽度。 因此调节功率转换器的输出电压和最大输出电流。

公开(公告)号：US20060055433A1

公开(公告)日：2006-03-16

申请号：US10943668

申请日：2004-09-16

申请人： Ta-yung Yang ,  Guo-Kiang Hung ,  Jenn-yu Lin ,  Chuh-Ching Li ,  Feng Tsao

发明人： Ta-yung Yang ,  Guo-Kiang Hung ,  Jenn-yu Lin ,  Chuh-Ching Li ,  Feng Tsao

IPC分类号： G01R25/00

CPC分类号： H02M3/33507 ,  H02M2001/0032 ,  Y02B70/16

摘要： A voltage-waveform detector produces a voltage-feedback signal and a discharge-time signal by multi-sampling a voltage signal of a transformer. The discharge-time signal represents a discharge time of a secondary-side switching current. A voltage-loop error amplifier amplifies the voltage-feedback signal and generates a control signal. An off-time modulator correspondingly generates a discharge-current signal and a standby signal in response to the control signal and an under-voltage signal. The under-voltage signal indicates a low supply voltage of the controller. An oscillator produces a pulse signal in response to the discharge-current signal. The pulse signal determines the off-time of the switching signal. A PWM circuit generates the switching signal in response to the pulse signal and the standby signal. The standby signal further controls the off-time of the switching signal and maintains a minimum switching frequency. The switching signal is used for regulating the output of the power supply.

摘要翻译： 电压波形检测器通过对变压器的电压信号进行多次采样来产生电压反馈信号和放电时间信号。 放电时间信号表示次级侧开关电流的放电时间。 电压环路误差放大器放大电压反馈信号并产生控制信号。 关断时间调制器相应地根据控制信号和欠压信号产生放电电流信号和待机信号。 欠压信号表示控制器的低电源电压。 振荡器响应于放电电流信号产生脉冲信号。 脉冲信号确定开关信号的关断时间。 PWM电路响应于脉冲信号和待机信号产生开关信号。 待机信号进一步控制开关信号的关断时间并保持最小开关频率。 开关信号用于调节电源的输出。

公开(公告)号：US20060034102A1

公开(公告)日：2006-02-16

申请号：US10917106

申请日：2004-08-12

申请人： Ta-yung Yang ,  Guo-Kiang Hung ,  Jenn-yu Lin

发明人： Ta-yung Yang ,  Guo-Kiang Hung ,  Jenn-yu Lin

IPC分类号： H02M3/335

CPC分类号： H02M3/33507 ,  H02M2001/0006 ,  H02M2001/0009

摘要： A close-loop PWM controller for a primary-side controlled power converter is provided. A voltage-waveform detector produces a voltage-feedback signal and a discharge-time signal. A current-waveform detector generates a current-waveform signal by measuring a primary-side switching current. An integrator generates a current-feedback signal by integrating the current-waveform signal with the discharge-time signal. A time constant of the integrator is correlated with a switching period of the switching signal, therefore the current-feedback signal is proportional to the output current of the power converter. The close-loop PWM controller further comprises a voltage-loop error amplifier and a current-loop error amplifier. A PWM circuit and comparators control the pulse width of the switching signal in response to the outputs of the voltage-loop error amplifier and the current-loop error amplifier. The output voltage and the maximum output current of the power converter are therefore regulated.

摘要翻译： 提供了一个用于初级侧受控电源转换器的闭环PWM控制器。 电压波形检测器产生电压反馈信号和放电时间信号。 电流波形检测器通过测量初级侧开关电流产生电流波形信号。 积分器通过将电流波形信号与放电时间信号进行积分而产生电流反馈信号。 积分器的时间常数与开关信号的开关周期相关，因此电流反馈信号与功率转换器的输出电流成正比。 闭环PWM控制器还包括电压环路误差放大器和电流环路误差放大器。 PWM电路和比较器响应于电压环路误差放大器和电流环路误差放大器的输出来控制开关信号的脉冲宽度。 因此调节功率转换器的输出电压和最大输出电流。

公开(公告)号：US20060133118A1

公开(公告)日：2006-06-22

申请号：US11022167

申请日：2004-12-21

申请人： Ta-yung Yang ,  Guo-Kiang Hung ,  Jenn-yu Lin

发明人： Ta-yung Yang ,  Guo-Kiang Hung ,  Jenn-yu Lin

IPC分类号： H02M3/335

CPC分类号： H02M3/33507 ,  H02M2001/0009

摘要： A multiple-sampling circuit is proposed for measuring a voltage signal and a discharge time of a transformer. Sampling signals are used for generating hold voltages by alternately sampling the reflected voltage from the transformer. A buffer amplifier generates a buffer voltage from the higher voltage of hold voltages. A sampling switch periodically conducts the buffer voltage to produce a voltage-feedback signal. The voltage-feedback signal is proportional to an output voltage of the switching circuit. A threshold signal added to the reflected voltage signal produces a level-shift reflected signal. A discharge-time signal is generated as the switching signal is disabled. The discharge-time signal is disabled once the level-shift signal is lower than the voltage-feedback signal. The pulse width of the discharge-time signal is therefore correlated to the discharge time of the transformer. The sampling signals are enabled to generate hold voltages only when the discharge-time signal is enabled.

公开(公告)号：US20060050539A1

公开(公告)日：2006-03-09

申请号：US10938463

申请日：2004-09-09

申请人： Ta-yung Yang ,  Guo-Kiang Hung ,  Jenn-yu Lin ,  Feng Tsao ,  Chiu Wei

发明人： Ta-yung Yang ,  Guo-Kiang Hung ,  Jenn-yu Lin ,  Feng Tsao ,  Chiu Wei

IPC分类号： H02M3/335

CPC分类号： H02M1/44 ,  H02M3/33523

摘要： The invention presents a switching control circuit for a primary-side-controlled power converter. A pattern generator produces a digital pattern to control a programmable capacitor that is connected to an oscillator, which produces frequency hopping to reduce the EMI. A voltage-waveform detector produces a voltage-feedback signal and a discharge-time signal by multi-sampling a voltage signal of a transformer. A current-waveform detector and an integrator generate a feedback signal. The integration of a current-waveform signal with a timing signal generates the average-current signal. Time constant of the integrator is correlated to the switching frequency. The oscillator generates the timing signal and a pulse signal in response to the output of a current-loop error amplifier. A PWM circuit generates the switching signal in response to the pulse signal and the output of a voltage-loop error amplifier for switching the switching device and regulating the output of the power converter.

摘要翻译： 本发明提出了一种用于初级侧控制功率转换器的开关控制电路。 模式发生器产生数字模式以控制连接到振荡器的可编程电容器，其产生跳频以减少EMI。 电压波形检测器通过对变压器的电压信号进行多次采样来产生电压反馈信号和放电时间信号。 电流波形检测器和积分器产生反馈信号。 电流波形信号与定时信号的积分产生平均电流信号。 积分器的时间常数与开关频率相关。 振荡器响应于电流环路误差放大器的输出产生定时信号和脉冲信号。 PWM电路响应于脉冲信号和用于切换开关装置的电压环路误差放大器的输出并且调节功率转换器的输出而产生开关信号。

公开(公告)号：US20050285587A1

公开(公告)日：2005-12-29

申请号：US10881202

申请日：2004-06-29

申请人： Ta-yung Yang ,  Guo-Kiang Hung ,  Jenn-yu Lin

发明人： Ta-yung Yang ,  Guo-Kiang Hung ,  Jenn-yu Lin

IPC分类号： H02M3/335 ,  H02M7/00

CPC分类号： H02M3/33507 ,  H02M2001/0009

摘要： An apparatus and method thereof for measuring an output current from a primary side of a power converter are provided. A peak detector is designed to sample a peak value of a converted voltage of a primary-side switching current. A zero-current detector detects a discharge-time of a secondary-side switching current through an auxiliary winding of a transformer. An oscillator generates a switching signal for switching the power converter. An integrator generates an integrated signal by integrating the converted voltage of the primary-side switching peak current with the discharge-time. The time constant of the integrator is correlated with the switching period of the switching signal. The integrated signal is thus proportional to the output current of the power converter.

摘要翻译： 提供了一种用于测量来自功率转换器的初级侧的输出电流的装置和方法。 峰值检测器被设计为对初级侧开关电流的转换电压的峰值进行采样。 零电流检测器检测通过变压器的辅助绕组的次级侧开关电流的放电时间。 振荡器产生用于切换功率转换器的开关信号。 积分器通过将初级侧开关峰值电流的转换电压与放电时间进行积分来生成积分信号。 积分器的时间常数与开关信号的开关周期相关。 因此，积分信号与功率转换器的输出电流成比例。

公开(公告)号：US20070004150A1

公开(公告)日：2007-01-04

申请号：US11427773

申请日：2006-06-29

申请人： Chih-Feng Huang ,  Tuo-Hsin Chien ,  Jenn-yu Lin ,  Ta-yung Yang

发明人： Chih-Feng Huang ,  Tuo-Hsin Chien ,  Jenn-yu Lin ,  Ta-yung Yang

IPC分类号： H01L21/8234 ,  H01L23/62

CPC分类号： H01L27/0259

摘要： An electrostatic discharge (ESD) protection device with adjustable single-trigger or multi-trigger voltage is provided. The semiconductor structure has multi-stage protection semiconductor circuit finction and adjustable discharge capacity. The single-trigger or multi-trigger semiconductor structure may be fabricated by using the conventional semiconductor process, and can be applied to IC semiconductor design and to effectively protect the important semiconductor devices and to prevent the semiconductor devices from ESD damage. In particular, the present invention can meet the requirements of high power semiconductor device and has better protection function compared to conventional ESD protection circuit. In the present invention, a plurality of N-wells or P-wells connected in parallel are used to adjust the discharge capacity of various wells in the P-substrate so as to improve the ESD protection capability and meet different power standards.

摘要翻译： 提供具有可调单触发或多触发电压的静电放电（ESD）保护装置。 半导体结构具有多级保护半导体电路的功能和可调放电容量。 单触发或多触发半导体结构可以通过使用传统的半导体工艺制造，并且可以应用于IC半导体设计并且有效地保护重要的半导体器件并且防止半导体器件受到ESD损坏。 特别地，本发明可以满足大功率半导体器件的要求，与传统的ESD保护电路相比具有更好的保护功能。 在本发明中，使用并联连接的多个N阱或P阱来调整P基板中的各个阱的放电容量，以提高ESD保护能力并满足不同的功率标准。

公开(公告)号：US20070052030A1

公开(公告)日：2007-03-08

申请号：US11222707

申请日：2005-09-08

申请人： Chih-Feng Huang ,  Ta-yung Yang ,  Jenn-yu Lin ,  Tuo-Hsin Chien

发明人： Chih-Feng Huang ,  Ta-yung Yang ,  Jenn-yu Lin ,  Tuo-Hsin Chien

IPC分类号： H01L23/62

CPC分类号： H01L27/0262

摘要： An electrostatic discharge (ESD) device with a parasitic silicon controlled rectifier (SCR) structure and controllable holding current is provided. A first distance is kept between a first N+ doped region and a first P+ doped region, and a second distance is kept between a second P+ doped region and a third N+ doped region. In addition, the holding current of the ESD device can be set to a specific value by modulating the first distance and the second distance. The holding current is in inverse proportion to the first distance and the second distance.

摘要翻译： 提供具有寄生可控硅整流器（SCR）结构和可控保持电流的静电放电（ESD）器件。 在第一N +掺杂区域和第一P +掺杂区域之间保持第一距离，并且在第二P +掺杂区域和第三N +掺杂区域之间保持第二距离。 此外，通过调制第一距离和第二距离，可以将ESD装置的保持电流设定为特定值。 保持电流与第一距离和第二距离成反比。

公开(公告)号：US20060220170A1

公开(公告)日：2006-10-05

申请号：US11096959

申请日：2005-03-31

申请人： Chih-Feng Huang ,  Tuo-Hsin Chien ,  Jenn-yu Lin ,  Ta-yung Yang

发明人： Chih-Feng Huang ,  Tuo-Hsin Chien ,  Jenn-yu Lin ,  Ta-yung Yang

IPC分类号： H01L29/00

CPC分类号： H01L21/823493 ,  H01L21/823418 ,  H01L29/0696 ,  H01L29/42368 ,  H01L29/66681 ,  H01L29/7816

摘要： A high-voltage MOSFET having isolation structure is provided. An N-type MOSFET includes a first deep N-type well. A first P-type region is formed in the first deep N-type well to enclose a first source region and a first contact region. A first drain region is formed in the first deep N-type well. A P-type MOSFET includes a second deep N-type well. A second P-type region is formed in the second deep N-type well to enclose a second drain region. A second source region and a second contact region are formed in the second deep N-type well. A polysilicon gate oxidation layer is disposed above the thin gate oxidation layer and the thick field oxidation layer to control the current in the channel of the MOSFET. Separated P-type regions provide further isolation between MOSFETs. A first gap and a second gap increase the breakdown voltage of the high-voltage MOSFET.

摘要翻译： 提供了具有隔离结构的高压MOSFET。 N型MOSFET包括第一深N型阱。 在第一深N型阱中形成第一P型区域以包围第一源极区域和第一接触区域。 在第一深N型阱中形成第一漏区。 P型MOSFET包括第二深N型阱。 在第二深N型阱中形成第二P型区域以包围第二漏极区域。 在第二深N型阱中形成第二源区和第二接触区。 多晶硅栅极氧化层设置在薄栅氧化层和厚场氧化层之上，以控制MOSFET沟道中的电流。 分离的P型区域提供MOSFET之间的进一步隔离。 第一间隙和第二间隙增加了高压MOSFET的击穿电压。

公开(公告)号：US20060033156A1

公开(公告)日：2006-02-16

申请号：US10919916

申请日：2004-08-16

申请人： Chih-Feng Huang ,  Ta-yung Yang ,  Jenn-yu Lin ,  Tuo-Hsin Chien

发明人： Chih-Feng Huang ,  Ta-yung Yang ,  Jenn-yu Lin ,  Tuo-Hsin Chien

IPC分类号： H01L29/76

CPC分类号： H01L29/7816 ,  H01L29/0634 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0886 ,  H01L29/42368

摘要： A high voltage LDMOS transistor according to the present invention includes at least one P-field block in the extended drain region of the N-well. The P-field blocks form junction-fields in the N-well for equalizing the capacitance of parasitic capacitors between the drain region and the source region and fully deplete the drift region before breakdown occurs. A higher breakdown voltage is therefore achieved and the N-well having a higher doping density is thus allowed. The source region and P-field blocks enclose the drain region, which makes the LDMOS transistor self-isolated.