利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

53 条记录 (耗时 0.033 秒)

    System having memory devices operable in a common interface
    1.
    发明授权
    System having memory devices operable in a common interface 失效
    具有可在公共接口中操作的存储器件的系统

    公开(公告)号：US06456517B2

    公开(公告)日：2002-09-24

    申请号：US09771307

    申请日：2001-01-26

    申请人： Tae-Kyun Kim ,  Sei-Jin Kim ,  Dae-Soo Jung

    发明人： Tae-Kyun Kim ,  Sei-Jin Kim ,  Dae-Soo Jung

    IPC分类号： G11C1606

    CPC分类号： G11C7/109 ,  G11C5/06 ,  G11C7/1006 ,  G11C7/1078

    摘要： DRAM and SRAM devices have a NAND interface mode (pins whose address and data are identical to one another are commonly used), directly being coupled to buses (an address/data bus and a control bus) of a NAND-type flash memory device that is connected to a microprocessor. Upon such a common interface mode, a DRAM device, an SRAM device, a NAND-type flash memory device, and a NOR-type flash memory device have the identical interface mode, and are independently (or individually) controlled by only one memory controller.

    摘要翻译： DRAM和SRAM器件具有NAND接口模式（其地址和数据彼此相同的引脚通常使用），直接耦合到NAND型闪存器件的总线（地址/数据总线和控制总线），其中 连接到微处理器。 在这样的公共接口模式下，DRAM器件，SRAM器件，NAND型闪速存储器件和NOR型闪速存储器件具有相同的接口模式，并且被独立（或单独地）仅由一个存储器控制器 。

    DELAY CIRCUIT AND METHOD FOR DRIVING THE SAME
    3.
    发明申请
    DELAY CIRCUIT AND METHOD FOR DRIVING THE SAME 有权
    延迟电路及其驱动方法

    公开(公告)号：US20110291727A1

    公开(公告)日：2011-12-01

    申请号：US12832470

    申请日：2010-07-08

    申请人： Tae-Kyun Kim

    发明人： Tae-Kyun Kim

    IPC分类号： H03K5/13

    CPC分类号： H03H11/265 ,  H03K5/05 ,  H03K5/1534 ,  H03K2005/00293 ,  H03L7/06

    摘要： A delay circuit includes a pulse generation unit configured to generate a pulse signal, which is activated in response to an input signal and has a pulse width corresponding to delay information, and an output unit configured to activate a final output signal in response to a deactivation of the pulse signal.

    摘要翻译： 延迟电路包括：脉冲发生单元，被配置为产生响应于输入信号被激活并具有对应于延迟信息的脉冲宽度的脉冲信号;以及输出单元，被配置为响应于去激活而激活最终输出信号 的脉冲信号。

    SEMICONDUCTOR DEVICE WITH RECESS GATE AND METHOD FOR FABRICATING THE SAME
    4.
    发明申请
    SEMICONDUCTOR DEVICE WITH RECESS GATE AND METHOD FOR FABRICATING THE SAME 失效
    具有凹槽的半导体器件及其制造方法

    公开(公告)号：US20100258861A1

    公开(公告)日：2010-10-14

    申请号：US12614543

    申请日：2009-11-09

    申请人： Seung-Mi Lee ,  Yun-Hyuck Ji ,  Tae-Kyun Kim ,  Jin-Yul Lee

    发明人： Seung-Mi Lee ,  Yun-Hyuck Ji ,  Tae-Kyun Kim ,  Jin-Yul Lee

    IPC分类号： H01L29/78 ,  H01L21/336

    CPC分类号： H01L29/66621 ,  H01L21/28114 ,  H01L21/28211 ,  H01L29/42368 ,  H01L29/66537 ,  H01L29/78

    摘要： A semiconductor device includes a substrate with a recess pattern, a gate electrode filling the recess pattern, a threshold voltage adjusting layer formed in the substrate under the recess pattern, a source/drain region formed in the substrate on both sides of the gate electrode and a gate insulation layer, with the recess pattern being disposed between the gate electrode and the substrate, wherein the thickness of the gate insulation layer formed in a region adjacent to the source/drain region is greater than the thickness of the gate insulation layer formed in a region adjacent to the threshold voltage adjusting layer.

    摘要翻译： 半导体器件包括具有凹陷图案的衬底，填充凹陷图案的栅电极，在凹槽图案下形成在衬底中的阈值电压调节层，形成在栅电极两侧的衬底中的源/漏区，以及 栅极绝缘层，其中凹部图案设置在栅电极和衬底之间，其中形成在与源极/漏极区相邻的区域中的栅极绝缘层的厚度大于形成在栅极绝缘层中的栅极绝缘层的厚度 与阈值电压调整层相邻的区域。

    Manual valve of a hydraulic pressure control system for an automatic transmission of a vehicle
    5.
    发明授权
    Manual valve of a hydraulic pressure control system for an automatic transmission of a vehicle 有权
    用于车辆自动变速器的液压控制系统的手动阀

    公开(公告)号：US06478050B2

    公开(公告)日：2002-11-12

    申请号：US09928423

    申请日：2001-08-14

    申请人： Jong-Sool Park ,  Chang-Wook Lee ,  Jae-Ho Cho ,  Jae-Duk Jang ,  Tae-Kyun Kim ,  Jin-Hee Lee

    发明人： Jong-Sool Park ,  Chang-Wook Lee ,  Jae-Ho Cho ,  Jae-Duk Jang ,  Tae-Kyun Kim ,  Jin-Hee Lee

    IPC分类号： F15B1307

    CPC分类号： F16H61/0276 ,  F16H61/0286 ,  Y10T137/8671 ,  Y10T477/69368

    摘要： A manual valve of a hydraulic pressure control system for an automatic transmission of a vehicle according to the present invention comprises a valve body provided with a line pressure receiving port, a P/N range port for supplying hydraulic pressure in more than one range of parking range P and neutral range N, a plurality of hydraulic pressure supplying ports and a plurality of exhaust ports; and a valve spool slidably inserted into the valve body and having a plurality of valve lands, a first valve land of said plurality of valve lands having a exhaust groove depressed toward a neighboring land, wherein: each width of the line pressure receiving port and the P/N range port is smaller than each diameter of said plurality of valve lands, whereby a tight seal is maintained when each of the line pressure receiving port and the P/N range port is blocked by said plurality of valve lands; and each width of the plurality of hydraulic pressure supplying ports is greater than each diameter of said plurality of valve lands, whereby hydraulic pressure reserved in each of said plurality of hydraulic pressure supplying ports is exhausted through the exhaust groove when blocked by the first land.

    摘要翻译： 根据本发明的用于车辆自动变速器的液压控制系统的手动阀包括具有管路压力接收口的阀体，用于在多于一个停车范围内供应液压的P / N范围端口 范围P和中立范围N，多个液压供给口和多个排气口; 以及阀芯，其可滑动地插入到所述阀体中并且具有多个阀座，所述多个阀岛的第一阀台具有朝向相邻的平台压下的排气槽，其中：所述管线压力接收口和 P / N范围端口小于所述多个阀岛的每个直径，由此当所述管路压力接收端口和所述P / N范围端口中的每一个被所述多个阀门区域阻挡时，保持紧密密封; 并且所述多个液压供给口的每个宽度大于所述多个阀台的每个直径，由此在所述多个液压供给口中的每一个中保留的液压在所述第一接地被阻挡时通过所述排气槽排出。

    Hydraulic control system for 4-speed automatic transmission
    6.
    发明授权
    Hydraulic control system for 4-speed automatic transmission 失效
    4速自动变速器液压控制系统

    公开(公告)号：US06206802B1

    公开(公告)日：2001-03-27

    申请号：US09375364

    申请日：1999-08-17

    申请人： Tae-Kyun Kim

    发明人： Tae-Kyun Kim

    IPC分类号： F16H6126

    CPC分类号： F16H61/12 ,  F16H61/0206 ,  F16H61/686 ,  F16H2061/1204 ,  F16H2061/1232 ,  F16H2061/1268 ,  Y10T477/6936 ,  Y10T477/693635

    摘要： A hydraulic control system for 4-speed automatic transmissions in which line pressure, drive pressure, reverse pressure and low pressure are selectively supplied from a manual valve to an underdrive clutch, an overdrive clutch, a low-reverse brake, a reverse clutch, and a second brake to realize four forward speeds and a reverse speed. The hydraulic control system includes an underdrive pressure control valve provided between a drive pressure line and the underdrive clutch, and controlled by a first solenoid valve; an overdrive pressure control valve provided between the drive pressure line and the overdrive clutch, and controlled by a second solenoid valve; a second/low-reverse pressure control valve connected to a line pressure line and controlled by a third solenoid valve; a solenoid switch valve controlled by low pressure, line pressure or drive pressure supplied respectively from a low pressure line, the line pressure line and the drive pressure line, and which supplies hydraulic pressure to the low-reverse brake and the second brake; and a fail-safe valve provided between the solenoid switch valve and the second/low-reverse pressure control valve, and is controlled by operational pressure of the underdrive clutch and overdrive clutch, line pressure, and drive or reverse pressure, the fail-safe valve preventing hydraulic pressure supplied from the second/low-reverse pressure control valve from being simultaneously supplied to the second brake and the low reverse brake. The reverse clutch is directly communicated with the manual valve via a reverse pressure line.

    摘要翻译： 一种用于4速自动变速器的液压控制系统，其中管路压力，驱动压力，反向压力和低压被选择性地从手动阀供应到欠驱动离合器，过驱动离合器，低倒档制动器，倒档离合器和 实现四个前进速度和倒车速度的第二个制动器。 液压控制系统包括设置在驱动压力管线和欠驱动离合器之间并由第一电磁阀控制的欠驱动压力控制阀; 设置在驱动压力线和过驱动离合器之间并由第二电磁阀控制的过驱动压力控制阀; 连接到管线压力管线并由第三电磁阀控制的第二/低反向压力控制阀; 分别由低压线路，线路压力线路和驱动压力线路供给的低压，线路压力或驱动压力控制的电磁开关阀，并向低速制动器和第二制动器供给液压; 以及一个设在电磁开关阀和第二/低反向压力控制阀之间的故障安全阀，并由低功率离合器和过载离合器的操作压力，管路压力和驱动或反向压力控制，故障安全 防止从第二/低反向压力控制阀供应的液压阀同时供给第二制动器和低倒档制动器的阀。 反向离合器通过反向压力管线与手动阀直接连通。

    Method for fabricating semiconductor device with recess gate
    8.
    发明授权
    Method for fabricating semiconductor device with recess gate 失效
    用于制造具有凹槽的半导体器件的方法

    公开(公告)号：US08232166B2

    公开(公告)日：2012-07-31

    申请号：US12614543

    申请日：2009-11-09

    申请人： Seung-Mi Lee ,  Yun-Hyuck Ji ,  Tae-Kyun Kim ,  Jin-Yul Lee

    发明人： Seung-Mi Lee ,  Yun-Hyuck Ji ,  Tae-Kyun Kim ,  Jin-Yul Lee

    IPC分类号： H01L21/336

    CPC分类号： H01L29/66621 ,  H01L21/28114 ,  H01L21/28211 ,  H01L29/42368 ,  H01L29/66537 ,  H01L29/78

    摘要： A semiconductor device includes a substrate with a recess pattern, a gate electrode filling the recess pattern, a threshold voltage adjusting layer formed in the substrate under the recess pattern, a source/drain region formed in the substrate on both sides of the gate electrode and a gate insulation layer, with the recess pattern being disposed between the gate electrode and the substrate, wherein the thickness of the gate insulation layer formed in a region adjacent to the source/drain region is greater than the thickness of the gate insulation layer formed in a region adjacent to the threshold voltage adjusting layer.

    摘要翻译： 半导体器件包括具有凹陷图案的衬底，填充凹陷图案的栅电极，在凹槽图案下形成在衬底中的阈值电压调节层，形成在栅电极两侧的衬底中的源/漏区，以及 栅极绝缘层，其中凹部图案设置在栅电极和衬底之间，其中形成在与源极/漏极区相邻的区域中的栅极绝缘层的厚度大于形成在栅极绝缘层中的栅极绝缘层的厚度 与阈值电压调整层相邻的区域。

    Delay locked loop circuit
    9.
    发明授权
    Delay locked loop circuit 有权
    延时锁定回路电路

    公开(公告)号：US07843240B2

    公开(公告)日：2010-11-30

    申请号：US12345744

    申请日：2008-12-30

    申请人： Tae-Kyun Kim

    发明人： Tae-Kyun Kim

    IPC分类号： H03L7/06

    CPC分类号： H03L7/087 ,  H03L7/0812

    摘要： A delay locked loop circuit includes a delay locking unit configured to output an internal clock by delaying a reference clock as much as a first delay amount in response to a phase comparison result of comparing a phase of the reference clock with a phase of a feedback clock that is generated based on delay modeling of a semiconductor memory device, and a noise sensor configured to control variation of the first delay amount caused by an external noise to be less than a second delay amount after locking the internal clock.

    摘要翻译： 延迟锁定环电路包括延迟锁定单元，其被配置为响应于将参考时钟的相位与反馈时钟的相位进行比较的相位比较结果，将参考时钟延迟多达第一延迟量来输出内部时钟 其是基于半导体存储器件的延迟建模产生的，并且被配置为在锁定内部时钟之后将由外部噪声引起的第一延迟量的变化控制为小于第二延迟量的噪声传感器。

    SEMICONDUCTOR DEVICE AND DRIVING METHOD THEREOF
    10.
    发明申请
    SEMICONDUCTOR DEVICE AND DRIVING METHOD THEREOF 失效
    半导体器件及其驱动方法

    公开(公告)号：US20100164577A1

    公开(公告)日：2010-07-01

    申请号：US12486831

    申请日：2009-06-18

    申请人： Tae-Kyun Kim

    发明人： Tae-Kyun Kim

    IPC分类号： H03L7/00

    CPC分类号： H03L7/00 ,  G11C7/1051 ,  G11C7/1066 ,  G11C7/22 ,  G11C7/222

    摘要： A semiconductor device includes a plurality of synchronization clock generators configured to generate a plurality of synchronization clock signals by mixing phases of first and second source clock signals having an identical frequency, a first clock transmission path configured to sequentially apply the first source clock signal to the plurality of synchronization clock generators by transferring the first source clock signal in a forward direction, a second clock transmission path configured to sequentially apply the second source clock signal to the plurality of synchronization clock generators by transferring the second source clock signal in a backward direction, and a plurality of data output units configured to synchronize a plurality of data with the plurality of synchronization clock signals and outputting the synchronized plurality of data.

    摘要翻译： 半导体器件包括多个同步时钟发生器，其被配置为通过混合具有相同频率的第一和第二源时钟信号的相位来产生多个同步时钟信号，第一时钟传输路径被配置为顺序地将第一源时钟信号施加到 多个同步时钟生成器，通过向正向传送第一源时钟信号;第二时钟传输路径，被配置为通过沿第二源时钟信号向后传送来顺序地将第二源时钟信号施加到多个同步时钟发生器， 以及多个数据输出单元，被配置为使多个数据与多个同步时钟信号同步并输出同步的多个数据。