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公开(公告)号:US11508596B2
公开(公告)日:2022-11-22
申请号:US16886115
申请日:2020-05-28
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Tsung-Sheng Kuo , Cheng-Lung Wu , Chih-Hung Huang , Yang-Ann Chu , Hsuan Lee , Jiun-Rong Pai
IPC: G03F1/66 , H01L21/677
Abstract: Apparatus and methods for automatically handling die carriers are disclosed. In one example, a disclosed apparatus includes: at least one load port each configured for loading a die carrier operable to hold a plurality of dies; and an interface tool coupled to the at least one load port and a semiconductor processing unit. The interface tool comprises: a first robotic arm configured for transporting the die carrier from the at least one load port to the interface tool, and a second robotic arm configured for transporting the die carrier from the interface tool to the semiconductor processing unit for processing at least one die in the die carrier.
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公开(公告)号:US11295973B2
公开(公告)日:2022-04-05
申请号:US16787028
申请日:2020-02-11
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ren-Hau Wu , Cheng-Lung Wu , Jiun-Rong Pai , Cheng-Kang Hu
IPC: H01L21/677 , H01L21/67
Abstract: An apparatus and an operating method for automated wafer carrier handling are provided. The apparatus includes a base frame and an engaging mechanism disposed on the base frame. The engaging mechanism includes a controller and an active expansion component moveably coupled to the base frame and controlled by the controller to perform a reciprocating movement relative to the base frame. The active expansion component is driven by the controller to pass through the base frame to be engaged with a top flange mounted on the wafer carrier.
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公开(公告)号:US20210375653A1
公开(公告)日:2021-12-02
申请号:US16886115
申请日:2020-05-28
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Tsung-Sheng KUO , Cheng-Lung Wu , Chih-Hung Huang , Yang-Ann Chu , Hsuan Lee , Jiun-Rong Pai
IPC: H01L21/677
Abstract: Apparatus and methods for automatically handling die carriers are disclosed. In one example, a disclosed apparatus includes: at least one load port each configured for loading a die carrier operable to hold a plurality of dies; and an interface tool coupled to the at least one load port and a semiconductor processing unit. The interface tool comprises: a first robotic arm configured for transporting the die carrier from the at least one load port to the interface tool, and a second robotic arm configured for transporting the die carrier from the interface tool to the semiconductor processing unit for processing at least one die in the die carrier.
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公开(公告)号:US20230063707A1
公开(公告)日:2023-03-02
申请号:US17984096
申请日:2022-11-09
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Tsung-Sheng Kuo , Cheng-Lung Wu , Chih-Hung Huang , Yang-Ann Chu , Hsuan Lee , Jiun-Rong Pai
IPC: H01L21/677
Abstract: Apparatus and methods for automatically handling die carriers are disclosed. In one example, a disclosed apparatus includes: at least one load port each configured for loading a die carrier operable to hold a plurality of dies; and an interface tool coupled to the at least one load port and a semiconductor processing unit. The interface tool comprises: a first robotic arm configured for transporting the die carrier from the at least one load port to the interface tool, and a second robotic arm configured for transporting the die carrier from the interface tool to the semiconductor processing unit for processing at least one die in the die carrier.
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公开(公告)号:US09899441B1
公开(公告)日:2018-02-20
申请号:US15337224
申请日:2016-10-28
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yu-Hung Cheng , Cheng-Lung Wu , Tung-I Lin , Yeur-Luen Tu
IPC: H01L31/0232 , H01L27/146
CPC classification number: H01L27/1463 , H01L27/1462 , H01L27/14621 , H01L27/14627 , H01L27/14645 , H01L27/14689 , H01L27/14698
Abstract: A method for manufacturing a deep trench isolation (DTI) structure with a tri-layer passivation layer is provided. An etch is performed into a semiconductor substrate to form a trench. A first undoped semiconductor layer is formed by epitaxy lining surfaces of the semiconductor substrate that define the trench. A doped semiconductor layer is formed by epitaxy over and lining the first undoped semiconductor layer in the trench. A second undoped semiconductor layer is formed by epitaxy over and lining the doped semiconductor layer in the trench. A structure resulting from the method is also provided.
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公开(公告)号:US20210249282A1
公开(公告)日:2021-08-12
申请号:US16787028
申请日:2020-02-11
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ren-Hau Wu , Cheng-Lung Wu , Jiun-Rong Pai , Cheng-Kang Hu
IPC: H01L21/677 , H01L21/67
Abstract: An apparatus and an operating method for automated wafer carrier handling are provided. The apparatus includes a base frame and an engaging mechanism disposed on the base frame. The engaging mechanism includes a controller and an active expansion component moveably coupled to the base frame and controlled by the controller to perform a reciprocating movement relative to the base frame. The active expansion component is driven by the controller to pass through the base frame to be engaged with a top flange mounted on the wafer carrier.
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