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公开(公告)号：US12094728B2
公开(公告)日：2024-09-17
申请号：US18324686
申请日：2023-05-26
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Zi-Jheng Liu , Yu-Hsiang Hu , Jo-Lin Lan , Sih-Hao Liao , Chen-Cheng Kuo , Hung-Jui Kuo , Chung-Shi Liu , Chen-Hua Yu , Meng-Wei Chou
CPC classification number: H01L21/561 , H01L24/19 , H01L24/20 , H01L24/97 , H01L25/105 , H01L25/50 , H01L21/568 , H01L2224/04105 , H01L2224/12105 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/73267 , H01L2224/92244 , H01L2225/0651 , H01L2225/06568 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2924/15311
Abstract: A semiconductor device and method that comprise a first dielectric layer over a encapsulant that encapsulates a via and a semiconductor die is provided. A redistribution layer is over the first dielectric layer, and a second dielectric layer is over the redistribution layer, and the second dielectric layer comprises a low-temperature polyimide material.
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公开(公告)号：US11699598B2
公开(公告)日：2023-07-11
申请号：US17120458
申请日：2020-12-14
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Zi-Jheng Liu , Yu-Hsiang Hu , Jo-Lin Lan , Sih-Hao Liao , Chen-Cheng Kuo , Hung-Jui Kuo , Chung-Shi Liu , Chen-Hua Yu , Meng-Wei Chou
CPC classification number: H01L21/561 , H01L24/19 , H01L24/20 , H01L24/97 , H01L25/105 , H01L25/50 , H01L21/568 , H01L2224/04105 , H01L2224/12105 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/73267 , H01L2224/92244 , H01L2225/0651 , H01L2225/06568 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2924/15311 , H01L2224/48091 , H01L2924/00014 , H01L2224/73265 , H01L2224/32225 , H01L2224/48227 , H01L2924/00 , H01L2224/73265 , H01L2224/32145 , H01L2224/48227 , H01L2924/00 , H01L2924/15311 , H01L2224/73265 , H01L2224/32225 , H01L2224/48227 , H01L2924/00
Abstract: A semiconductor device and method that comprise a first dielectric layer over a encapsulant that encapsulates a via and a semiconductor die is provided. A redistribution layer is over the first dielectric layer, and a second dielectric layer is over the redistribution layer, and the second dielectric layer comprises a low-temperature polyimide material.
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公开(公告)号：US10204870B2
公开(公告)日：2019-02-12
申请号：US15289173
申请日：2016-10-08
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor： Zi-Jheng Liu , Jo-Lin Lan , Yu-Hsiang Hu , Hung-Jui Kuo
IPC: H01L23/544 , H01L23/538 , H01L23/00 , H01L23/58 , H01L21/48 , H01L21/78 , H01L23/31 , H01L21/56
Abstract: A method of manufacturing a semiconductor device includes: receiving a semiconductor structure having a chip region, a seal ring region surrounding the chip region, and a scribe region surroundingly defined around the seal ring region, the semiconductor structure including: a semiconductor chip in the chip region; and a molding compound disposed around the semiconductor chip and distributed in the chip region, the seal ring region and the scribe region; forming an insulating film over the chip region of the semiconductor structure and the seal ring region of the semiconductor structure; forming a seal ring over the seal ring region of the semiconductor structure and laterally adjacent to the insulating film, in which the seal ring has an exposed lateral surface facing away from the insulating film; and forming a protective layer that defines a substantially smooth and inclined lateral surface over the exposed lateral surface of the seal ring.
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Patent Agency Ranking
公开(公告)号：US11817399B2
公开(公告)日：2023-11-14
申请号：US17340036
申请日：2021-06-06
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor： Zi-Jheng Liu , Jo-Lin Lan , Yu-Hsiang Hu , Hung-Jui Kuo
IPC: H01L23/538 , H01L21/683 , H01L23/00 , H01L23/58 , H01L23/544 , H01L21/48 , H01L21/78 , H01L23/31 , H01L21/56
CPC classification number: H01L23/562 , H01L21/486 , H01L21/4857 , H01L21/6835 , H01L21/78 , H01L23/3128 , H01L23/5383 , H01L23/5384 , H01L23/5389 , H01L23/544 , H01L23/585 , H01L21/4853 , H01L21/561 , H01L21/568 , H01L23/5386 , H01L23/564 , H01L2221/68345 , H01L2221/68359 , H01L2223/5446 , H01L2224/04105 , H01L2224/12105 , H01L2224/19 , H01L2224/73267 , H01L2224/92244
Abstract: A device includes a semiconductor chip, a molding compound, an insulating structure, an under-bump-metallurgy (UBM), a conductive ball, and a protection layer. The molding compound laterally surrounds the semiconductor chip. The insulating structure is over the semiconductor chip and the molding compound. The UBM is over the insulating structure and is electrically connected to the semiconductor chip. The conductive ball is in contact with the UBM. The protection layer extends from the UBM to the molding compound.
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公开(公告)号：US20230307251A1
公开(公告)日：2023-09-28
申请号：US18324686
申请日：2023-05-26
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Zi-Jheng Liu , Yu-Hsiang Hu , Jo-Lin Lan , Sih-Hao Liao , Chen-Cheng Kuo , Hung-Jui Kuo , Chung-Shi Liu , Chen-Hua Yu , Meng-Wei Chou
CPC classification number: H01L21/561 , H01L24/19 , H01L24/20 , H01L24/97 , H01L25/105 , H01L25/50 , H01L21/568 , H01L2224/04105 , H01L2224/12105 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/73267 , H01L2224/92244 , H01L2225/0651 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2924/15311 , H01L2225/06568
Abstract: A semiconductor device and method that comprise a first dielectric layer over a encapsulant that encapsulates a via and a semiconductor die is provided. A redistribution layer is over the first dielectric layer, and a second dielectric layer is over the redistribution layer, and the second dielectric layer comprises a low-temperature polyimide material.
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公开(公告)号：US20240395566A1
公开(公告)日：2024-11-28
申请号：US18790326
申请日：2024-07-31
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Zi-Jheng Liu , Yu-Hsiang Hu , Jo-Lin Lan , Sih-Hao Liao , Chen-Cheng Kuo , Hung-Jui Kuo , Chung-Shi Liu , Chen-Hua Yu , Meng-Wei Chou
Abstract: A semiconductor device and method that comprise a first dielectric layer over a encapsulant that encapsulates a via and a semiconductor die is provided. A redistribution layer is over the first dielectric layer, and a second dielectric layer is over the redistribution layer, and the second dielectric layer comprises a low-temperature polyimide material.
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公开(公告)号：US11031351B2
公开(公告)日：2021-06-08
申请号：US16272935
申请日：2019-02-11
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor： Zi-Jheng Liu , Jo-Lin Lan , Yu-Hsiang Hu , Hung-Jui Kuo
IPC: H01L23/31 , H01L23/538 , H01L23/00 , H01L23/58 , H01L23/544 , H01L21/48 , H01L21/78 , H01L21/683 , H01L21/56
Abstract: A method includes forming an insulating film over a semiconductor structure, forming a sealing ring over a sidewall of the insulating film, and forming a protective layer over an exposed sidewall of the sealing ring. The semiconductor structure includes a semiconductor chip and a molding compound disposed around the semiconductor chip. The exposed sidewall of the sealing ring faces away from the sidewall of the insulating film.
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公开(公告)号：US20210134611A1
公开(公告)日：2021-05-06
申请号：US17120458
申请日：2020-12-14
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Zi-Jheng Liu , Yu-Hsiang Hu , Jo-Lin Lan , Sih-Hao Liao , Chen-Cheng Kuo , Hung-Jui Kuo , Chung-Shi Liu , Chen-Hua Yu , Meng-Wei Chou
Abstract: A semiconductor device and method that comprise a first dielectric layer over a encapsulant that encapsulates a via and a semiconductor die is provided. A redistribution layer is over the first dielectric layer, and a second dielectric layer is over the redistribution layer, and the second dielectric layer comprises a low-temperature polyimide material.
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