公开(公告)号：US11271111B2

公开(公告)日：2022-03-08

申请号：US16405057

申请日：2019-05-07

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ting-Chun Kuan ,  I-Chih Chen ,  Chih-Mu Huang ,  Fu-Tsun Tsai ,  Sheng-Lin Hsieh ,  Kuan-Jung Chen

IPC: H01L29/78 ,  H01L21/8234 ,  H01L21/02 ,  H01L29/66 ,  H01L21/768 ,  H01L27/088

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate and a gate structure over the substrate. The semiconductor device structure also includes a source/drain feature in the substrate, protruding from the substrate, and on a sidewall surface of the gate structure. The semiconductor device structure also includes an insulating barrier structure in the substrate and partially covering the bottom and sidewalls of the source/drain feature.

公开(公告)号：US20190139956A1

公开(公告)日：2019-05-09

申请号：US16151329

申请日：2018-10-03

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kuan-Jung Chen ,  I-Chih Chen ,  Chih-Mu Huang ,  Kai-Di Wu ,  Ming-Feng Lee ,  Ting-Chun Kuan

IPC: H01L27/088 ,  H01L29/10 ,  H01L29/423 ,  H01L21/8234 ,  H01L29/66

Abstract: A semiconductor device includes a semiconductor substrate having a first region and a second region, insulators, gate stacks, and first and second S/Ds. The first and second regions respectively includes at least one first semiconductor fin and at least one second semiconductor fin. A width of a middle portion of the first semiconductor fin is equal to widths of end portions of the first semiconductor fin. A width of a middle portion of the second semiconductor fin is smaller than widths of end portions of the second semiconductor fin. The insulators are disposed on the semiconductor substrate. The first and second semiconductor fins are sandwiched by the insulators. The gate stacks are over a portion of the first semiconductor fin and a portion of the second semiconductor fin. The first and second S/Ds respectively covers another portion of the first semiconductor fin and another portion of the second semiconductor fin.

公开(公告)号：US10153278B1

公开(公告)日：2018-12-11

申请号：US15717972

申请日：2017-09-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Sheng-Lin Hsieh ,  I-Chih Chen ,  Chih-Mu Huang ,  Ching-Pin Lin ,  Ru-Shang Hsiao ,  Ting-Chun Kuan

IPC: H01L27/08 ,  H01L27/088 ,  H01L29/10 ,  H01L29/08 ,  H01L21/306 ,  H01L21/8234 ,  H01L21/762 ,  H01L29/66 ,  H01L21/02 ,  H01L21/311 ,  H01L29/06 ,  H01L29/167 ,  H01L21/308 ,  H01L29/78 ,  H01L29/165

Abstract: A fin-type field effect transistor comprising a substrate, at least one gate stack, spacers and epitaxy material portions is described. The substrate has fins and insulators located between the fins, and the fins comprise channel portions and flank portions beside the channel portions, the flank portions and the channel portions of the fins are protruded from the insulators, the flank portions of the fins and the channel portions of the fins have substantially a same height from top surfaces of the insulators, and each of the flank portions of the fins has a top surface and side surfaces adjoining the top surface. The at least one gate stack is disposed over the substrate, disposed on the insulators and over the channel portions of the fins. The spacers are disposed on the side surfaces of the flank portions of the fins. The epitaxy material portions are located above the top surfaces of the flank portions of the fins.

公开(公告)号：US10056455B1

公开(公告)日：2018-08-21

申请号：US15800097

申请日：2017-11-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ting-Chun Kuan ,  I-Chih Chen ,  Chih-Mu Huang ,  Ching-Pin Lin ,  Fu-Tsun Tsai ,  Ru-Shang Hsiao

IPC: H01L29/06 ,  H01L29/08 ,  H01L27/088 ,  H01L21/02 ,  H01L23/532 ,  H01L29/10 ,  H01L29/423

CPC classification number: H01L29/0843 ,  H01L21/02107 ,  H01L21/0243 ,  H01L21/02639 ,  H01L23/53295 ,  H01L27/088 ,  H01L27/0883 ,  H01L29/0642 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1079 ,  H01L29/1083 ,  H01L29/42312 ,  H01L29/42316 ,  H01L29/4232

Abstract: A semiconductor device including a substrate, a gate stack, a pair of insulator structures, and source/drain materials is provided. The substrate has a plurality of recesses, wherein the plurality of recesses defines a protruded portion of the substrate having a channel region, and the protruded portion has a first side surface and a second side surface opposite to the first side surface. The gate stack is disposed on the protruded portion of the substrate. The pair of insulator structures are disposed within the plurality of recesses and respectively covering parts of the first side surface and the second side surface of the protruded portion, wherein the channel region is uncovered by the pair of insulator structures. The source/drain materials are disposed on the substrate in the plurality of recesses and on two opposing sides of the channel region, wherein the source/drain materials cover the pair of insulator structures.