公开(公告)号：US11662661B2

公开(公告)日：2023-05-30

申请号：US17119668

申请日：2020-12-11

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yun-Yue Lin

IPC: G03F1/64 ,  G03F7/20

CPC classification number: G03F1/64 ,  G03F7/70983

Abstract: A reticle structure includes a reticle having patterned features and a first border section enclosing the patterned features. The reticle structure includes a membrane having a middle section a second border section enclosing the middle section. The reticle structure includes a frame disposed between the membrane and the reticle to mount the membrane over the patterned features of the reticle. The frame creates an enclosure between the reticle and the membrane and encircles the patterned features of the reticle. The frame includes a plurality of holes and the plurality of holes produces a threshold percentage of opening in the frame to maintain an equalized pressure difference between the enclosure and outside the enclosure below a threshold pressure.

公开(公告)号：US11500282B2

公开(公告)日：2022-11-15

申请号：US17108906

申请日：2020-12-01

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yun-Yue Lin

IPC: G03F1/24

Abstract: A reflective mask includes a substrate, a reflective multilayer disposed over the substrate, a capping layer disposed over the reflective multilayer, an intermediate layer disposed over the capping layer, an absorber layer disposed over the intermediate layer, and a cover layer disposed over the absorber layer. The absorber layer includes one or more layers of an Ir based material, a Pt based material or a Ru based material.

公开(公告)号：US20210033963A1

公开(公告)日：2021-02-04

申请号：US16775634

申请日：2020-01-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yun-Yue Lin

IPC: G03F1/64 ,  H01L21/683 ,  G03F1/62 ,  G03F1/24 ,  G03F7/20 ,  G03F1/70 ,  H01L21/033

Abstract: The present disclosure provides an apparatus for a semiconductor lithography process. The apparatus includes a mask defining a circuit pattern to be transferred. The apparatus further includes a pellicle including a pattern formed in a first surface, wherein the pellicle is attached to the mask at the first surface. The apparatus also includes an adhesive material layer disposed between the mask and the first surface. The pattern may include a plurality of capillaries. Each capillary of the plurality of capillaries may have a dimension in a plane of the first surface between about 1 μm and about 500 μm. Each capillary of the plurality of capillaries may have a ratio of depth to width greater than or equal to about 100. The adhesive material layer may include an adhesive having a glass transition temperature (Tg) greater than room temperature.

公开(公告)号：US12253797B2

公开(公告)日：2025-03-18

申请号：US18360030

申请日：2023-07-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yun-Yue Lin

IPC: G03F1/64 ,  G03F7/00

Abstract: The present disclosure provides an apparatus for a semiconductor lithography process. The apparatus includes a mask defining a circuit pattern to be transferred. The apparatus further includes a pellicle including a pattern formed in a first surface, wherein the pellicle is attached to the mask at the first surface. The apparatus also includes an adhesive material layer disposed between the mask and the first surface. The pattern may include a plurality of capillaries. Each capillary of the plurality of capillaries may have a dimension in a plane of the first surface between about 1 μm and about 500 μm. Each capillary of the plurality of capillaries may have a ratio of depth to width greater than or equal to about 100. The adhesive material layer may include an adhesive having a glass transition temperature (Tg) greater than room temperature.

公开(公告)号：US12007685B2

公开(公告)日：2024-06-11

申请号：US17461323

申请日：2021-08-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yun-Yue Lin

IPC: G03F1/64 ,  G03F1/22

CPC classification number: G03F1/64 ,  G03F1/22

Abstract: A method for forming a structure of a pellicle-mask structure is provided. The method includes bonding a pellicle frame to a mask through a pellicle frame adhesive. The method also includes forming a vent structure in the pellicle frame. The method further includes bonding a pellicle membrane to the pellicle frame through a pellicle membrane adhesive. A first size of the pellicle membrane adhesive is greater than a second size of the pellicle frame adhesive.

公开(公告)号：US11789355B2

公开(公告)日：2023-10-17

申请号：US17216526

申请日：2021-03-29

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yun-Yue Lin

IPC: G03F1/22 ,  G03F1/54 ,  G03F1/24 ,  G03F1/38

CPC classification number: G03F1/22 ,  G03F1/24 ,  G03F1/38 ,  G03F1/54

Abstract: A method of manufacturing an extreme ultraviolet mask, including forming a multilayer Mo/Si stack including alternating Mo and Si layers over a first major surface of a mask substrate, and forming a capping layer over the multilayer Mo/Si stack. An absorber layer is formed on the capping layer, and a hard mask layer is formed over the absorber layer. The hard mask layer is patterned to form a hard mask layer pattern. The hard mask layer pattern is extended into the absorber layer to expose the capping layer and form a mask pattern. A border pattern is formed around the mask pattern. The border pattern is extended through the multilayer Mo/Si stack to expose the mask substrate and form a trench surrounding the mask pattern. A passivation layer is formed along sidewalls of the trench.

公开(公告)号：US11762282B2

公开(公告)日：2023-09-19

申请号：US17815070

申请日：2022-07-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yun-Yue Lin

IPC: G03F1/64 ,  G03F7/00 ,  G03F7/20

CPC classification number: G03F1/64 ,  G03F7/70733

Abstract: The present disclosure provides an apparatus for a semiconductor lithography process. The apparatus includes a mask defining a circuit pattern to be transferred. The apparatus further includes a pellicle including a pattern formed in a first surface, wherein the pellicle is attached to the mask at the first surface. The apparatus also includes an adhesive material layer disposed between the mask and the first surface. The pattern may include a plurality of capillaries. Each capillary of the plurality of capillaries may have a dimension in a plane of the first surface between about 1 μm and about 500 μm. Each capillary of the plurality of capillaries may have a ratio of depth to width greater than or equal to about 100. The adhesive material layer may include an adhesive having a glass transition temperature (Tg) greater than room temperature.

公开(公告)号：US10747103B2

公开(公告)日：2020-08-18

申请号：US16228339

申请日：2018-12-20

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yun-Yue Lin ,  Hsuan-Chen Chen ,  Chih-Cheng Lin ,  Hsin-Chang Lee ,  Yao-Ching Ku ,  Wei-Jen Lo ,  Anthony Yen ,  Chin-Hsiang Lin ,  Mark Chien

IPC: G03F1/62 ,  G03F1/24

Abstract: A method for fabricating a pellicle includes forming a first dielectric layer over a back surface of a substrate. After forming the first dielectric layer, and in some embodiments, a graphene layer is formed over a front surface of the substrate. In some examples, after forming the graphene layer, the first dielectric layer is patterned to form an opening in the first dielectric layer that exposes a portion of the back surface of the substrate. Thereafter, while using the patterned first dielectric layer as a mask, an etching process may be performed to the back surface of the substrate to form a pellicle having a pellicle membrane that includes the graphene layer.

公开(公告)号：US10001701B1

公开(公告)日：2018-06-19

申请号：US15380121

申请日：2016-12-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Pei-Cheng Hsu ,  Hsin-Chang Lee ,  Yun-Yue Lin ,  Hsuan-Chen Chen ,  Hsuan-I Wang ,  Anthony Yen

IPC: G03F1/62 ,  G03F1/64 ,  G03F1/22 ,  G03F7/20

Abstract: A structure including an EUV mask and a pellicle attached to the EUV mask. The pellicle includes a pellicle frame and a plurality of pellicle membrane layers attached to the pellicle frame. The plurality of pellicle membrane layers include at least one core pellicle membrane layer and an additional pellicle membrane layer is disposed on the at least one core pellicle membrane layer. In some embodiments, the additional pellicle membrane layer is a material having a thermal emissivity greater than 0.2, a transmittance greater than 80%, and a refractive index (n) for 13.5 nanometer source of greater than 0.9.

公开(公告)号：US12253796B2

公开(公告)日：2025-03-18

申请号：US18545948

申请日：2023-12-19

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yun-Yue Lin

IPC: G03F1/24

Abstract: A photolithography mask includes a substrate, a reflective multilayer structure over the substrate, an adhesion layer over the reflective multilayer structure, a capping layer over the adhesion layer, and a patterned absorber layer over the capping layer. The capping layer includes a non-crystalline conductive material.