公开(公告)号：US20220367318A1

公开(公告)日：2022-11-17

申请号：US17874274

申请日：2022-07-26

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Yang-Che CHEN ,  Chen-Hua LIN ,  Huang-Wen TSENG ,  Victor Chiang LIANG ,  Chwen-Ming LIU

IPC分类号： H01L23/373 ,  H01L23/00 ,  H01L23/367

摘要： A method includes forming a solder layer on a surface of one or more chips. A lid is positioned over the solder layer on each of the one or more chips. Heat and pressure are applied to melt the solder layer and attach each lid to a corresponding solder layer. The solder layer has a thermal conductivity of ≥50 W/mK.

公开(公告)号：US20230387182A1

公开(公告)日：2023-11-30

申请号：US18447482

申请日：2023-08-10

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Wei-Yu CHOU ,  Yang-Che CHEN ,  Chen-Hua LIN ,  Victor Chiang LIANG ,  Huang-Wen TSENG ,  Chwen-Ming LIU

IPC分类号： H01F41/34 ,  H01L23/522 ,  H01L27/08

CPC分类号： H01L28/10 ,  H01F41/34 ,  H01L23/5227 ,  H01L27/08

摘要： An inductive device includes an insulating layer, a lower magnetic layer, and an upper magnetic layer that are formed such that the insulating layer does not separate the lower magnetic layer and the upper magnetic layer at the outer edges or wings of the inductive device. The lower magnetic layer and the upper magnetic layer form a continuous magnetic layer around the insulating layer and the conductors of the inductive device. Magnetic leakage paths are provided by forming openings through the upper magnetic layer. The openings may be formed through the upper magnetic layer by semiconductor processes that have relatively higher precision and accuracy compared to semiconductor processes for forming the insulating layer such as spin coating. This reduces magnetic leakage path variation within the inductive device and from inductive device to inductive device.

公开(公告)号：US20220231116A1

公开(公告)日：2022-07-21

申请号：US17658266

申请日：2022-04-07

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Wei-Yu CHOU ,  Yang-Che CHEN ,  Chen-Hua LIN ,  Victor Chiang LIANG ,  Huang-Wen TSENG ,  Chwen-Ming LIU

IPC分类号： H01L49/02 ,  H01F41/34

摘要： An inductive device includes an insulating layer, a lower magnetic layer, and an upper magnetic layer that are formed such that the insulating layer does not separate the lower magnetic layer and the upper magnetic layer at the outer edges or wings of the inductive device. The lower magnetic layer and the upper magnetic layer form a continuous magnetic layer around the insulating layer and the conductors of the inductive device. Magnetic leakage paths are provided by forming openings through the upper magnetic layer. The openings may be formed through the upper magnetic layer by semiconductor processes that have relatively higher precision and accuracy compared to semiconductor processes for forming the insulating layer such as spin coating. This reduces magnetic leakage path variation within the inductive device and from inductive device to inductive device.

公开(公告)号：US20240312851A1

公开(公告)日：2024-09-19

申请号：US18671330

申请日：2024-05-22

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yang-Che CHEN ,  Chen-Hua LIN ,  Huang-Wen TSENG ,  Victor Chiang LIANG ,  Chwen-Ming LIU

IPC分类号： H01L23/04 ,  H01L21/52 ,  H01L21/60 ,  H01L23/00 ,  H01L23/06 ,  H01L23/14 ,  H01L23/498

CPC分类号： H01L23/04 ,  H01L21/52 ,  H01L23/06 ,  H01L23/14 ,  H01L23/49816 ,  H01L24/14 ,  H01L2021/60022

摘要： A semiconductor package includes a semiconductor chip disposed over a first main surface of a first substrate, a package lid disposed over the semiconductor chip, and spacers extending from the package lid through corresponding holes in the first substrate. The spacers enter the holes at a first main surface of the first substrate and extend beyond an opposing second main surface of the first substrate.

公开(公告)号：US20220384281A1

公开(公告)日：2022-12-01

申请号：US17885401

申请日：2022-08-10

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Yang-Che CHEN ,  Chen-Hua LIN ,  Huang-Wen TSENG ,  Victor Chiang LIANG ,  Chwen-Ming LIU

IPC分类号： H01L23/04 ,  H01L21/52 ,  H01L23/498 ,  H01L23/00 ,  H01L23/06 ,  H01L23/14

摘要： A semiconductor package includes a semiconductor chip disposed over a first main surface of a first substrate, a package lid disposed over the semiconductor chip, and spacers extending from the package lid through corresponding holes in the first substrate. The spacers enter the holes at a first main surface of the first substrate and extend beyond an opposing second main surface of the first substrate.

公开(公告)号：US20240262681A1

公开(公告)日：2024-08-08

申请号：US18640142

申请日：2024-04-19

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yang-Che CHEN ,  Victor Chiang LIANG ,  Chen-Hua LIN ,  Chwen-Ming LIU ,  Huang-Wen TSENG ,  Yi-Chuan TENG

IPC分类号： B81B7/04 ,  B81C1/00 ,  B81C3/00

CPC分类号： B81B7/04 ,  B81C3/001 ,  B81B2201/033 ,  B81B2203/0136 ,  B81B2203/0307 ,  B81B2203/04 ,  B81C1/00357 ,  B81C1/00468 ,  B81C1/00476 ,  B81C1/00484 ,  B81C2201/0132 ,  B81C2203/038

摘要： A micro electro mechanical system (MEMS) includes a circuit substrate, a first MEMS structure disposed over the circuit substrate, and a second MEMS structure disposed over the first MEMS structure.

公开(公告)号：US20220194783A1

公开(公告)日：2022-06-23

申请号：US17694296

申请日：2022-03-14

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Yang-Che CHEN ,  Victor Chiang LIANG ,  Chen-Hua LIN ,  Chwen-Ming LIU ,  Huang-Wen TSENG ,  Yi-Chuan TENG

IPC分类号： B81B7/04 ,  B81C3/00

摘要： A micro electro mechanical system (MEMS) includes a circuit substrate, a first MEMS structure disposed over the circuit substrate, and a second MEMS structure disposed over the first MEMS structure.