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公开(公告)号：US11942392B2
公开(公告)日：2024-03-26
申请号：US17583158
申请日：2022-01-24
发明人： Jaw-Juinn Horng , Szu-Lin Liu , Wei-Lin Lai
IPC分类号： H01L23/367 , H01L23/00
CPC分类号： H01L23/3677 , H01L24/45 , H01L2224/4807 , H01L2224/48227 , H01L2924/14
摘要： An IC device includes first and second resistors. The first resistor includes first and second metal segments extending in a first direction in a first metal layer, and a third metal segment extending in a second direction in a second metal layer, and electrically connecting the first and second metal segments. The second resistor includes fourth and fifth metal segments extending in the first direction in the first metal layer, and a sixth metal segment extending in the second direction in a third metal layer, and electrically connecting the fourth and fifth metal segments. The fourth and fifth metal segment have a width greater than a width of the first and second metal segments, the fourth metal segment is between the first and second metal segments and separated from the first metal segment by a distance, and a fourth and fifth metal segment separation is greater than the distance.
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2.发明公开公开(公告)号：US20230384170A1
公开(公告)日：2023-11-30
申请号：US18170401
申请日：2023-02-16
发明人： Szu-Lin Liu , Wei-Lin Lai , Bei-Shing Lien
摘要： Disclosed herein are related to a device and a method for sensing a temperature. In one aspect, the device includes a first resistor including a first metal rail in a first layer. The first metal rail may have a first thermal-resistance coefficient. In one aspect, the device includes a second resistor including a second metal rail in a second layer above the first layer along a direction. The second metal rail may have a second thermal-resistance coefficient. In one aspect, the device includes a sensing circuit coupled to the first resistor and the second resistor. The sensing circuit may be configured to determine a temperature, according to the first metal rail having the first thermal-resistance coefficient and the second metal rail having the second thermal-resistance coefficient.
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公开(公告)号：US11709200B2
公开(公告)日：2023-07-25
申请号：US17876692
申请日：2022-07-29
发明人： Szu-Lin Liu , Jaw-Juinn Horng
CPC分类号： G01R31/2875 , G01R1/0458
摘要： A method of calibrating a thermal sensor device is provided. The method includes extracting an incremental voltage to temperature curve for a diode array from a first incremental voltage of the diode array at a first temperature. The diode array and a device under test (DUT) which includes a thermal sensor are heated. After heating the diode array, a first incremental temperature is determined from the incremental voltage to temperature curve for the diode array and a second incremental voltage of the diode array after heating the diode array. An incremental voltage to temperature curve is extracted for the DUT from the first incremental temperature, a first incremental voltage for the DUT at the first temperature, and a second incremental voltage of the DUT after heating the device under test. A temperature error for the thermal sensor is determined from the incremental voltage to temperature curve for the DUT.
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公开(公告)号：US11687698B2
公开(公告)日：2023-06-27
申请号：US17702625
申请日：2022-03-23
发明人： Hsien Yu Tseng , Amit Kundu , Chun-Wei Chang , Szu-Lin Liu , Sheng-Feng Liu
IPC分类号： G06F30/398 , H01L29/78 , G06F111/20 , G06F119/08 , G06F119/10
CPC分类号： G06F30/398 , G06F2111/20 , G06F2119/08 , G06F2119/10 , H01L29/785
摘要： An electromigration (EM) sign-off methodology that analyzes an integrated circuit design layout to identify heat sensitive structures, self-heating effects, heat generating structures, and heat dissipating structures. The EM sign-off methodology includes adjustments of an evaluation temperature for a heat sensitive structure by calculating the effects of self-heating within the temperature sensitive structure as well as additional heating and/or cooling as a function of thermal coupling to surrounding heat generating structures and/or heat sink elements located within a defined thermal coupling volume or range.
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公开(公告)号：US20220364936A1
公开(公告)日：2022-11-17
申请号：US17874476
申请日：2022-07-27
发明人： Jaw-Juinn Horng , Szu-Lin Liu
摘要： A thermal sensor in some embodiments comprises two temperature-sensitive branches, each including a thermal-sensing device, such as one or more bipolar-junction transistors, and a current source for generating a current density in the thermal-sensing device to generate a temperature-dependent signal. The thermal sensor further includes a signal processor configured to multiply the temperature-dependent signal from the branches by respective and different gain factors, and combine the resultant signals to generate an output signal that is substantially proportional to the absolute temperature the thermal sensor is disposed at.
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公开(公告)号：US12099792B2
公开(公告)日：2024-09-24
申请号：US18341400
申请日：2023-06-26
发明人： Hsien Yu Tseng , Amit Kundu , Chun-Wei Chang , Szu-Lin Liu , Sheng-Feng Liu
IPC分类号： G06F30/398 , G06F111/20 , G06F119/08 , G06F119/10 , H01L29/78
CPC分类号： G06F30/398 , G06F2111/20 , G06F2119/08 , G06F2119/10 , H01L29/785
摘要： An electromigration (EM) sign-off methodology that utilizes a system for analyzing an integrated circuit design layout to identify heat sensitive structures, self-heating effects, heat generating structures, and heat dissipating structures. The EM sign-off methodology includes a memory and a processor configured for calculating adjustments of an evaluation temperature for a heat sensitive structure by calculating the effects of self-heating within the temperature sensitive structure as well as additional heating and/or cooling as a function of thermal coupling to surrounding heat generating structures and/or heat dissipating elements located within a defined thermal coupling volume or range of the heat sensitive structures.
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公开(公告)号：US11901463B2
公开(公告)日：2024-02-13
申请号：US17850636
申请日：2022-06-27
发明人： Szu-Lin Liu , Jaw-Juinn Horng
CPC分类号： H01L29/94 , H01L29/0607 , H01L29/66181
摘要： A method includes implanting a first dopant having a first dopant type into a substrate to define a plurality of source/drain (S/D) regions. The method further includes implanting a second dopant having the first dopant type into the substrate to define a channel region between adjacent S/D regions of the plurality of S/D regions, wherein a dopant concentration of the second dopant in the channel region is less than half of a dopant concentration of the first dopant in each of the plurality of S/D regions. The method further includes forming a gate stack over the channel region. The method further includes electrically coupling each of the plurality of S/D regions together.
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公开(公告)号：US20230358618A1
公开(公告)日：2023-11-09
申请号：US17735887
申请日：2022-05-03
发明人： Jaw-Juinn Horng , Szu-Lin Liu , Yung-Chow Peng , Shenggao LI
IPC分类号： G01K7/24 , H01L27/088
CPC分类号： G01K7/24 , H01L27/088
摘要： A device including a first plurality of metal-oxide semiconductor field-effect transistors electrically connected in series. Each of the first plurality of metal-oxide semiconductor field-effect transistors includes a first gate structure, a first drain/source region on one side of the first gate structure, and a second drain/source region on another side of the first gate structure. The first gate structure of each of the first plurality of metal-oxide semiconductor field-effect transistors is configured to receive a bias voltage to bias on the first plurality of metal-oxide semiconductor field-effect transistors and provide a temperature dependent resistance through the first plurality of metal-oxide semiconductor field-effect transistors to measure temperatures.
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公开(公告)号：US11671084B2
公开(公告)日：2023-06-06
申请号：US17410545
申请日：2021-08-24
发明人： Szu-Lin Liu , Jaw-Juinn Horng , Yi-Hsiang Wang , Wei-Lin Lai
IPC分类号： H03K5/12 , H03K5/1252 , H03K19/0185 , H01L21/8234 , H01L27/06 , H01L29/94
CPC分类号： H03K5/1252 , H01L21/823437 , H01L21/823475 , H01L27/0629 , H01L29/94 , H03K19/018521
摘要： An integrated circuit includes a first metal-insulator-semiconductor capacitor, a second metal-insulator-semiconductor capacitor, and a metal-insulator-metal capacitor. A first terminal of the first metal-insulator-semiconductor capacitor is configured to receive a first reference voltage for a higher voltage domain, while a first terminal of the second metal-insulator-semiconductor capacitor is configured to receive a second reference voltage for the higher voltage domain. A second terminal of the first metal-insulator-semiconductor capacitor is conductively connected to a first terminal of the metal-insulator-metal capacitor, while a second terminal of the second metal-insulator-semiconductor capacitor is conductively connected to a second terminal of the metal-insulator-metal capacitor. The first terminal of the metal-insulator-metal capacitor is configured to receive a first supply voltage for a lower voltage domain, and the first terminal of the second metal-insulator-semiconductor capacitor is configured to receive a second supply voltage for the lower voltage domain.
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公开(公告)号：US10444081B2
公开(公告)日：2019-10-15
申请号：US15639318
申请日：2017-06-30
发明人： Jaw-Juinn Horng , Szu-Lin Liu , Chung-Hui Chen
摘要： A circuit includes a first current source that provides a current and a resistive branch in series with the first current source that provides a first voltage value and a second voltage value. A capacitive device is coupled with a voltage node having a voltage value, and a switching network alternates between charging the capacitive device to have the voltage value increase to the first voltage value, and discharging the capacitive device to have the voltage value decrease to the second voltage value.
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