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公开(公告)号：US11429482B2
公开(公告)日：2022-08-30
申请号：US17178651
申请日：2021-02-18
Inventor： Yu-Der Chih , Ching-Huang Wang , Yi-Chun Shih , Meng-Chun Shih , C. Y. Wang
IPC: G06F11/10 , G11C17/16 , G11C17/18 , G11C29/44 , G11C29/50 , G11C29/56 , G11C29/00 , G06F3/06 , G11C29/04
Abstract: Systems and methods for correcting data errors in memory caused by high-temperature processing of the memory are provided. An integrated circuit (IC) die including a memory is formed. Addresses of memory locations that are susceptible to data loss when subjected to elevated temperatures are determined. Bits of data are written to the memory, where the bits of data include a set of bits written to the memory locations. The set of bits are written to a storage device of the IC die that is not susceptible to data loss when subjected to the elevated temperatures, the subset of bits comprise compressed code. At least one of the bits stored at the addresses is overwritten after subjecting the IC die to an elevated temperature. The at least one of the bits is overwritten based on the set of bits written to the storage device.
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2.发明公开公开(公告)号：US20240096818A1
公开(公告)日：2024-03-21
申请号：US18303659
申请日：2023-04-20
Inventor： Harry-Hak-Lay Chuang , Yuan-Jen Lee , Kuo-An Liu , Ching-Huang Wang , C.T. Kuo , Tien-Wei Chiang
IPC: H01L23/552 , H01L25/00 , H01L25/065 , H10B80/00
CPC classification number: H01L23/552 , H01L25/0655 , H01L25/50 , H10B80/00 , H10B61/00
Abstract: Devices and method for forming a shielding assembly including a first chip package structure sensitive to magnetic interference (MI), a second chip package structure sensitive to electromagnetic interference (EMI), and a shield surrounding sidewalls and top surfaces of the first chip package structure and the second chip package structure, in which the shield is a magnetic shielding material. In some embodiments, the shield may include silicon steel, in some embodiments, the shield may include Mu-metal. The silicon-steel-based or Mu-metal-based shield may provide both EMI and MI protection to multiple chip package structures with various susceptibilities to EMI and MI.
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公开(公告)号：US11755410B2
公开(公告)日：2023-09-12
申请号：US17873262
申请日：2022-07-26
Inventor： Yu-Der Chih , Ching-Huang Wang , Yi-Chun Shih , Meng-Chun Shih , C. Y. Wang
IPC: G06F11/10 , G11C17/16 , G11C29/44 , G11C29/50 , G11C29/56 , G11C29/00 , G06F3/06 , G11C29/04 , G11C17/18
CPC classification number: G06F11/1068 , G06F3/064 , G06F3/0619 , G06F3/0638 , G06F3/0685 , G06F11/1048 , G11C17/16 , G11C17/18 , G11C29/44 , G11C29/50016 , G11C29/56004 , G11C29/78 , G11C2029/0403 , G11C2029/4402 , G11C2029/5002
Abstract: Systems and methods for correcting data errors in memory caused by high-temperature processing of the memory are provided. An integrated circuit (IC) die including a memory is formed. Addresses of memory locations that are susceptible to data loss when subjected to elevated temperatures are determined. Bits of data are written to the memory, where the bits of data include a set of bits written to the memory locations. The set of bits are written to a storage device of the IC die that is not susceptible to data loss when subjected to the elevated temperatures, the subset of bits comprise compressed code. At least one of the bits stored at the addresses is overwritten after subjecting the IC die to an elevated temperature. The at least one of the bits is overwritten based on the set of bits written to the storage device.
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公开(公告)号：US10228998B2
公开(公告)日：2019-03-12
申请号：US15228294
申请日：2016-08-04
Inventor： Yu-Der Chih , Ching-Huang Wang , Yi-Chun Shih , Meng-Chun Shih , C. Y. Wang
IPC: G06F11/10 , G11C29/52 , G11C17/18 , G06F3/06 , G11C17/16 , G11C29/44 , G11C29/50 , G11C29/56 , G11C29/00 , G11C29/04
Abstract: Systems and methods for correcting data errors in memory caused by high-temperature processing of the memory are provided. An integrated circuit (IC) die including a memory is formed. Addresses of memory locations that are susceptible to data loss when subjected to elevated temperatures are determined. Bits of data are written to the memory, where the bits of data include a set of bits written to the memory locations. The set of bits are written to a storage device of the IC die that is not susceptible to data loss when subjected to the elevated temperatures. At least one of the bits stored at the addresses is overwritten after subjecting the IC die to an elevated temperature. The at least one of the bits is overwritten based on the set of bits written to the storage device.
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Patent Agency Ranking
公开(公告)号：US20220358013A1
公开(公告)日：2022-11-10
申请号：US17873262
申请日：2022-07-26
Inventor： Yu-Der Chih , Ching-Huang Wang , Yi-Chun Shih , Meng-Chun Shih , C. Y. Wang
Abstract: Systems and methods for correcting data errors in memory caused by high-temperature processing of the memory are provided. An integrated circuit (IC) die including a memory is formed. Addresses of memory locations that are susceptible to data loss when subjected to elevated temperatures are determined. Bits of data are written to the memory, where the bits of data include a set of bits written to the memory locations. The set of bits are written to a storage device of the IC die that is not susceptible to data loss when subjected to the elevated temperatures, the subset of bits comprise compressed code. At least one of the bits stored at the addresses is overwritten after subjecting the IC die to an elevated temperature. The at least one of the bits is overwritten based on the set of bits written to the storage device.
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公开(公告)号：US10936413B2
公开(公告)日：2021-03-02
申请号：US16295194
申请日：2019-03-07
Inventor： Yu-Der Chih , Ching-Huang Wang , Yi-Chun Shih , Meng-Chun Shih , C.Y. Wang
IPC: G06F11/10 , G11C17/16 , G11C17/18 , G11C29/44 , G11C29/50 , G11C29/56 , G11C29/00 , G06F3/06 , G11C29/04
Abstract: Systems and methods for correcting data errors in memory caused by high-temperature processing of the memory are provided. An integrated circuit (IC) die including a memory is formed. Addresses of memory locations that are susceptible to data loss when subjected to elevated temperatures are determined. Bits of data are written to the memory, where the bits of data include a set of bits written to the memory locations. The set of bits are written to a storage device of the IC die that is not susceptible to data loss when subjected to the elevated temperatures, the subset of bits comprise compressed code. At least one of the bits stored at the addresses is overwritten after subjecting the IC die to an elevated temperature. The at least one of the bits is overwritten based on the set of bits written to the storage device.
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公开(公告)号：US20180039537A1
公开(公告)日：2018-02-08
申请号：US15228294
申请日：2016-08-04
Inventor： YU-DER CHIH , Ching-Huang Wang , Yi-Chun Shih , Meng-Chun Shih , C.Y. Wang
CPC classification number: G11C17/18 , G06F11/1048 , G11C17/16 , G11C29/44 , G11C29/50016 , G11C29/56004 , G11C29/78 , G11C2029/0403 , G11C2029/4402 , G11C2029/5002
Abstract: Systems and methods for correcting data errors in memory caused by high-temperature processing of the memory are provided. An integrated circuit (IC) die including a memory is formed. Addresses of memory locations that are susceptible to data loss when subjected to elevated temperatures are determined. Bits of data are written to the memory, where the bits of data include a set of bits written to the memory locations. The set of bits are written to a storage device of the IC die that is not susceptible to data loss when subjected to the elevated temperatures. At least one of the bits stored at the addresses is overwritten after subjecting the IC die to an elevated temperature. The at least one of the bits is overwritten based on the set of bits written to the storage device.
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公开(公告)号：US20210173739A1
公开(公告)日：2021-06-10
申请号：US17178651
申请日：2021-02-18
Inventor： Yu-Der Chih , Ching-Huang Wang , Yi-Chun Shih , Meng-Chun Shih , C.Y. Wang
Abstract: Systems and methods for correcting data errors in memory caused by high-temperature processing of the memory are provided. An integrated circuit (IC) die including a memory is formed. Addresses of memory locations that are susceptible to data loss when subjected to elevated temperatures are determined. Bits of data are written to the memory, where the bits of data include a set of bits written to the memory locations. The set of bits are written to a storage device of the IC die that is not susceptible to data loss when subjected to the elevated temperatures, the subset of bits comprise compressed code. At least one of the bits stored at the addresses is overwritten after subjecting the IC die to an elevated temperature. The at least one of the bits is overwritten based on the set of bits written to the storage device.
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公开(公告)号：US20190205208A1
公开(公告)日：2019-07-04
申请号：US16295194
申请日：2019-03-07
Inventor： YU-DER CHIH , Ching-Huang Wang , Yi-Chun Shih , Meng-Chun Shih , C.Y. Wang
CPC classification number: G06F11/1068 , G06F3/0619 , G06F3/0638 , G06F3/064 , G06F3/0685 , G06F11/1048 , G11C17/16 , G11C17/18 , G11C29/44 , G11C29/50016 , G11C29/56004 , G11C29/78 , G11C2029/0403 , G11C2029/4402 , G11C2029/5002
Abstract: Systems and methods for correcting data errors in memory caused by high-temperature processing of the memory are provided. An integrated circuit (IC) die including a memory is formed. Addresses of memory locations that are susceptible to data loss when subjected to elevated temperatures are determined. Bits of data are written to the memory, where the bits of data include a set of bits written to the memory locations. The set of bits are written to a storage device of the IC die that is not susceptible to data loss when subjected to the elevated temperatures, the subset of bits comprise compressed code. At least one of the bits stored at the addresses is overwritten after subjecting the IC die to an elevated temperature. The at least one of the bits is overwritten based on the set of bits written to the storage device.
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