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公开(公告)号：US10784150B2
公开(公告)日：2020-09-22
申请号：US16394772
申请日：2019-04-25
发明人： Ching-Chung Su , Jiech-Fun Lu , Jian Wu , Che-Hsiang Hsueh , Ming-Chi Wu , Chi-Yuan Wen , Chun-Chieh Fang , Yu-Lung Yeh
IPC分类号： H01L21/764 , H01L21/762 , H01L21/308
摘要： A semiconductor structure includes a semiconductive substrate including a first surface and a second surface opposite to the first surface, a shallow trench isolation (STI) including a first portion at least partially disposed within the semiconductive substrate and tapered from the first surface towards the second surface, and a second portion disposed inside the semiconductive substrate, coupled with the first portion and extended from the first portion towards the second surface, and a void enclosed by the STI, wherein the void is at least partially disposed within the second portion of the STI.
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公开(公告)号：US10276427B2
公开(公告)日：2019-04-30
申请号：US15990162
申请日：2018-05-25
发明人： Ching-Chung Su , Jiech-Fun Lu , Jian Wu , Che-Hsiang Hsueh , Ming-Chi Wu , Chi-Yuan Wen , Chun-Chieh Fang , Yu-Lung Yeh
IPC分类号： H01L21/764 , H01L21/762 , H01L21/308
摘要： A semiconductor structure includes a semiconductive substrate including a first surface and a second surface opposite to the first surface, a shallow trench isolation (STI) including a first portion at least partially disposed within the semiconductive substrate and tapered from the first surface towards the second surface, and a second portion disposed inside the semiconductive substrate, coupled with the first portion and extended from the first portion towards the second surface, and a void enclosed by the STI, wherein the void is at least partially disposed within the second portion of the STI.
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公开(公告)号：US11594459B2
公开(公告)日：2023-02-28
申请号：US17248879
申请日：2021-02-11
发明人： Li Chun Liu , Chun Tang Wang , Chih Hung Wang , Ching Feng Lee , Yu-Lung Yeh
IPC分类号： H01L21/00 , H01L23/31 , H01L21/768 , H01L23/528
摘要： A semiconductor device includes an ultra-thick metal (UTM) structure. The semiconductor device includes a passivation layer including a first passivation oxide. The first passivation oxide includes an unbias film and a first bias film, where the unbias film is on portions of the UTM structure and on portions of a layer on which the UTM structure is formed, and the first bias film is on the unbias film. The passivation layer includes a second passivation oxide consisting of a second bias film, the second bias film being on the first bias film. The passivation layer includes a third passivation oxide consisting of a third bias film, the third bias film being on the second bias film.
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公开(公告)号：US11302734B2
公开(公告)日：2022-04-12
申请号：US16120629
申请日：2018-09-04
发明人： Ming-Chi Wu , Chun-Chieh Fang , Bo-Chang Su , Chien Nan Tu , Yu-Lung Yeh , Kun-Yu Lin , Shih-Shiung Chen
IPC分类号： H01L27/146 , H01L21/762 , H01L21/3205 , H01L21/311 , H01L21/3065
摘要： A method includes etching a semiconductor substrate to form a trench, filling a dielectric layer into the trench, with a void being formed in the trench and between opposite portions of the dielectric layer, etching the dielectric layer to reveal the void, forming a diffusion barrier layer on the dielectric layer, and forming a high-reflectivity metal layer on the diffusion barrier layer. The high-reflectivity metal layer has a portion extending into the trench. A remaining portion of the void is enclosed by the high-reflectivity metal layer.
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公开(公告)号：US09984918B2
公开(公告)日：2018-05-29
申请号：US15088126
申请日：2016-04-01
发明人： Ching-Chung Su , Jiech-Fun Lu , Jian Wu , Che-Hsiang Hsueh , Ming-Chi Wu , Chi-Yuan Wen , Chun-Chieh Fang , Yu-Lung Yeh
IPC分类号： H01L21/764 , H01L21/762
CPC分类号： H01L21/764 , H01L21/3083 , H01L21/76232
摘要： A semiconductor structure includes a semiconductive substrate including a first surface and a second surface opposite to the first surface, a shallow trench isolation (STI) including a first portion at least partially disposed within the semiconductive substrate and tapered from the first surface towards the second surface, and a second portion disposed inside the semiconductive substrate, coupled with the first portion and extended from the first portion towards the second surface, and a void enclosed by the STI, wherein the void is at least partially disposed within the second portion of the STI.
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公开(公告)号：US09337229B2
公开(公告)日：2016-05-10
申请号：US14244562
申请日：2014-04-03
发明人： Chien Nan Tu , Yu-Lung Yeh , Ming-Hsien Wu , Li-Ming Sun
IPC分类号： H01L27/146
CPC分类号： H01L27/1464 , H01L27/14609 , H01L27/14625 , H01L27/14685 , H01L27/14689
摘要： A semiconductor device includes an epitaxial layer including a first surface and a silicon layer disposed on the first surface and including a second surface opposite to the first surface, wherein the silicon layer includes a plurality of pillars on the second surface, a portion of the plurality of pillars on a predetermined portion of the second surface are in substantially same dimension, each of the plurality of pillars on the predetermined portion of the second surface stands substantially orthogonal to the second surface, the plurality of pillars are configured for absorbing an electromagnetic radiation of a predetermined wavelength projected from the epitaxial layer and generating an electrical energy in response to the absorption of the electromagnetic radiation.
摘要翻译： 半导体器件包括外延层，其包括设置在第一表面上的第一表面和硅层，并且包括与第一表面相对的第二表面，其中硅层在第二表面上包括多个柱，多个部分 在第二表面的预定部分上的支柱的尺寸基本相同，第二表面的预定部分上的多个支柱中的每个支柱大致垂直于第二表面，多个支柱被构造成用于吸收第二表面的电磁辐射 从外延层投影的预定波长并且响应于电磁辐射的吸收而产生电能。
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公开(公告)号：US20240347377A1
公开(公告)日：2024-10-17
申请号：US18754653
申请日：2024-06-26
发明人： Yu-Hung Cheng , Pu-Fang Chen , Cheng-Ta Wu , Po-Jung Chiang , Ru-Liang Lee , Victor Y. Lu , Yen-Hsiu Chen , Yeur-Luen Tu , Yu-Lung Yeh , Shi-Chieh Lin
IPC分类号： H01L21/762 , H01L21/02 , H01L21/265 , H01L21/324 , H01L21/84
CPC分类号： H01L21/76254 , H01L21/02532 , H01L21/324 , H01L21/84 , H01L21/26506
摘要： Various embodiments of the present application are directed to a method for forming a semiconductor-on-insulator (SOI) device with an impurity competing layer to absorb potential contamination metal particles during an annealing process, and the SOI structure thereof. In some embodiments, an impurity competing layer is formed on the dummy substrate. An insulation layer is formed over a support substrate. A front side of the dummy wafer is bonded to the insulation layer. An annealing process is performed and the impurity competing layer absorbs metal from an upper portion of the dummy substrate. Then, a majority portion of the dummy substrate is removed including the impurity competing layer, leaving a device layer of the dummy substrate on the insulation layer.
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公开(公告)号：US20240234589A1
公开(公告)日：2024-07-11
申请号：US18617795
申请日：2024-03-27
发明人： Ting-Ying Wu , Yung-Hsiang Chen , Yu-Lung Yeh , Yen-Hsiu Chen , Wei-Liang Chen , Ying-Tsang Ho
IPC分类号： H01L29/872 , H01L29/66
CPC分类号： H01L29/872 , H01L29/66143
摘要： A semiconductor device and a method of forming the same is disclosed. The semiconductor device includes a substrate, a first well region disposed within the substrate, a second well region disposed adjacent to the first well region and within the substrate, and an array of well regions disposed within the first well region. The first well region includes a first type of dopants, the second well region includes a second type of dopants that is different from the first type of dopants, and the array of well regions include the second type of dopants. The semiconductor device further includes a metal silicide layer disposed on the array of well regions and within the substrate, a metal silicide nitride layer disposed on the metal silicide layer and within the substrate, and a contact structure disposed on the metal silicide nitride layer.
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公开(公告)号：US20230387150A1
公开(公告)日：2023-11-30
申请号：US18364662
申请日：2023-08-03
发明人： Chien-Chang Huang , Chien Nan Tu , Ming-Chi Wu , Yu-Lung Yeh , Ji Heng Jiang
IPC分类号： H01L27/146 , H01L31/0352 , H01L31/028 , H01L31/0236 , H01L31/102
CPC分类号： H01L27/1461 , H01L31/03529 , H01L27/14645 , H01L27/14689 , H01L27/14638 , H01L27/1464 , H01L31/0284 , H01L27/14607 , H01L31/02363 , H01L31/102 , H01L27/14621 , H01L27/14627
摘要： An image sensor with high quantum efficiency is provided. In some embodiments, a semiconductor substrate includes a non-porous semiconductor layer along a front side of the semiconductor substrate. A periodic structure is along a back side of the semiconductor substrate. A high absorption layer lines the periodic structure on the back side of the semiconductor substrate. The high absorption layer is a semiconductor material with an energy bandgap less than that of the non-porous semiconductor layer. A photodetector is in the semiconductor substrate and the high absorption layer. A method for manufacturing the image sensor is also provided.
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公开(公告)号：US10204959B2
公开(公告)日：2019-02-12
申请号：US14583433
申请日：2014-12-26
发明人： Chien-Chang Huang , Li-Ming Sun , Chien Nan Tu , Yi-Ping Pan , Yu-Lung Yeh
IPC分类号： H01L27/146
摘要： A semiconductor device includes a substrate including a front side, a back side opposite to the front side, and a high absorption structure disposed over the back side of the substrate and configured to absorb an electromagnetic radiation in a predetermined wavelength; and a dielectric layer including a high dielectric constant (high k) dielectric material, wherein the dielectric layer is disposed on the high absorption structure.
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