Information processing apparatus, method, and program for generating setting information for electronic device
    1.
    发明授权
    Information processing apparatus, method, and program for generating setting information for electronic device 失效
    用于产生电子设备的设置信息的信息处理设备,方法和程序

    公开(公告)号:US07925725B2

    公开(公告)日:2011-04-12

    申请号:US11862734

    申请日:2007-09-27

    IPC分类号: G06F15/177

    摘要: The present invention provides an apparatus, method, and program for automatically generating setting information for a different model on the basis of settings previously made. Additionally, the present invention is directed to automatically determining one piece of setting information to be set for a different model on the basis of settings previously made. The present invention is also directed to automatically generating, on the basis of settings previously made, setting information that is to be set for a different model and that meets the user's intention.

    摘要翻译: 本发明提供一种用于根据先前设定的不同模型自动生成设定信息的装置,方法和程序。 另外,本发明涉及基于先前设定的自动确定要为不同模型设定的一条设定信息。 本发明还涉及基于先前设置的设置,自动生成要为不同型号设置并满足用户意图的设置信息。

    Information Processing Apparatus, Method, and Program for Generating Setting Information for Electronic Device
    2.
    发明申请
    Information Processing Apparatus, Method, and Program for Generating Setting Information for Electronic Device 失效
    用于生成电子设备设置信息的信息处理设备,方法和程序

    公开(公告)号:US20080162629A1

    公开(公告)日:2008-07-03

    申请号:US11862734

    申请日:2007-09-27

    IPC分类号: G06F13/10 G06F15/177

    摘要: The present invention provides an apparatus, method, and program for automatically generating setting information for a different model on the basis of settings previously made. Additionally, the present invention is directed to automatically determining one piece of setting information to be set for a different model on the basis of settings previously made. The present invention is also directed to automatically generating, on the basis of settings previously made, setting information that is to be set for a different model and that meets the user's intention.

    摘要翻译: 本发明提供一种用于根据先前设定的不同模型自动生成设定信息的装置,方法和程序。 另外,本发明涉及基于先前设定的自动确定要为不同模型设定的一条设定信息。 本发明还涉及基于先前设置的设置,自动生成要为不同型号设置并满足用户意图的设置信息。

    Clock generating apparatus and clock generating method
    3.
    发明授权
    Clock generating apparatus and clock generating method 失效
    时钟发生装置和时钟发生方法

    公开(公告)号:US07986176B2

    公开(公告)日:2011-07-26

    申请号:US12724868

    申请日:2010-03-16

    申请人: Yasutaka Kanayama

    发明人: Yasutaka Kanayama

    IPC分类号: H03L7/06

    摘要: A clock generating apparatus includes a phase-difference measuring device for measuring a difference in phase between a reference clock and a feedback clock generated by a divider with a high-speed clock generated by a multiplier, an averager for averaging the measured phase difference, and an output clock generator for returning a self-generated output clock to the multiplier and the divider and generating an output clock synchronized with the reference clock by using the averaged phase difference and a generated operation clock. The multiplier generates the high-speed clock by multiplying the returned output clock, and the divider generates the feedback clock by dividing the returned output clock A frequency of generation of the output clock in the output clock generator is increased.

    摘要翻译: 时钟发生装置包括:相位差测量装置,用于测量由乘法器产生的高速时钟由分频器产生的参考时钟与反馈时钟之间的相位差;平均值,用于平均所测量的相位差;以及 输出时钟发生器,用于将自产生的输出时钟返回到乘法器和分频器,并通过使用平均的相位差和产生的操作时钟来产生与参考时钟同步的输出时钟。 乘法器通过乘以返回的输出时钟产生高速时钟,分频器通过除以返回的输出时钟A产生反馈时钟。输出时钟发生器中输出时钟的产生频率增加。

    Analog-to-digital converter and digital-to-analog converter
    4.
    发明授权
    Analog-to-digital converter and digital-to-analog converter 有权
    模数转换器和数模转换器

    公开(公告)号:US08368573B2

    公开(公告)日:2013-02-05

    申请号:US12984848

    申请日:2011-01-05

    申请人: Yasutaka Kanayama

    发明人: Yasutaka Kanayama

    IPC分类号: H03M3/00

    摘要: An A/D converter includes an adjusting circuit to adjust a total of an amount of change of ΣΔ modulated data output from a ΣΔ modulator and an amount of change of dummy data to be constant, and a level converting part supplied with the ΣΔ modulated data. The level converting part includes a first level converter to output the ΣΔ modulated data by converting a level of the ΣΔ modulated data, and a second level converter to receive the dummy data from the adjusting circuit and interpolate dummy noise, in order to cancel a frequency dependence of noise with respect to the ΣΔ modulated data.

    摘要翻译: A / D转换器包括一个调节电路,用于调整&Sgr& Dgr的变化量的总和; 调制数据从&Sgr&Dgr输出; 调制器和虚拟数据的变化量是恒定的,以及提供有&Sgr& Dgr的电平转换部分; 调制数据。 电平转换部分包括第一电平转换器,用于输出&Sgr;&Dgr; 通过转换&Sgr& Dgr的级别调制数据; 调制数据和第二电平转换器,以从调整电路接收虚拟数据并内插虚拟噪声,以消除噪声相对于&Sgr& Dgr的频率依赖性; 调制数据。

    Semiconductor device, circuit board device, and information processing device
    5.
    发明授权
    Semiconductor device, circuit board device, and information processing device 有权
    半导体器件,电路板器件和信息处理器件

    公开(公告)号:US08547133B2

    公开(公告)日:2013-10-01

    申请号:US13239877

    申请日:2011-09-22

    IPC分类号: H03K17/16

    摘要: In a semiconductor device, a selector selects a different reference voltage depending on whether the impedance of a transmitter or of a receiver is to be adjusted, and causes a reference voltage generator to generate the selected reference voltage. The reference voltage generator generates the reference voltage selected by the selector and applies the generated reference voltage to an impedance adjuster. The impedance adjuster adjusts the impedance of the transmitter and the impedance of the receiver, separately from each other, in accordance with the input reference voltage.

    摘要翻译: 在半导体器件中,选择器根据发送器或接收器的阻抗是否调整而选择不同的参考电压,并且使参考电压发生器产生所选择的参考电压。 参考电压发生器产生由选择器选择的参考电压,并将产生的参考电压施加到阻抗调节器。 阻抗调节器根据输入参考电压分别调整发射器的阻抗和接收器的阻抗。

    CLOCK GENERATING APPARATUS AND CLOCK GENERATING METHOD
    6.
    发明申请
    CLOCK GENERATING APPARATUS AND CLOCK GENERATING METHOD 失效
    时钟生成装置和时钟生成方法

    公开(公告)号:US20100171534A1

    公开(公告)日:2010-07-08

    申请号:US12724868

    申请日:2010-03-16

    申请人: Yasutaka Kanayama

    发明人: Yasutaka Kanayama

    IPC分类号: H03L7/06

    摘要: A clock generating apparatus includes a phase-difference measuring device for measuring a difference in phase between a reference clock and a feedback clock generated by a divider with a high-speed clock generated by a multiplier, an averager for averaging the measured phase difference, and an output clock generator for returning a self-generated output clock to the multiplier and the divider and generating an output clock synchronized with the reference clock by using the averaged phase difference and a generated operation clock. The multiplier generates the high-speed clock by multiplying the returned output clock, and the divider generates the feedback clock by dividing the returned output clock A frequency of generation of the output clock in the output clock generator is increased.

    摘要翻译: 时钟发生装置包括:相位差测量装置,用于测量由乘法器产生的高速时钟由分频器产生的参考时钟与反馈时钟之间的相位差;平均值,用于平均所测量的相位差;以及 输出时钟发生器,用于将自产生的输出时钟返回到乘法器和分频器,并通过使用平均的相位差和产生的操作时钟来产生与参考时钟同步的输出时钟。 乘法器通过乘以返回的输出时钟产生高速时钟,分频器通过除以返回的输出时钟A产生反馈时钟。输出时钟发生器中输出时钟的产生频率增加。

    DIGITAL SIGNAL PROCESSING APPARATUS AND DIGITAL SIGNAL PROCESSING METHOD
    7.
    发明申请
    DIGITAL SIGNAL PROCESSING APPARATUS AND DIGITAL SIGNAL PROCESSING METHOD 审中-公开
    数字信号处理设备和数字信号处理方法

    公开(公告)号:US20100325184A1

    公开(公告)日:2010-12-23

    申请号:US12796091

    申请日:2010-06-08

    IPC分类号: G06F17/14 G06F17/10

    CPC分类号: H03H17/0213

    摘要: A digital signal processing apparatus includes a frame generator configured to generate a plurality of frames from a row of sample data of a time-domain, a part of each frame overlapping with adjoining frames, a Fourier transform unit configured to transform at least one of the generated frames into a frequency domain by Fourier transformation, an addition unit configured to add predetermined frequency characteristic to the transformed frame, and an inverse Fourier transform unit configured to transform the added frame into the time-domain by inverse Fourier transformation and to delete the overlap of the frame of the time-domain transformed.

    摘要翻译: 数字信号处理装置包括:帧生成器,被配置为从时域的采样数据行中生成多个帧,每个帧的相邻帧的重叠部分;傅立叶变换单元,被配置为将至少一个 通过傅立叶变换将生成的帧生成到频域中,加法单元,被配置为向变换后的帧添加预定的频率特性;以及逆傅立叶变换单元,被配置为通过逆傅里叶变换将所添加的帧变换成时域,并且删除重叠 的时域转换。

    Multipoint communication method and communication control device

    公开(公告)号:US06983163B2

    公开(公告)日:2006-01-03

    申请号:US10267108

    申请日:2002-10-04

    IPC分类号: H04B7/00

    CPC分类号: H04W88/181

    摘要: In making a transition from two-point communication to three-point communication, by making preparations for three-point communication without interrupting two-point communication, and by making a transition to three-point communication when preparations are completed, momentary interruption of the conversation is eliminated. That is, while maintaining two-point communication, the transcoders at each point are made to acquire rate control information for all points, after which the transition to three-point communication is made.

    SEMICONDUCTOR DEVICE, CIRCUIT BOARD DEVICE, AND INFORMATION PROCESSING DEVICE
    9.
    发明申请
    SEMICONDUCTOR DEVICE, CIRCUIT BOARD DEVICE, AND INFORMATION PROCESSING DEVICE 有权
    半导体器件,电路板器件和信息处理器件

    公开(公告)号:US20120153988A1

    公开(公告)日:2012-06-21

    申请号:US13239877

    申请日:2011-09-22

    IPC分类号: H03K19/003

    摘要: In a semiconductor device, a selector selects a different reference voltage depending on whether the impedance of a transmitter or of a receiver is to be adjusted, and causes a reference voltage generator to generate the selected reference voltage. The reference voltage generator generates the reference voltage selected by the selector and applies the generated reference voltage to an impedance adjuster. The impedance adjuster adjusts the impedance of the transmitter and the impedance of the receiver, separately from each other, in accordance with the input reference voltage.

    摘要翻译: 在半导体器件中,选择器根据发送器或接收器的阻抗是否调整而选择不同的参考电压,并且使参考电压发生器产生所选择的参考电压。 参考电压发生器产生由选择器选择的参考电压,并将产生的参考电压施加到阻抗调节器。 阻抗调节器根据输入参考电压分别调整发射器的阻抗和接收器的阻抗。