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公开(公告)号：US07885132B2
公开(公告)日：2011-02-08
申请号：US12437021
申请日：2009-05-07
IPC分类号： G11C7/04
CPC分类号： G11C11/5642 , G11C5/145 , G11C7/06 , G11C7/12 , G11C16/24 , G11C16/26 , G11C16/30 , G11C2207/065 , G11C2207/2227 , G11C2211/5634 , G11C2211/5645
摘要： An internal voltage generating circuit generates and supplies a boosted voltage higher than an internal power supply voltage, as an operating power supply voltage, to a sense amplifier in a read circuit for reading data of a memory cell. A bit line precharge current supplied via an internal data line is produced from the internal power supply voltage. It is possible to provide a nonvolatile semiconductor memory device, which can perform a precise sense operation and an accurate reading of data even under a low power supply voltage condition.
摘要翻译： 内部电压产生电路产生并提供高于作为工作电源电压的内部电源电压的升压电压到用于读取存储器单元的数据的读取电路中的读出放大器。 从内部电源电压产生经由内部数据线提供的位线预充电电流。 可以提供一种非易失性半导体存储器件，即使在低电源电压条件下也能进行精确的读出操作和数据的精确读取。
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公开(公告)号：US07542363B2
公开(公告)日：2009-06-02
申请号：US11082926
申请日：2005-03-18
IPC分类号： G11C7/02
CPC分类号： G11C11/5642 , G11C5/145 , G11C7/06 , G11C7/12 , G11C16/24 , G11C16/26 , G11C16/30 , G11C2207/065 , G11C2207/2227 , G11C2211/5634 , G11C2211/5645
摘要： An internal voltage generating circuit generates and supplies a boosted voltage higher than an internal power supply voltage, as an operating power supply voltage, to a sense amplifier in a read circuit for reading data of a memory cell. A bit line precharge current supplied via an internal data line is produced from the internal power supply voltage. It is possible to provide a nonvolatile semiconductor memory device, which can perform a precise sense operation and an accurate reading of data even under a low power supply voltage condition.
摘要翻译： 内部电压产生电路产生并提供高于作为工作电源电压的内部电源电压的升压电压到用于读取存储器单元的数据的读取电路中的读出放大器。 从内部电源电压产生经由内部数据线提供的位线预充电电流。 可以提供一种非易失性半导体存储器件，即使在低电源电压条件下也能进行精确的读出操作和数据的精确读取。
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公开(公告)号：US20050213387A1
公开(公告)日：2005-09-29
申请号：US11082926
申请日：2005-03-18
IPC分类号： G11C16/06 , G11C5/14 , G11C7/06 , G11C7/12 , G11C11/34 , G11C11/56 , G11C16/02 , G11C16/24 , G11C16/26 , G11C16/30
CPC分类号： G11C11/5642 , G11C5/145 , G11C7/06 , G11C7/12 , G11C16/24 , G11C16/26 , G11C16/30 , G11C2207/065 , G11C2207/2227 , G11C2211/5634 , G11C2211/5645
摘要： An internal voltage generating circuit generates and supplies a boosted voltage higher than an internal power supply voltage, as an operating power supply voltage, to a sense amplifier in a read circuit for reading data of a memory cell. A bit line precharge current supplied via an internal data line is produced from the internal power supply voltage. It is possible to provide a nonvolatile semiconductor memory device, which can perform a precise sense operation and an accurate reading of data even under a low power supply voltage condition.
摘要翻译： 内部电压产生电路产生并提供高于作为工作电源电压的内部电源电压的升压电压到用于读取存储器单元的数据的读取电路中的读出放大器。 从内部电源电压产生经由内部数据线提供的位线预充电电流。 可以提供一种非易失性半导体存储器件，即使在低电源电压条件下也能进行精确的读出操作和数据的精确读取。
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公开(公告)号：US20070285146A1
公开(公告)日：2007-12-13
申请号：US11822184
申请日：2007-07-03
申请人： Minoru Senda , Kiyohiro Furutani , Taku Ogura , Shigehiro Kuge , Satoshi Kawasaki , Tadaaki Yamauchi
发明人： Minoru Senda , Kiyohiro Furutani , Taku Ogura , Shigehiro Kuge , Satoshi Kawasaki , Tadaaki Yamauchi
IPC分类号： H03K3/00
CPC分类号： G11C16/30 , G11C5/145 , G11C16/04 , H02M3/073 , H02M2003/071 , H02M2003/075 , H02M2003/077 , H03K3/356113
摘要： In the present semiconductor device a positive, driving pump circuit is driven by an external power supply potential EXVDD (for example of 1.8V) to generate a positive voltage VPC (for example of 2.4V). A negative pump circuit for internal operation is driven by the positive voltage VPC to generate a negative voltage VNA (for example of −9.2V) required in an erasure or similar internal operation for a word line. The negative pump circuit for internal operation can have a smaller number of stages of pump and hence consume a smaller area than when the circuit is driven by the external power supply voltage EXVDD (for example of 1.8V) as conventional.
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公开(公告)号：US07268612B2
公开(公告)日：2007-09-11
申请号：US11699427
申请日：2007-01-30
申请人： Minoru Senda , Kiyohiro Furutani , Taku Ogura , Shigehiro Kuge , Satoshi Kawasaki , Tadaaki Yamauchi
发明人： Minoru Senda , Kiyohiro Furutani , Taku Ogura , Shigehiro Kuge , Satoshi Kawasaki , Tadaaki Yamauchi
IPC分类号： G05F1/10
CPC分类号： G11C16/30 , G11C5/145 , G11C16/04 , H02M3/073 , H02M2003/071 , H02M2003/075 , H02M2003/077 , H03K3/356113
摘要： In the present semiconductor device a positive, driving pump circuit is driven by an external power supply potential EXVDD (for example of 1.8V) to generate a positive voltage VPC (for example of 2.4V). A negative pump circuit for internal operation is driven by the positive voltage VPC to generate a negative voltage VNA (for example of −9.2V) required in an erasure or similar internal operation for a word line. The negative pump circuit for internal operation can have a smaller number of stages of pump and hence consume a smaller area than when the circuit is driven by the external power supply voltage EXVDD (for example of 1.8V) as conventional.
摘要翻译： 在本半导体器件中，正的驱动泵电路由外部电源电位EXVDD（例如1.8V）驱动以产生正电压VPC（例如2.4V）。 用于内部操作的负泵电路由正电压VPC驱动以产生对于字线的擦除或类似的内部操作所需的负电压VNA（例如-9.2V）。 用于内部操作的负泵电路可以具有较少数量的泵级，并且因此消耗比通过外部电源电压EXVDD（例如1.8V）驱动电路时更小的面积。
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公开(公告)号：US20070120592A1
公开(公告)日：2007-05-31
申请号：US11699427
申请日：2007-01-30
申请人： Minoru Senda , Kiyohiro Furutani , Taku Ogura , Shigehiro Kuge , Satoshi Kawasaki , Tadaaki Yamauchi
发明人： Minoru Senda , Kiyohiro Furutani , Taku Ogura , Shigehiro Kuge , Satoshi Kawasaki , Tadaaki Yamauchi
IPC分类号： G05F1/10
CPC分类号： G11C16/30 , G11C5/145 , G11C16/04 , H02M3/073 , H02M2003/071 , H02M2003/075 , H02M2003/077 , H03K3/356113
摘要： In the present semiconductor device a positive, driving pump circuit is driven by an external power supply potential EXVDD (for example of 1.8V) to generate a positive voltage VPC (for example of 2.4V). A negative pump circuit for internal operation is driven by the positive voltage VPC to generate a negative voltage VNA (for example of −9.2V) required in an erasure or similar internal operation for a word line. The negative pump circuit for internal operation can have a smaller number of stages of pump and hence consume a smaller area than when the circuit is driven by the external power supply voltage EXVDD (for example of 1.8V) as conventional.
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公开(公告)号：US07365578B2
公开(公告)日：2008-04-29
申请号：US11822184
申请日：2007-07-03
申请人： Minoru Senda , Kiyohiro Furutani , Taku Ogura , Shigehiro Kuge , Satoshi Kawasaki , Tadaaki Yamauchi
发明人： Minoru Senda , Kiyohiro Furutani , Taku Ogura , Shigehiro Kuge , Satoshi Kawasaki , Tadaaki Yamauchi
IPC分类号： H03K3/00
CPC分类号： G11C16/30 , G11C5/145 , G11C16/04 , H02M3/073 , H02M2003/071 , H02M2003/075 , H02M2003/077 , H03K3/356113
摘要： In the present semiconductor device a positive, driving pump circuit is driven by an external power supply potential EXVDD (for example of 1.8V) to generate a positive voltage VPC (for example of 2.4V). A negative pump circuit for internal operation is driven by the positive voltage VPC to generate a negative voltage VNA (for example of −9.2V) required in an erasure or similar internal operation for a word line. The negative pump circuit for internal operation can have a smaller number of stages of pump and hence consume a smaller area than when the circuit is driven by the external power supply voltage EXVDD (for example of 1.8V) as conventional.
摘要翻译： 在本半导体器件中，正的驱动泵电路由外部电源电位EXVDD（例如1.8V）驱动以产生正电压VPC（例如2.4V）。 用于内部操作的负泵电路由正电压VPC驱动以产生对于字线的擦除或类似的内部操作所需的负电压VNA（例如-9.2V）。 用于内部操作的负泵电路可以具有较少数量的泵级，并且因此消耗比通过外部电源电压EXVDD（例如1.8V）驱动电路时更小的面积。
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公开(公告)号：US07180362B2
公开(公告)日：2007-02-20
申请号：US10941004
申请日：2004-09-15
申请人： Minoru Senda , Kiyohiro Furutani , Taku Ogura , Shigehiro Kuge , Satoshi Kawasaki , Tadaaki Yamauchi
发明人： Minoru Senda , Kiyohiro Furutani , Taku Ogura , Shigehiro Kuge , Satoshi Kawasaki , Tadaaki Yamauchi
IPC分类号： G05F1/10
CPC分类号： G11C16/30 , G11C5/145 , G11C16/04 , H02M3/073 , H02M2003/071 , H02M2003/075 , H02M2003/077 , H03K3/356113
摘要： In the present semiconductor device a positive, driving pump circuit is driven by an external power supply potential EXVDD (for example of 1.8V) to generate a positive voltage VPC (for example of 2.4V). A negative pump circuit for internal operation is driven by the positive voltage VPC to generate a negative voltage VNA (for example of −9.2V) required in an erasure or similar internal operation for a word line. The negative pump circuit for internal operation can have a smaller number of stages of pump and hence consume a smaller area than when the circuit is driven by the external power supply voltage EXVDD (for example of 1.8V) as conventional.
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公开(公告)号：US20050057288A1
公开(公告)日：2005-03-17
申请号：US10941004
申请日：2004-09-15
申请人： Minoru Senda , Kiyohiro Furutani , Taku Ogura , Shigehiro Kuge , Satoshi Kawasaki , Tadaaki Yamauchi
发明人： Minoru Senda , Kiyohiro Furutani , Taku Ogura , Shigehiro Kuge , Satoshi Kawasaki , Tadaaki Yamauchi
IPC分类号： G11C16/06 , G11C5/14 , G11C16/04 , G11C16/30 , H01L21/822 , H01L21/8247 , H01L27/04 , H01L27/10 , H01L27/115 , H01L29/788 , H01L29/792 , H02M3/07 , H03L7/06
CPC分类号： G11C16/30 , G11C5/145 , G11C16/04 , H02M3/073 , H02M2003/071 , H02M2003/075 , H02M2003/077 , H03K3/356113
摘要： In the present semiconductor device a positive, driving pump circuit is driven by an external power supply potential EXVDD (for example of 1.8V) to generate a positive voltage VPC (for example of 2.4V). A negative pump circuit for internal operation is driven by the positive voltage VPC to generate a negative voltage VNA (for example of −9.2V) required in an erasure or similar internal operation for a word line. The negative pump circuit for internal operation can have a smaller number of stages of pump and hence consume a smaller area than when the circuit is driven by the external power supply voltage EXVDD (for example of 1.8V) as conventional.
摘要翻译： 在本半导体器件中，正的驱动泵电路由外部电源电位EXVDD（例如1.8V）驱动以产生正电压VPC（例如2.4V）。 用于内部操作的负泵电路由正电压VPC驱动以产生对于字线的擦除或类似的内部操作所需的负电压VNA（例如-9.2V）。 用于内部操作的负泵电路可以具有较少数量的泵级，并且因此消耗比通过外部电源电压EXVDD（例如1.8V）驱动电路时更小的面积。
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公开(公告)号：US20070297251A1
公开(公告)日：2007-12-27
申请号：US11819203
申请日：2007-06-26
申请人： Taku Ogura , Tadaaki Yamauchi , Hidenori Mitani , Takashi Kubo , Kengo Aritomi
发明人： Taku Ogura , Tadaaki Yamauchi , Hidenori Mitani , Takashi Kubo , Kengo Aritomi
IPC分类号： G11C7/00
CPC分类号： G11C29/50 , G11C5/025 , G11C8/08 , G11C16/04 , G11C16/26 , G11C16/3445 , G11C16/3459 , G11C29/02 , G11C29/025 , G11C29/12005 , G11C29/80 , G11C29/82 , G11C29/832 , G11C2029/1202 , G11C2029/4402 , G11C2029/5006
摘要： A memory array including memory mats is arranged in a U shape when seen in two dimensions, and a logic circuit and an analog circuit are arranged in a region unoccupied by the memory array. This facilitates transmission of power supply voltage and signals between the peripheral circuit including the analog and logic circuits and the pad band including power supply and data pads. The analog circuit is positioned close to the power supply pad, so that voltage drop due to the resistance of power supply interconnection is restricted. It is also possible to separate a charge pumping power supply interconnection and a peripheral circuit power supply interconnection in the vicinity of the power supply pad.
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