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1.发明申请NONVOLATILE MEMORY CELL COMPRISING A DIODE AND A RESISTANCE-SWITCHING MATERIAL 有权包含二极管和电阻切换材料的非易失性存储单元公开(公告)号：US20100302836A1
公开(公告)日：2010-12-02
申请号：US12855462
申请日：2010-08-12
CPC分类号： H01L27/249 , G11C11/5685 , G11C13/0007 , G11C13/0069 , G11C2013/009 , G11C2213/15 , G11C2213/32 , G11C2213/34 , G11C2213/71 , G11C2213/72 , H01L27/101 , H01L27/2409 , H01L27/2463 , H01L45/04 , H01L45/1233 , H01L45/145 , H01L45/146
摘要： In a novel nonvolatile memory cell formed above a substrate, a diode is paired with a reversible resistance-switching material, preferably a metal oxide or nitride such as, for example, NixOy, NbxOy, TixOy, HfxOy, AlxOy, MgxOy, CoxOy, CrxOy, VxOy, ZnxOy, ZrxOy, BxNy, and AlxNy. In preferred embodiments, the diode is formed as a vertical pillar disposed between conductors. Multiple memory levels can be stacked to form a monolithic three dimensional memory array. In some embodiments, the diode comprises germanium or a germanium alloy, which can be deposited and crystallized at relatively low temperatures, allowing use of aluminum or copper in the conductors. The memory cell of the present invention can be used as a rewriteable memory cell or a one-time-programmable memory cell, and can store two or more data states.
摘要翻译： 在形成于衬底上方的新型非易失性存储单元中，二极管与可逆电阻切换材料配对，优选为金属氧化物或氮化物，例如NixOy，NbxOy，TixOy，HfxOy，AlxOy，MgxOy，CoxOy，CrxOy ，VxOy，ZnxOy，ZrxOy，BxNy和AlxNy。 在优选实施例中，二极管形成为设置在导体之间的垂直支柱。 可以堆叠多个存储器级别以形成单片三维存储器阵列。 在一些实施例中，二极管包括锗或锗合金，其可以在相对低的温度下沉积和结晶，从而允许在导体中使用铝或铜。 本发明的存储单元可以用作可重写存储单元或一次可编程存储单元，并且可以存储两个或多个数据状态。
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公开(公告)号：US07800934B2
公开(公告)日：2010-09-21
申请号：US11819077
申请日：2007-06-25
CPC分类号： G11C13/00 , G11C11/5692 , G11C13/0069 , G11C17/14 , G11C17/16 , G11C17/165 , G11C2013/009 , G11C2213/33 , H01L27/101
摘要： A method of operating a nonvolatile memory cell includes providing the nonvolatile memory cell comprising a diode which is fabricated in a first resistivity, unprogrammed state, and applying a forward bias to the diode having a magnitude greater than a minimum voltage required for programming the diode to switch the diode to a second resistivity, programmed state. The second resistivity state is lower than the first resistivity state.
摘要翻译： 一种操作非易失性存储单元的方法包括提供非易失性存储单元，该非易失性存储单元包括以第一电阻率，未编程状态制造的二极管，以及将正向偏压施加到具有大于将二极管编程所需的最小电压的二极管的幅度 将二极管切换到第二电阻率，编程状态。 第二电阻率状态低于第一电阻率状态。
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3.发明授权Nonvolatile memory cell comprising a diode and a resistance-switching material 有权包括二极管和电阻切换材料的非易失性存储单元公开(公告)号：US07812404B2
公开(公告)日：2010-10-12
申请号：US11395995
申请日：2006-03-31
IPC分类号： H01L29/76
CPC分类号： H01L27/249 , G11C11/5685 , G11C13/0007 , G11C13/0069 , G11C2013/009 , G11C2213/15 , G11C2213/32 , G11C2213/34 , G11C2213/71 , G11C2213/72 , H01L27/101 , H01L27/2409 , H01L27/2463 , H01L45/04 , H01L45/1233 , H01L45/145 , H01L45/146
摘要： In a novel nonvolatile memory cell formed above a substrate, a diode is paired with a reversible resistance-switching material, preferably a metal oxide or nitride such as, for example, NixOy, NbxOy, TixOy, HFxOy, AlxOy, MgxOy, CoxOy, CrxOy, VxOy, ZnxOy, ZrxOy, BxNy, and AlxNy. In preferred embodiments, the diode is formed as a vertical pillar disposed between conductors. Multiple memory levels can be stacked to form a monolithic three dimensional memory array. In some embodiments, the diode comprises germanium or a germanium alloy, which can be deposited and crystallized at relatively low temperatures, allowing use of aluminum or copper in the conductors. The memory cell of the present invention can be used as a rewriteable memory cell or a one-time-programmable memory cell, and can store two or more data states.
摘要翻译： 在形成在衬底上方的新型非易失性存储单元中，二极管与可逆电阻切换材料配对，优选为金属氧化物或氮化物，例如NixOy，NbxOy，TixOy，HFxOy，AlxOy，MgxOy，CoxOy，CrxOy ，VxOy，ZnxOy，ZrxOy，BxNy和AlxNy。 在优选实施例中，二极管形成为设置在导体之间的垂直支柱。 可以堆叠多个存储器级别以形成单片三维存储器阵列。 在一些实施例中，二极管包括锗或锗合金，其可以在相对低的温度下沉积和结晶，从而允许在导体中使用铝或铜。 本发明的存储单元可以用作可重写存储单元或一次可编程存储单元，并且可以存储两个或多个数据状态。
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4.发明授权Method for making a photovoltaic cell comprising contact regions doped through a lamina 有权制造光伏电池的方法，该光伏电池包括通过层间掺杂的接触区域公开(公告)号：US07858430B2
公开(公告)日：2010-12-28
申请号：US12339032
申请日：2008-12-18
CPC分类号： H01L31/03921 , H01L31/1804 , H01L31/1892 , Y02E10/547 , Y02P70/521
摘要： In aspects of the present invention, a method is disclosed to form a lamina having opposing first and second surfaces. Heavily doped contact regions extend from the first surface to the second surface. Generally the lamina is formed by affixing a semiconductor donor body to a receiver element, then cleaving the lamina from the semiconductor donor body wherein the lamina remains affixed to the receiver element. In the present invention, the heavily doped contact regions are formed by doping the semiconductor donor body before cleaving of the lamina. A photovoltaic cell comprising the lamina is then fabricated. By forming the heavily doped contact regions before bonding to the receiver element and cleaving, post-bonding high-temperature steps can be avoided, which may be advantageous.
摘要翻译： 在本发明的方面，公开了一种形成具有相对的第一和第二表面的薄片的方法。 重掺杂的接触区域从第一表面延伸到第二表面。 通常，通过将半导体施主体附着到接收器元件，然后从半导体施主体分离薄层而形成薄片，其中薄片保持固定在接收器元件上。 在本发明中，重掺杂的接触区域通过在切割层之前掺杂半导体施主体形成。 然后制造包括层板的光伏电池。 通过在接合元件接合之前形成重掺杂的接触区域并且断开，可以避免后接合高温步骤，这可能是有利的。
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5.发明申请PHOTOVOLTAIC MODULE COMPRISING THIN LAMINAE CONFIGURED TO MITIGATE EFFICIENCY LOSS DUE TO SHUNT FORMATION 审中-公开包含薄层薄膜的光伏模块配置为降低分层形成造成的效率损失公开(公告)号：US20100031995A1
公开(公告)日：2010-02-11
申请号：US12189159
申请日：2008-08-10
IPC分类号： H01L31/042 , H01L31/18
CPC分类号： H01L31/046 , H01L31/18 , H01L31/186 , H01L31/1892 , Y02E10/50 , Y02P70/521
摘要： A photovoltaic cell can be formed from a thin semiconductor lamina cleaved from a substantially crystalline wafer. Shunts may inadvertently be formed through such a lamina, compromising device performance. By physically severing the lamina into a plurality of segments, the segments of the lamina preferably electrically connected in series, loss of efficiency due to shunt formation may be substantially reduced. In some embodiments, adjacent laminae are connected in series into strings, and the strings are connected in parallel to compensate for the reduction in current caused by severing the lamina into segments.
摘要翻译： 光伏电池可以由从基本上晶体的晶片切割的薄的半导体层形成。 分流器可能无意中通过这样的层板形成，损害了设备性能。 通过将层间物理切割成多个段，优选层叠电连接的层片段，可能显着减少由于分流形成而导致的效率损失。 在一些实施例中，相邻薄片串联连接成串，并且串并联连接以补偿由层切割成片段而导致的电流减少。
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公开(公告)号：US20090194162A1
公开(公告)日：2009-08-06
申请号：US12026530
申请日：2008-02-05
IPC分类号： H01L31/028 , H01L21/00 , H01L31/04
CPC分类号： H01L31/022425 , H01L31/0682 , H01L31/0747 , H01L31/1804 , H01L31/1892 , Y02E10/547 , Y02P70/521
摘要： A very thin photovoltaic cell is formed by implanting gas ions below the surface of a donor body such as a semiconductor wafer. Ion implantation defines a cleave plane, and a subsequent step exfoliates a thin lamina from the wafer at the cleave plane. A photovoltaic cell, or all or a portion of the base or emitter of a photovoltaic cell, is formed within the lamina. In preferred embodiments, the wafer is affixed to a receiver before the cleaving step. Electrical contact can be formed to both surfaces of the lamina, or to one surface only.
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公开(公告)号：US20090181515A1
公开(公告)日：2009-07-16
申请号：US12007780
申请日：2008-01-15
IPC分类号： H01L21/329
CPC分类号： H01L29/868 , H01L27/1021
摘要： A method of making a pillar device includes providing an insulating layer having an opening, and selectively depositing germanium or germanium rich silicon germanium semiconductor material into the opening to form the pillar device.
摘要翻译： 制造柱装置的方法包括提供具有开口的绝缘层，并且将锗或富锗硅锗半导体材料选择性地沉积到开口中以形成柱装置。
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8.发明申请METHOD TO FORM LOW-DEFECT POLYCRYSTALLINE SEMICONDUCTOR MATERIAL FOR USE IN A TRANSISTOR 有权形成用于晶体管的低缺陷多晶半导体材料的方法公开(公告)号：US20080311710A1
公开(公告)日：2008-12-18
申请号：US11763671
申请日：2007-06-15
IPC分类号： H01L21/336 , H01L21/331
CPC分类号： H01L27/24 , H01L21/8221 , H01L27/0688 , H01L27/115 , H01L27/11521 , H01L27/11568 , H01L27/11578 , H01L27/12 , H01L27/1277 , H01L29/6675 , H01L29/66825 , H01L29/66833 , H01L29/7881 , H01L29/792
摘要： A method is described for forming a thin film transistor having its current-switching region in polycrystalline semiconductor material which has been crystallized in contact with titanium silicide, titanium silicide-germanide, or titanium germanide. The titanium silicide, titanium silicide-germanide, or titanium germanide is formed having feature size no more than 0.25 micron in the smallest dimension. The small feature size tends to inhibit the phase transformation from C49 to C54 phase titanium silicide. The C49 phase of titanium silicide has a very close lattice match to silicon, and thus provides a crystallization template for the silicon as it forms, allowing formation of large-grain, low-defect silicon. Titanium does not tend to migrate through the silicon during crystallization, limiting the danger of metal contamination. In preferred embodiments, the transistors thus formed may be, for example, field-effect transistors or bipolar junction transistors.
摘要翻译： 描述了一种用于形成其多晶半导体材料中具有电流切换区域的薄膜晶体管的方法，其已经与硅化钛，硅化钛 - 锗化锗或锗化锗接触而结晶化。 在最小尺寸上形成特征尺寸不超过0.25微米的硅化钛，硅化钛 - 锗化锗或锗锗。 小特征尺寸倾向于抑制从C49到C54相钛硅化物的相变。 硅化钛的C49相具有与硅非常接近的晶格匹配，因此在形成硅时提供了硅的结晶模板，从而形成大晶粒，低缺陷硅。 在结晶过程中，钛不会通过硅迁移，限制了金属污染的危险。 在优选实施例中，如此形成的晶体管可以是例如场效应晶体管或双极结型晶体管。
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公开(公告)号：US08247260B2
公开(公告)日：2012-08-21
申请号：US12499294
申请日：2009-07-08
IPC分类号： H01L21/00 , H01L21/30 , H01L31/042
CPC分类号： H01L31/022425 , H01L31/0682 , H01L31/0747 , H01L31/1804 , H01L31/1892 , Y02E10/547 , Y02P70/521
摘要： A very thin photovoltaic cell is formed by implanting gas ions below the surface of a donor body such as a semiconductor wafer. Ion implantation defines a cleave plane, and a subsequent step exfoliates a thin lamina from the wafer at the cleave plane. A photovoltaic cell, or all or a portion of the base or emitter of a photovoltaic cell, is formed within the lamina. In preferred embodiments, the wafer is affixed to a receiver before the cleaving step. Electrical contact can be formed to both surfaces of the lamina, or to one surface only.
摘要翻译： 通过在诸如半导体晶片的施主体的表面下方注入气体离子形成非常薄的光伏电池。 离子注入限定了解理面，随后的步骤在切割平面处从晶片剥离薄层。 光伏电池，或光伏电池的基极或发射极的全部或一部分形成在层内。 在优选实施例中，在切割步骤之前将晶片固定到接收器。 电接触可以形成在层的两个表面上，或仅形成在一个表面上。
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公开(公告)号：US07855119B2
公开(公告)日：2010-12-21
申请号：US11763876
申请日：2007-06-15
IPC分类号： H01L21/331 , H01L29/70
CPC分类号： H01L29/66265 , G11C17/16 , H01L29/7317
摘要： A method is described for forming a semiconductor device comprising a bipolar transistor having a base region, an emitter region and a collector region, wherein the base region comprises polycrystalline semiconductor material formed by crystallizing silicon, germanium or silicon germanium in contact with a silicide, germanide or silicide germanide. The emitter region and collector region also may be formed from polycrystalline semiconductor material formed by crystallizing silicon, germanium or silicon germanium in contact with a silicide, germanide or silicide germanide forming metal. The polycrystalline semiconductor material is preferably silicided polysilicon, which is formed in contact with C49phase titanium silicide.
摘要翻译： 描述了一种用于形成半导体器件的方法，该半导体器件包括具有基极区域，发射极区域和集电极区域的双极晶体管，其中，所述基极区域包括通过使硅，锗或硅锗与硅化物，锗化锗接触而形成的多晶半导体材料 或锗化锗。 发射极区域和集电极区域也可以由通过使硅，锗或硅锗与硅化物，锗化锗或锗化锗形成金属接触而形成的多晶半导体材料形成。 多晶半导体材料优选为与C49相钛硅化物接触形成的硅化多晶硅。
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