Test apparatus, test method, electronic device manufacturing method, test simulator and test simulation method
    3.
    发明申请
    Test apparatus, test method, electronic device manufacturing method, test simulator and test simulation method 失效
    试验装置,试验方法,电子装置制造方法,试验模拟装置及试验模拟方法

    公开(公告)号:US20060247882A1

    公开(公告)日:2006-11-02

    申请号:US11395094

    申请日:2006-03-31

    IPC分类号: G01R27/28

    摘要: Acceptability of an electronic device is determined with higher precision by performing testing regarding correlation of the timing at which multiple output signals output from the electronic device change. A test apparatus which tests an electronic device by providing test signals to the electronic device and comparing multiple output signals with respective anticipated values, comprises: reference timing detecting means for detecting that one of the output signals has changed; setting means for setting beforehand a minimum time from changing of the output signal to changing of another output signal; acquisition means for acquiring the value of the latter output signal at a timing at which the minimum time has elapsed from detection of change of the former output signal; and determination means for determining the electronic device to be defective in the event that the value of the latter output signal thus acquired does not match the value which the latter output signal should assume following elapsing of the minimum time.

    摘要翻译: 通过执行关于从电子设备输出的多个输出信号的定时的相关性的改变来更高精度地确定电子设备的可接受性。 一种测试装置,通过向电子设备提供测试信号并将多个输出信号与各个预期值进行比较来测试电子设备,包括:用于检测输出信号中的一个已经改变的参考定时检测装置; 设置装置,用于预先设定从输出信号改变到另一个输出信号改变的最小时间; 获取装置,用于在从检测到前一个输出信号的变化起经过最小时间的定时获取后一个输出信号的值; 以及确定装置,用于在如此获得的后一个输出信号的值与后一个输出信号应该在最小时间之后应该呈现的值不匹配的情况下确定电子设备有缺陷。

    Test emulator, emulation program and method for manufacturing semiconductor device

    公开(公告)号:US20060064607A1

    公开(公告)日:2006-03-23

    申请号:US11211126

    申请日:2005-08-24

    IPC分类号: G06F11/00

    摘要: A test emulator for emulating a test of a semiconductor device is provided. The test emulator includes a test pattern providing means for providing a test pattern to a device simulator which simulates the operation of a semiconductor device, an expected value storage means for associating a comparison timing at which an output signal outputted from the device simulator according to the test pattern is compared with an predetermined expected value with the expected value at the comparison timing and previously storing therein the same, a margin determination means for determining the size of a margin between which the output signal corresponds to the expected value when the output signal corresponds to the expected value at the comparison timing and a notification means for notifying a user that the margin at the comparison timing is small when the size of margin is smaller than a reference value.

    Test emulator, emulation program and method for manufacturing semiconductor device
    6.
    发明授权
    Test emulator, emulation program and method for manufacturing semiconductor device 失效
    测试仿真器,仿真程序和制造半导体器件的方法

    公开(公告)号:US07506291B2

    公开(公告)日:2009-03-17

    申请号:US11211126

    申请日:2005-08-24

    IPC分类号: G06F17/50 G06F9/45

    摘要: A test emulator for emulating a test of a semiconductor device is provided. The test emulator includes a test pattern providing means for providing a test pattern to a device simulator which simulates the operation of a semiconductor device, an expected value storage means for associating a comparison timing at which an output signal outputted from the device simulator according to the test pattern is compared with an predetermined expected value with the expected value at the comparison timing and previously storing therein the same, a margin determination means for determining the size of a margin between which the output signal corresponds to the expected value when the output signal corresponds to the expected value at the comparison timing and a notification means for notifying a user that the margin at the comparison timing is small when the size of margin is smaller than a reference value.

    摘要翻译: 提供了一种用于模拟半导体器件测试的测试仿真器。 测试模拟器包括测试模式提供装置,用于向模拟半导体器件的操作的器件模拟器提供测试模式;期望值存储装置,用于将根据所述装置模拟器输出的输出信号的比较定时相关联 将测试图案与预定值在比较定时进行比较,并预先在其中存储相同的值;边界确定装置,用于在输出信号对应于输出信号对应于期望值时确定输出信号对应的余量的大小 到达比较定时的期望值,以及通知单元,用于当余量的大小小于参考值时通知用户比较定时的余量小。

    Test program debugger device, semiconductor test apparatus, test program debugging method and test method
    7.
    发明申请
    Test program debugger device, semiconductor test apparatus, test program debugging method and test method 失效
    测试程序调试器,半导体测试仪,测试程序调试方法及测试方法

    公开(公告)号:US20060248390A1

    公开(公告)日:2006-11-02

    申请号:US11211162

    申请日:2005-08-24

    IPC分类号: G06F11/00

    CPC分类号: G06F11/263 G01R31/318314

    摘要: A test program debugging apparatus of the present invention includes a device under test simulator and a semiconductor testing apparatus simulator. Further, the semiconductor testing apparatus simulator includes: a verification range acquiring unit that acquires a verification range that is a range of commands to be verified among commands included in the test program; a command simplifying unit that simplifies non-setting commands other than setting commands for setting the device under test simulator, among non-verification range commands included in a non-verification range that is a range other than the verification range within the test program; and a command executing unit that executes the verification range commands included in the verification range, the setting commands, and the non-setting commands simplified by the command simplifying unit.

    摘要翻译: 本发明的测试程序调试装置包括被测设备模拟器和半导体测试设备模拟器。 此外,半导体测试装置模拟器包括:验证范围获取单元,其获取作为包括在测试程序中的命令之间的要被验证的命令的范围的验证范围; 命令简化单元,其在除了所述测试程序中的验证范围之外的范围内的非验证范围中包括的非验证范围命令之中,简化除设置被测设备之外的设置命令以外的非设置命令; 以及命令执行单元,其执行包括在验证范围中的验证范围命令,设置命令和由命令简化单元简化的非设置命令。

    Test program debugger device, semiconductor test apparatus, test program debugging method and test method
    9.
    发明授权
    Test program debugger device, semiconductor test apparatus, test program debugging method and test method 失效
    测试程序调试器,半导体测试仪,测试程序调试方法及测试方法

    公开(公告)号:US07269773B2

    公开(公告)日:2007-09-11

    申请号:US11211162

    申请日:2005-08-24

    IPC分类号: G06F11/00

    CPC分类号: G06F11/263 G01R31/318314

    摘要: A test program debugging apparatus of the present invention includes a device under test simulator and a semiconductor testing apparatus simulator. Further, the semiconductor testing apparatus simulator includes: a verification range acquiring unit that acquires a verification range that is a range of commands to be verified among commands included in the test program; a command simplifying unit that simplifies non-setting commands other than setting commands for setting the device under test simulator, among non-verification range commands included in a non-verification range that is a range other than the verification range within the test program; and a command executing unit that executes the verification range commands included in the verification range, the setting commands, and the non-setting commands simplified by the command simplifying unit.

    摘要翻译: 本发明的测试程序调试装置包括被测设备模拟器和半导体测试设备模拟器。 此外,半导体测试装置模拟器包括:验证范围获取单元,其获取作为包括在测试程序中的命令之间的要被验证的命令范围的验证范围; 命令简化单元,其在除了所述测试程序中的验证范围之外的范围内的非验证范围中包括的非验证范围命令之中,简化除设置被测设备之外的设置命令以外的非设置命令; 以及命令执行单元,其执行包括在验证范围中的验证范围命令,设置命令和由命令简化单元简化的非设置命令。

    Test simulator, test simulation program and recording medium
    10.
    发明申请
    Test simulator, test simulation program and recording medium 失效
    测试模拟器,测试仿真程序和记录介质

    公开(公告)号:US20060085682A1

    公开(公告)日:2006-04-20

    申请号:US11240811

    申请日:2005-09-30

    IPC分类号: G06F11/00

    摘要: There is provided a test simulator simulating a test of a semiconductor device, which includes: a test pattern holding means for holding an existing test pattern to be supplied to the semiconductor device; a device output holding means for previously holding an output to be obtained from the semiconductor device when the existing test pattern is supplied; a test pattern generating means for generating a new test pattern to be supplied to the semiconductor device; a test pattern deciding means for deciding whether the new test pattern is equal to the existing test pattern; and a simulation skipping means for skipping at least a part of a simulation test by reading an output from the device output holding means and using the output as an output for the new test pattern without supplying the new test pattern to the semiconductor device when the test patterns are equal to each other.

    摘要翻译: 提供了模拟半导体器件测试的测试模拟器,其包括:用于保持要提供给半导体器件的现有测试图案的测试图案保持装置; 装置输出保持装置,用于在提供现有测试图案时预先保持从半导体装置获得的输出; 测试图形产生装置,用于产生要提供给半导体器件的新测试图案; 测试模式决定装置,用于判定新的测试模式是否等于现有的测试模式; 以及模拟跳过装置,用于通过读取来自装置输出保持装置的输出并使用该输出作为新测试图案的输出而跳过至少一部分模拟测试,而在测试时不向半导体装置提供新的测试图案 模式彼此相等。