公开(公告)号：US4510458A

公开(公告)日：1985-04-09

申请号：US409051

申请日：1982-08-18

申请人： Tetsuo Sato ,  Yasuo Kominami ,  Yoshiyuki Takizawa ,  Akira Haeno

发明人： Tetsuo Sato ,  Yasuo Kominami ,  Yoshiyuki Takizawa ,  Akira Haeno

IPC分类号： H03F1/34 ,  H03F1/32 ,  H03F3/45

CPC分类号： H03F1/3223

摘要： An amplifier circuit has an operational amplifier and a negative feedback circuit. An input signal is applied to the non-inverting input terminal of the operational amplifier, whereby a first output signal is provided from the output terminal of the operational amplifier. The first output signal is fed back to the inverting input terminal of the operational amplifier through the negative feedback circuit. The negative feedback signal of the negative feedback circuit is fed back to the inverting input terminal through an impedance converter. Thus, a second output signal of low distortion factor is derived from the output terminal of the impedance converter.

摘要翻译： 放大器电路具有运算放大器和负反馈电路。 输入信号被施加到运算放大器的非反相输入端，由此从运算放大器的输出端提供第一输出信号。 第一输出信号通过负反馈电路反馈到运算放大器的反相输入端。 负反馈电路的负反馈信号通过阻抗转换器反馈到反相输入端。 因此，从阻抗转换器的输出端导出低失真因子的第二输出信号。

公开(公告)号：US4500932A

公开(公告)日：1985-02-19

申请号：US384602

申请日：1982-06-03

申请人： Tetsuo Sato ,  Yasuo Kominami

发明人： Tetsuo Sato ,  Yasuo Kominami

IPC分类号： G11B5/035 ,  G11B5/45 ,  G11B5/02

CPC分类号： G11B5/035

摘要： A signal processing circuit which can be used, for example, as a playback equalizer is formed in a semiconductor integrated circuit with a main path and a side path arrayed between the input terminal and the output terminal of the integrated circuit. The signals at the ends of the main and side paths are added together to obtain the output signal for the signal processor. A filter in the main path determines its frequency characteristics. On the other hand, a variable gain control means having substantially flat frequency characteristics is inserted in the side path and its gain can be changed in response to control data to control the output signal of the signal processor.

摘要翻译： 可以用作例如重放均衡器的信号处理电路形成在具有排列在集成电路的输入端子和输出端子之间的主路径和侧向通道的半导体集成电路中。 将主路和侧路径两端的信号相加在一起以获得信号处理器的输出信号。 主路径中的滤波器决定其频率特性。 另一方面，具有基本上平坦的频率特性的可变增益控制装置插入在侧路径中，并且可以响应于控制数据改变其增益，以控制信号处理器的输出信号。

公开(公告)号：US4354209A

公开(公告)日：1982-10-12

申请号：US231369

申请日：1981-02-03

申请人： Tetsuo Sato ,  Yasuo Kominami

发明人： Tetsuo Sato ,  Yasuo Kominami

IPC分类号： G11B20/02 ,  G11B23/00 ,  H03G9/02 ,  G11B15/12 ,  G11B5/02

CPC分类号： H03G9/025 ,  G11B23/0007

摘要： A recording/playing circuit includes a noise reduction circuit, a switching circuit and a control circuit. The noise reduction circuit includes a pre-amplifier, a combining network, an inverter circuit and a side chain. The switching circuit has first, second and third input positions and an output terminal. The first input position is coupled to the output of the pre-amplifier, the second input position is coupled to the output of the inverter circuit, and the output terminal is coupled to the side chain. The third input position is connected to a muting circuit. The control circuit controls the switching circuit so that one of the electric signals applied to the first, second and third input positions of the switching circuit may be selectively transmitted to the output terminal of the switching circuit.

摘要翻译： 记录/播放电路包括噪声降低电路，开关电路和控制电路。 降噪电路包括前置放大器，组合网络，逆变器电路和侧链。 开关电路具有第一，第二和第三输入位置和输出端子。 第一输入位置耦合到前置放大器的输出，第二输入位置耦合到反相器电路的输出，输出端耦合到侧链。 第三输入位置连接到静音电路。 控制电路控制开关电路，使得施加到开关电路的第一，第二和第三输入位置的电信号中的一个可以选择性地发送到开关电路的输出端子。

公开(公告)号：US4412189A

公开(公告)日：1983-10-25

申请号：US262814

申请日：1981-05-12

申请人： Yasuo Kominami ,  Tetsuo Sato ,  Yuichi Ohkubo

发明人： Yasuo Kominami ,  Tetsuo Sato ,  Yuichi Ohkubo

IPC分类号： H03G9/02 ,  H04B1/64

CPC分类号： H03G9/025

摘要： Either an input signal of a combining network or an output signal of an inverter arranged on a main path is fed to a side path through a mode switch in a switchable signal compressor/signal expander. Since an input terminal of a control amplifier is connected to a variable filter without passing through a signal amplifier, the deviation of the detection characteristic of a rectifier and integrator attributed to D.C. offset voltages of the signal amplifier and the control amplifier can be reduced. On the other hand, a switchable signal compressor/signal expander in another aspect of performance has a reference voltage generator for producing a D.C. reference voltage, and the output D.C. level of the control amplifier is maintained at a level approximate to the D.C. reference voltage. The other ends of first and second capacitors of the rectifier and integrator are also supplied with the D.C. reference voltage, so that the fluctuation of the detection characteristic of the rectifier and integrator ascribable to the fluctuation of the D.C. reference voltage is reduced.

摘要翻译： 组合网络的输入信号或布置在主路径上的反相器的输出信号被馈送到可切换信号压缩器/信号扩展器中的模式开关的侧路径。 由于控制放大器的输入端子连接到可变滤波器而不通过信号放大器，所以可以减小归因于信号放大器和控制放大器的直流偏移电压的整流器和积分器的检测特性的偏差。 另一方面，另一方面的可切换信号压缩器/信号扩展器具有用于产生直流参考电压的参考电压发生器，并且控制放大器的输出直流电平保持在接近直流参考电压的电平。 整流器和积分器的第一和第二电容器的另一端还具有直流参考电压，从而降低归因于直流参考电压的波动的整流器和积分器的检测特性的波动。

公开(公告)号：US5512888A

公开(公告)日：1996-04-30

申请号：US253506

申请日：1994-06-03

申请人： Masakazu Hoshino ,  Tetsuo Sato

发明人： Masakazu Hoshino ,  Tetsuo Sato

IPC分类号： G06F13/42 ,  H04L12/413 ,  G08C19/16

CPC分类号： G06F13/4291 ,  H04L12/4135

摘要： In a communications system having a plurality of stations interconnected by a two-line circuit, in which the two-line circuit consists of a data bus circuit for transmitting a series of data bits between at least one sending station and at least one receiving station of the plurality of stations and a clock bus circuit for transmitting clock signals in synchronism with each of the data bits; the data bus circuit sends a signal or a command requesting the receiving station to enter a standby or an execute state after taking in data supplied, while a logic value on the clock bus circuit is fixed. In more detail, the sending station transmits signals to make at least one of the receiving stations enter the standby state after taking in data and then sends data to another receiving station, after which the sending station sends a signal or command to make both the first and second receiving stations simultaneously enter the execute state. The signal or command requesting the standby or execute state is added at the end of a data packet containing a series of data. The data packet includes data to be transferred to the receiving station and an address of the receiving station.

摘要翻译： 在具有通过双线电路互连的多个站的通信系统中，其中双线电路由用于在至少一个发送站和至少一个接收站之间传送一系列数据位的数据总线电路组成 多个站和用于与每个数据位同步发送时钟信号的时钟总线电路; 数据总线电路在接收到所提供的数据之后发送一个信号或命令请求接收站进入待机或执行状态，同时时钟总线电路上的逻辑值是固定的。 更详细地，发送站发送信号，使接收站中的至少一个在接收数据之后进入待机状态，然后将数据发送到另一个接收站，之后发送站发送信号或命令，使第一个 第二接收站同时进入执行状态。 在包含一系列数据的数据包的末尾添加请求待机或执行状态的信号或命令。 数据分组包括要传送到接收站的数据和接收站的地址。

公开(公告)号：US4614863A

公开(公告)日：1986-09-30

申请号：US650173

申请日：1984-09-13

申请人： Tetsuo Sato

发明人： Tetsuo Sato

IPC分类号： G02B7/28 ,  G11B7/09 ,  G01J1/20

CPC分类号： G11B7/0946 ,  G11B7/0903 ,  G11B7/0909 ,  G11B7/0941 ,  G11B7/0948

摘要： A digital audio disc player is equipped with a tracking/focus servo mechanism which automatically controls the tracking and focusing of a light beam projected on a disc. The vibration of an automobile or other vehicle containing the player is detected so that, when there is a significant amount of vibration, the control sensitivity of the tracking/focus servo mechanism is increased to prevent the occurrence of tracking and focusing errors.

摘要翻译： 数字音频光盘播放器配备有跟踪/聚焦伺服机构，其自动控制投影在盘上的光束的跟踪和聚焦。 检测包含播放器的汽车或其他车辆的振动，使得当有大量振动时，跟踪/聚焦伺服机构的控制灵敏度增加以防止发生跟踪和聚焦误差。

公开(公告)号：US4571572A

公开(公告)日：1986-02-18

申请号：US715258

申请日：1985-03-25

申请人： Tsutomu Noda ,  Yoshimi Iso ,  Tetsuo Sato

发明人： Tsutomu Noda ,  Yoshimi Iso ,  Tetsuo Sato

IPC分类号： G11B20/00 ,  G11B20/10 ,  H03M1/00 ,  H03M1/82

CPC分类号： G11B20/10527 ,  G11B20/00992 ,  H03M1/82

摘要： A digital-to-analogue converter for use in a digitally-recorded-signal reproducing apparatus comprises a first constant current source, a switch for allowing the constant current of the first constant current source to flow therethrough for a period corresponding to the digital data, a second constant current source generating a current flowing in the direction opposite to that of the current generated by the first constant current source, a switch for allowing the current of the second constant current source to flow therethrough for a predetermined constant period, and an integrator, wherein the sum of the first and second constant currents is integrated by the integrator. The analogue signal outputted by the integrator has a center level in the vicinity of the ground potential level.

摘要翻译： 用于数字记录信号再现装置的数模转换器包括第一恒流源，用于允许第一恒流源的恒定电流流过其中数字数据对应的时段的开关， 产生沿与第一恒定电流源产生的电流相反的方向流动的电流的第二恒流源，用于允许第二恒流源的电流流过预定的恒定周期的开关，以及积分器 ，其中第一和第二恒定电流的和由积分器积分。 由积分器输出的模拟信号具有接地电位电平附近的中心电平。

公开(公告)号：US20140077778A1

公开(公告)日：2014-03-20

申请号：US13617744

申请日：2012-09-14

申请人： Tetsuo Sato ,  Tomoaki Uno ,  Hirokazu Kato ,  Nobuyoshi Matsuura

发明人： Tetsuo Sato ,  Tomoaki Uno ,  Hirokazu Kato ,  Nobuyoshi Matsuura

IPC分类号： H01L29/78 ,  G05F1/00

CPC分类号： H02M3/158 ,  H01L27/0629 ,  H01L28/10 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/42336 ,  H01L29/4916 ,  H01L29/7803 ,  H01L29/7813 ,  H02M1/08 ,  H02M1/44 ,  H03K7/08 ,  H03K17/162 ,  H03K17/165 ,  H03K2017/6878 ,  H03K2217/0036

摘要： A trench MOSFET is disclosed that includes a semiconductor substrate having a vertically oriented trench containing a gate. The trench MOSFET further includes a source, a drain, and a conductive element. The conductive element, like the gate is contained in the trench, and extends between the gate and a bottom of the trench. The conductive element is electrically isolated from the source, the gate, and the drain. When employed in a device such as a DC-DC converter, the trench MOSFET may reduce power losses and electrical and electromagnetic noise.

摘要翻译： 公开了一种沟槽MOSFET，其包括具有包含栅极的垂直取向沟槽的半导体衬底。 沟槽MOSFET还包括源极，漏极和导电元件。 导电元件像栅极一样被包含在沟槽中，并且在栅极和沟槽的底部之间延伸。 导电元件与源极，栅极和漏极电隔离。 当用于诸如DC-DC转换器的器件中时，沟槽MOSFET可以减少功率损耗和电和电磁噪声。

公开(公告)号：US20120262122A1

公开(公告)日：2012-10-18

申请号：US13088541

申请日：2011-04-18

申请人： Tetsuo Sato ,  Tsutomu Kawano ,  Koji Kashimoto ,  Takao Hidaka ,  Tsuyoshi Ota ,  Ryoji Kato

发明人： Tetsuo Sato ,  Tsutomu Kawano ,  Koji Kashimoto ,  Takao Hidaka ,  Tsuyoshi Ota ,  Ryoji Kato

IPC分类号： H02J7/00

CPC分类号： H02J7/0047 ,  G01R19/0092 ,  G01R31/3606 ,  G01R31/3686 ,  H02J7/00 ,  H02J7/0031 ,  H02J7/0068 ,  H02J2007/0037 ,  H02J2007/004

摘要： A battery management method and apparatus. In one embodiment of the method, a source current is divided into Ic and Icr. Ic is transmitted to and charges a battery. A first voltage is generated that is related to Icr. The first voltage is converted into a first digital signal. A processing unit receives and processes the first digital signal in accordance with instructions stored in a memory. The transmission of Ic to the battery is interrupted in response to the processing unit processing the first digital signal. Current provided by the battery is divided into Idc and Idcr. Idc is transmitted to a device. A second voltage is generated that is related to Idcr. The second voltage is converted into a second digital signal. The processing unit receives and processes the second digital signal in accordance with instructions stored in the memory. The transmission of Idc to the battery is interrupted in response to the processing unit processing the second digital signal.

摘要翻译： 一种电池管理方法和装置。 在该方法的一个实施例中，源电流被分为Ic和Icr。 Ic被传输到电池并对其充电。 产生与Icr有关的第一个电压。 第一电压被转换成第一数字信号。 处理单元根据存储在存储器中的指令接收并处理第一数字信号。 响应于处理单元处理第一数字信号，Ic对电池的传输中断。 电池提供的电流分为Idc和Idcr。 Idc被发送到设备。 产生与Idcr相关的第二电压。 第二电压被转换为第二数字信号。 处理单元根据存储在存储器中的指令接收和处理第二数字信号。 响应于处理单元处理第二数字信号，Idc向电池的传输中断。

公开(公告)号：US20110177259A1

公开(公告)日：2011-07-21

申请号：US13061369

申请日：2009-08-27

申请人： Tetsuo Sato ,  Tetsuzo Yoshimura

发明人： Tetsuo Sato ,  Tetsuzo Yoshimura

IPC分类号： B05D5/06 ,  B05D3/06

CPC分类号： G02B6/138 ,  B82Y20/00 ,  G02B1/045 ,  G02B6/1223 ,  G02B6/30

摘要： A method for readily manufacturing an optical waveguide having a high Δn value at low cost, and in specific, a self-organizing optical waveguide that optical waveguides having a high Δn value can be connected to each other; and a method for manufacturing the self-organizing optical waveguide. A method for manufacturing an optical waveguide, including step (A): forming a coating film on a lower clad portion using a coating solution including an oxide precursor containing a titanium atom and a silicon atom; and step (B): irradiating the coating film with a radiation beam under heating to form a core/clad layer including an irradiated core region having a higher refractive index and an unirradiated clad region having a refractive index lower than that of the core region.

摘要翻译： 可以以低成本容易地制造具有高Dgr n值的光波导的方法，具体而言，具有高Dgr n值的光波导的自组织光波导可以彼此连接; 以及一种用于制造自组织光波导的方法。 一种制造光波导的方法，包括步骤（A）：使用包含含有钛原子和硅原子的氧化物前体的涂布溶液在下包层部分上形成涂膜; 和步骤（B））：在加热下用辐射束照射涂膜以形成包含折射率较高的折射率低于核心区域的折射率的未被照射的包层区域的芯/包覆层。