公开(公告)号：US20090297917A1

公开(公告)日：2009-12-03

申请号：US12091734

申请日：2006-10-27

申请人： Masahiko Higashi ,  Tetsuro Fujimoto

发明人： Masahiko Higashi ,  Tetsuro Fujimoto

IPC分类号： H01M8/02 ,  B32B15/04 ,  H01M2/02

CPC分类号： H01M8/021 ,  H01M8/0204 ,  H01M8/0208 ,  H01M8/0217 ,  H01M8/0228 ,  H01M8/2425

摘要： The present invention provides a heat-resistant alloy member which hardly causes external diffusion of Cr, an alloy member for a fuel cell, a collector member for a fuel cell, a cell stack, and a fuel cell apparatus.The surface of a collector base material 201 containing Cr is coated with a Cr diffusion preventing layer 203 made of an oxide containing Zn and Mn and a coating layer 202 made of an oxide containing Zn is formed on the surface of the Cr diffusion preventing layer 203. The coating layer 202 preferably contains at least one kind of Al and Fe as a trivalent or higher valent positive metal element.

摘要翻译： 本发明提供一种难以引起Cr的外部扩散的耐热合金构件，燃料电池用合金构件，燃料电池用集电体构件，电池组以及燃料电池装置。 包含Cr的集电体基材201的表面涂覆有由包含Zn和Mn的氧化物制成的Cr扩散防止层203，并且在Cr扩散防止层203的表面上形成由包含Zn的氧化物制成的涂层202 涂层202优选含有三价以上的金属元素中的至少一种Al和Fe。

公开(公告)号：US20120315564A1

公开(公告)日：2012-12-13

申请号：US13580639

申请日：2011-02-25

申请人： Tetsuro Fujimoto ,  Masahiko Higashi

发明人： Tetsuro Fujimoto ,  Masahiko Higashi

IPC分类号： H01M8/02 ,  B32B15/04 ,  H01M8/04 ,  H01M4/64 ,  H01M8/24

CPC分类号： H01M8/0217 ,  C22C18/04 ,  C22C19/05 ,  C22C19/058 ,  C22C38/18 ,  C23C14/08 ,  C23C28/345 ,  H01M8/0228 ,  H01M2008/1293

摘要： A composite body includes a substrate containing Cr; and a first composite oxide layer disposed on at least a part of a surface of the substrate, the first composite oxide layer having a spinel type crystal structure, a first largest content and a second largest content among constituent elements excluding oxygen of the first composite oxide layer being Zn and Al in random order. Accordingly, the composite body can suppress diffusion of Cr from the substrate containing Cr to the first composite oxide layer, and has improved long-term reliability. A collector member and a gas tank, each of which is formed of the composite body, can have improved long-term reliability. A fuel cell device having excellent long-term reliability can be obtained using the collector member and the gas tank.

摘要翻译： 复合体包括含有Cr的基材; 以及设置在所述基板的表面的至少一部分上的第一复合氧化物层，所述第一复合氧化物层具有尖晶石型晶体结构，除了所述第一复合氧化物的氧以外的构成元素中的第一大含量和第二大含量 层以Zn和Al的顺序排列。 因此，复合体能够抑制Cr从含有Cr的基板向第一复合氧化物层的扩散，并且具有提高的长期可靠性。 由复合体形成的集电体和气罐可以提高长期的可靠性。 可以使用集电体和气罐来获得具有优异的长期可靠性的燃料电池装置。

公开(公告)号：US09935320B2

公开(公告)日：2018-04-03

申请号：US13580639

申请日：2011-02-25

申请人： Tetsurou Fujimoto ,  Masahiko Higashi

发明人： Tetsurou Fujimoto ,  Masahiko Higashi

IPC分类号： H01M8/02 ,  H01M8/0217 ,  C23C28/00 ,  H01M8/0228 ,  C22C18/04 ,  C22C19/05 ,  C22C38/18 ,  C23C14/08 ,  H01M8/124

CPC分类号： H01M8/0217 ,  C22C18/04 ,  C22C19/05 ,  C22C19/058 ,  C22C38/18 ,  C23C14/08 ,  C23C28/345 ,  H01M8/0228 ,  H01M2008/1293

摘要： A composite body includes a substrate containing Cr; and a first composite oxide layer disposed on at least a part of a surface of the substrate, the first composite oxide layer having a spinel type crystal structure, a first largest content and a second largest content among constituent elements excluding oxygen of the first composite oxide layer being Zn and Al in random order. Accordingly, the composite body can suppress diffusion of Cr from the substrate containing Cr to the first composite oxide layer, and has improved long-term reliability. A collector member and a gas tank, each of which is formed of the composite body, can have improved long-term reliability. A fuel cell device having excellent long-term reliability can be obtained using the collector member and the gas tank.

公开(公告)号：US08952536B2

公开(公告)日：2015-02-10

申请号：US12199690

申请日：2008-08-27

申请人： Masahiko Higashi ,  Hiroyuki Nansei

发明人： Masahiko Higashi ,  Hiroyuki Nansei

IPC分类号： H01L23/52 ,  H01L27/105 ,  H01L21/265 ,  H01L27/115

CPC分类号： H01L27/105 ,  H01L21/26586 ,  H01L27/11534 ,  H01L27/11568

摘要： A semiconductor memory device employs a SONOS type memory architecture and includes a bit line diffusion layer in a shallow trench groove in which a conductive film is buried. This makes it possible to decrease the resistivity of the bit line diffusion layer without enlarging the area on the main surface of the semiconductor substrate, and to fabricate the semiconductor memory device having stable electric characteristics without enlarging the cell area. The bit line is formed by implanting ions into the sidewall of Si3N4.

公开(公告)号：US08749012B2

公开(公告)日：2014-06-10

申请号：US12004969

申请日：2007-12-20

申请人： Masahiko Higashi ,  Naoki Takeguchi

发明人： Masahiko Higashi ,  Naoki Takeguchi

IPC分类号： H01L31/058

CPC分类号： H01L27/11568 ,  H01L23/5256 ,  H01L27/115 ,  H01L29/66833 ,  H01L2924/0002 ,  H01L2924/00

摘要： Methods and structures for discharging plasma formed during the fabrication of semiconductor device are disclosed. The semiconductor device includes a wordline, a common ground line and a fuse structure for electrically coupling the wordline and the common ground line until a break signal is applied via the fuse structure.

摘要翻译： 公开了在制造半导体器件期间形成的用于放电等离子体的方法和结构。 半导体器件包括字线，公共接地线和用于电耦合字线和公共接地线的熔丝结构，直到通过熔丝结构施加断开信号。

公开(公告)号：US20130020673A1

公开(公告)日：2013-01-24

申请号：US13547496

申请日：2012-07-12

申请人： Atsushi HIRAMA ,  Masahiko Higashi

发明人： Atsushi HIRAMA ,  Masahiko Higashi

IPC分类号： H01L27/08

CPC分类号： H01L27/0255 ,  H01L29/0649 ,  H01L29/861

摘要： A protection diode includes a semiconductor substrate having a first region, a second region surrounding the first region, and a third region surrounding the second region; a first insulation layer disposed between the second region and the third region; a first conductive type semiconductor portion disposed in the third region; a second conductive type semiconductor portion disposed in the second region; and a capacity reduction layer disposed in the first region.

摘要翻译： 保护二极管包括具有第一区域，围绕第一区域的第二区域和围绕第二区域的第三区域的半导体衬底; 设置在所述第二区域和所述第三区域之间的第一绝缘层; 设置在所述第三区域中的第一导电型半导体部分; 设置在所述第二区域中的第二导电型半导体部分; 以及设置在所述第一区域中的容量降低层。

公开(公告)号：US20070099406A1

公开(公告)日：2007-05-03

申请号：US11551861

申请日：2006-10-23

申请人： Masahiko Higashi ,  Satoshi Kume ,  Jiro Yugami ,  Shinichi Yamanari ,  Takahiro Maruyama ,  Itaru Kanno

发明人： Masahiko Higashi ,  Satoshi Kume ,  Jiro Yugami ,  Shinichi Yamanari ,  Takahiro Maruyama ,  Itaru Kanno

IPC分类号： H01L21/3205 ,  H01L21/4763 ,  H01L21/336

CPC分类号： H01L21/32134 ,  H01L21/28079 ,  H01L21/823842 ,  H01L21/82385 ,  H01L29/4958

摘要： In a semiconductor device manufacturing method of the invention, a metal film, for forming a gate electrode, is formed on a gate insulating film. Subsequently, when the metal film is processed, part of the metal film is removed by a wet etching process using a given chemical liquid.

摘要翻译： 在本发明的半导体器件制造方法中，在栅极绝缘膜上形成用于形成栅电极的金属膜。 随后，当处理金属膜时，通过使用给定的化学液体的湿蚀刻工艺去除部分金属膜。

公开(公告)号：US20060076598A1

公开(公告)日：2006-04-13

申请号：US11237591

申请日：2005-09-27

申请人： Masahiko Higashi ,  Hiroyuki Nansei

发明人： Masahiko Higashi ,  Hiroyuki Nansei

IPC分类号： H01L29/94

CPC分类号： H01L27/105 ,  H01L21/26586 ,  H01L27/11534 ,  H01L27/11568

摘要： A semiconductor memory device employs a SONOS type memory architecture and includes a bit line diffusion layer in a shallow trench groove in which a conductive film is buried. This makes it possible to decrease the resistivity of the bit line diffusion layer without enlarging the area on the main surface of the semiconductor substrate, and to fabricate the semiconductor memory device having stable electric characteristics without enlarging the cell area. The bit line is formed by implanting ions into the sidewall of Si3N4.

摘要翻译： 半导体存储器件采用SONOS型存储器架构，并且在其中埋入导电膜的浅沟槽沟槽中包括位线扩散层。 这使得可以在不扩大半导体衬底的主表面上的面积的情况下降低位线扩散层的电阻率，并且制造具有稳定的电特性的半导体存储器件而不扩大单元面积。 位线通过将离子注入到Si 3 N 4 N 3的侧壁中而形成。

公开(公告)号：US08278171B2

公开(公告)日：2012-10-02

申请号：US13081777

申请日：2011-04-07

申请人： Kenichi Fujii ,  Masahiko Higashi

发明人： Kenichi Fujii ,  Masahiko Higashi

IPC分类号： H01L21/336

CPC分类号： H01L21/26513 ,  H01L21/74 ,  H01L27/115 ,  H01L27/11568 ,  H01L29/66833

摘要： There are provided a semiconductor device and a fabrication method therefor including an ONO film (18) formed on a semiconductor substrate (10), a word line (24) formed on the ONO film (18), a bit line (20) formed in the semiconductor substrate (10), and a conductive layer (32) that is in contact with the bit line (20), runs in a length direction of the bit line (20), and includes a polysilicon layer or a metal layer. In accordance with the present invention, a semiconductor device and a fabrication method therefor are provided wherein degradation of the writing and erasing characteristics and degradation of the transistor characteristics such as a junction leakage are suppressed, and the bit line resistance is decreased.

摘要翻译： 提供了一种半导体器件及其制造方法，其包括形成在半导体衬底（10）上的ONO膜（18），形成在ONO膜（18）上的字线（24），形成在 半导体衬底（10）和与位线（20）接触的导电层（32）在位线（20）的长度方向上延伸，并且包括多晶硅层或金属层。 根据本发明，提供一种半导体器件及其制造方法，其中抑制了写入和擦除特性的劣化以及诸如结漏电的晶体管特性的劣化，并且位线电阻降低。

公开(公告)号：US07943982B2

公开(公告)日：2011-05-17

申请号：US11444216

申请日：2006-05-30

申请人： Kenichi Fujii ,  Masahiko Higashi

发明人： Kenichi Fujii ,  Masahiko Higashi

IPC分类号： H01L29/792

CPC分类号： H01L21/26513 ,  H01L21/74 ,  H01L27/115 ,  H01L27/11568 ,  H01L29/66833

摘要： There are provided a semiconductor device and a fabrication method therefor including an ONO film (18) formed on a semiconductor substrate (10), a word line (24) formed on the ONO film (18), a bit line (20) formed in the semiconductor substrate (10), and a conductive layer (32) that is in contact with the bit line (20), runs in a length direction of the bit line (20), and includes a polysilicon layer or a metal layer. In accordance with the present invention, a semiconductor device and a fabrication method therefor are provided wherein degradation of the writing and erasing characteristics and degradation of the transistor characteristics such as a junction leakage are suppressed, and the bit line resistance is decreased.

摘要翻译： 提供了一种半导体器件及其制造方法，其包括形成在半导体衬底（10）上的ONO膜（18），形成在ONO膜（18）上的字线（24），形成在 半导体衬底（10）和与位线（20）接触的导电层（32）在位线（20）的长度方向上延伸，并且包括多晶硅层或金属层。 根据本发明，提供一种半导体器件及其制造方法，其中抑制了写入和擦除特性的劣化以及诸如结漏电的晶体管特性的劣化，并且位线电阻降低。