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1.发明授权Information processing system and logic LSI, detecting a fault in the system or the LSI, by using internal data processed in each of them 失效信息处理系统和逻辑LSI，通过使用它们中的每一个处理的内部数据来检测系统或LSI中的故障
公开(公告)号：US6101627A
公开(公告)日：2000-08-08
申请号：US206153
申请日：1998-12-07
IPC分类号： G06F11/16 , G06F11/18 , G06F11/20 , G06F11/22 , G06F11/30 , G06F13/00 , G06F15/78 , H02H3/05 , G06F7/02 , G06F11/08
CPC分类号： G06F11/1637 , G06F11/1654 , G06F11/2025 , G06F11/2038 , G06F11/2043
摘要： An information processing system has a plurality of processor circuits, each of the processor circuits including internal circuits and an internal processing result outputting circuit, the system having an internal data selection circuit connected to each of the processor circuits and at least one fault detection circuit. The internal processing result outputting circuit of each of the processor circuits outputs respective ones result data processed by respective ones of the internal circuits in the processor circuit. Each of the internal data selection circuit selects and outputs one selected result data output from the internal processing result outputting circuit of each of the processor circuits, at a predetermined timing. The fault detection circuit outputs a result of a comparison among the data selected by the respective internal data selection circuits of the processor circuits or among the data output at each predetermined timing by the processor circuits.
摘要翻译： 信息处理系统具有多个处理器电路，每个处理器电路包括内部电路和内部处理结果输出电路，该系统具有连接到每个处理器电路的内部数据选择电路和至少一个故障检测电路。 每个处理器电路的内部处理结果输出电路输出由处理器电路中的各个内部电路处理的各个结果数据。 每个内部数据选择电路在预定的定时选择并输出从每个处理器电路的内部处理结果输出电路输出的一个选择的结果数据。 故障检测电路输出由处理器电路的各个内部数据选择电路选择的数据或由处理器电路在每个预定定时输出的数据之间的比较结果。
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公开(公告)号：US5848238A
公开(公告)日：1998-12-08
申请号：US778685
申请日：1997-01-03
CPC分类号： G06F11/1637 , G06F11/1654 , G06F11/2025 , G06F11/2038 , G06F11/2043
摘要： An information processing system has a plurality of processor circuits, each of the processor circuits including internal circuits and an internal processing result outputting circuit, the system having an internal data selection circuit connected to each of the processor circuits and at least one fault detection circuit. The internal processing result outputting circuit of each of the processor circuits outputs respective result data processed by respective ones of the internal circuits in the processor circuit. Each of the internal data selection circuit selects and outputs one selected result data output from the internal processing result outputting circuit of each of the processor circuits, at a predetermined timing. The fault detection circuit outputs a result of a comparison among the data selected by the respective internal data selection circuits of the processor circuits or among the data output at each predetermined timing by the processor circuits.
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3.发明授权Information processing system and logic LSI, detecting a fault in the system or the LSI, by using internal data processed in each of them 失效信息处理系统和逻辑LSI，通过使用它们中的每一个处理的内部数据来检测系统或LSI中的故障公开(公告)号：US06385755B1
公开(公告)日：2002-05-07
申请号：US09613276
申请日：2000-07-10
IPC分类号： G11C2900
CPC分类号： G06F11/1637 , G06F11/1654 , G06F11/2025 , G06F11/2038 , G06F11/2043
摘要： An information processing system has a plurality of processor circuits, each of the processor circuits including internal circuits and an internal processing result outputting circuit, the system having an internal data selection circuit connected to each of the processor circuits and at least one fault detection circuit. The internal processing result outputting circuit of each of the processor circuits outputs respective result data processed by respective ones of the internal circuits in the processor circuit. Each of the internal data selection circuit selects and outputs one selected result data output from the internal processing result outputting circuit of each of the processor circuits, at a predetermined timing. The fault detection circuit outputs a result of a comparison among the data selected by the respective internal data selection circuits of the processor circuits or among the data output at each predetermined timing by the processor circuits.
摘要翻译： 信息处理系统具有多个处理器电路，每个处理器电路包括内部电路和内部处理结果输出电路，该系统具有连接到每个处理器电路的内部数据选择电路和至少一个故障检测电路。 每个处理器电路的内部处理结果输出电路输出由处理器电路中的各个内部电路处理的各个结果数据。 每个内部数据选择电路在预定的定时选择并输出从每个处理器电路的内部处理结果输出电路输出的一个选择的结果数据。 故障检测电路输出由处理器电路的各个内部数据选择电路选择的数据或由处理器电路在每个预定定时输出的数据之间的比较结果。
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公开(公告)号：US07089097B2
公开(公告)日：2006-08-08
申请号：US11227075
申请日：2005-09-16
IPC分类号： G06F7/00
CPC分类号： B60W50/00 , B60T8/885 , B60T2270/406 , B60W50/0205 , B60W2050/0006 , F02D41/22 , F02D41/266 , F02D41/3005 , F02D2400/18
摘要： A low-cost vehicle control system and a car using the system controls radiation of an actuator driver and thereby reduces the radiation component cost and allows downsizing of an electronic control unit to improve the versatility. The vehicle control system has an electronic control unit, a plurality of actuators and actuator drivers for driving the actuators at the actuator side. The actuator drivers, respectively, have an independent self-diagnosis section, a self-protection section, and a communication control section and are dispersed correspondingly to the actuators.
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公开(公告)号：US06999855B2
公开(公告)日：2006-02-14
申请号：US10428802
申请日：2003-05-05
IPC分类号： G06F7/00
CPC分类号： B60W50/00 , B60T8/885 , B60T2270/406 , B60W50/0205 , B60W2050/0006 , F02D41/22 , F02D41/266 , F02D41/3005 , F02D2400/18
摘要： A low-cost vehicle control system and a car using the system controls radiation of an actuator driver and thereby reduces the radiation component cost and allows downsizing of an electronic control unit to improve the versatility. The vehicle control system has an electronic control unit, a plurality of actuators and actuator drivers for driving the actuators at the actuator side. The actuator drivers, respectively, have a independent self-diagnosis section, a self-protection section, and a communication control section and are dispersed correspondingly to the actuators.
摘要翻译： 低成本车辆控制系统和使用该系统的汽车控制致动器驱动器的辐射，从而降低辐射部件成本，并允许电子控制单元的小型化以提高通用性。 车辆控制系统具有电子控制单元，用于在致动器侧驱动致动器的多个致动器和致动器驱动器。 致动器驱动器分别具有独立的自诊断部分，自保护部分和通信控制部分，并且相应地分散到致动器。
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公开(公告)号：US20060009886A1
公开(公告)日：2006-01-12
申请号：US11227075
申请日：2005-09-16
IPC分类号： G06F19/00
CPC分类号： B60W50/00 , B60T8/885 , B60T2270/406 , B60W50/0205 , B60W2050/0006 , F02D41/22 , F02D41/266 , F02D41/3005 , F02D2400/18
摘要： A low-cost vehicle control system and a car using the system controls radiation of an actuator driver and thereby reduces the radiation component cost and allows downsizing of an electronic control unit to improve the versatility. The vehicle control system has an electronic control unit, a plurality of actuators and actuator drivers for driving the actuators at the actuator side. The actuator drivers, respectively, have an independent self-diagnosis section, a self-protection section, and a communication control section and are dispersed correspondingly to the actuators.
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公开(公告)号：US06625522B2
公开(公告)日：2003-09-23
申请号：US09801656
申请日：2001-03-09
IPC分类号： G06F700
CPC分类号： B60W50/00 , B60T8/885 , B60T2270/406 , B60W50/0205 , B60W2050/0006 , F02D41/22 , F02D41/266 , F02D41/3005 , F02D2400/18
摘要： A low-cost vehicle control system and a car using the system controls radiation of an actuator driver and thereby reduces the radiation component cost and allows downsizing of an electronic control unit to improve the versatility. The vehicle control system has an electronic control unit, a plurality of actuators and actuator drivers for driving the actuators at the actuator side. The actuator drivers, respectively, have an independent self-diagnosis section, a self-protection section, and a communication control section and are dispersed correspondingly to the actuators.
摘要翻译： 低成本车辆控制系统和使用该系统的汽车控制致动器驱动器的辐射，从而降低辐射部件成本，并允许电子控制单元的小型化以提高通用性。 车辆控制系统具有电子控制单元，用于在致动器侧驱动致动器的多个致动器和致动器驱动器。 执行器驱动器分别具有独立的自诊断部分，自保护部分和通信控制部分，并且相应地分散到致动器。
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公开(公告)号：US06437621B2
公开(公告)日：2002-08-20
申请号：US09816100
申请日：2001-03-26
申请人： Kazuo Kato , Takashi Sase , Takashi Hotta , Fumio Murabayashi
发明人： Kazuo Kato , Takashi Sase , Takashi Hotta , Fumio Murabayashi
IPC分类号： H03K317
CPC分类号： C08K5/5419 , C08G77/442 , C08G77/50 , C08L27/12 , C08L69/00
摘要： A waveform shaping circuit is provided so that the duty factor of clock pulses can be set to 50% with high accuracy even if the clock pulses are of a low voltage and a high frequency. An inverter which receives the clock pulses through an alternating current coupling capacitor is provided with a non-linear limiter element for limiting an amplitude of an output symmetrically on positive and negative sides thereof. A first current-limiting impedance and a second current-limiting impedance are connected between a power supply side terminal of the inverter and a power supply bus and between a grounding side terminal of the inverter and a grounding bus, respectively.
摘要翻译： 提供波形整形电路，使得即使时钟脉冲是低电压和高频率，时钟脉冲的占空因数也可以高精度地设置为50％。 通过交流耦合电容器接收时钟脉冲的逆变器设置有非线性限制器元件，用于在其正侧和负侧对称地限制输出的幅度。 逆变器的电源侧端子与电源总线之间以及逆变器的接地侧端子与接地母线之间分别连接有第一限流阻抗和第二限流阻抗。
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9.发明授权
公开(公告)号：US5684729A
公开(公告)日：1997-11-04
申请号：US530471
申请日：1995-09-19
申请人： Hiromichi Yamada , Fumio Murabayashi , Tatsumi Yamauchi , Takashi Hotta , Hideo Sawamoto , Takahiro Nishiyama , Yoshikazu Kiyoshige , Noriyasu Ido
发明人： Hiromichi Yamada , Fumio Murabayashi , Tatsumi Yamauchi , Takashi Hotta , Hideo Sawamoto , Takahiro Nishiyama , Yoshikazu Kiyoshige , Noriyasu Ido
CPC分类号： G06F7/74 , G06F7/485 , G06F7/49947 , G06F7/49994
摘要： To offer a floating-point addition/subtraction processing apparatus and a method thereof, capable of shortening the computation time, the floating-point calculation processing apparatus includes an approximate shift mount predicting unit for predicting a shift amount for normalization by using the input floating-point data to be addition/subtraction processed within an error of 1 bit, a shift error detecting unit for detecting a difference between the predicted shift amount and a correct shift amount, and an bit shifter for correcting a result, obtained by normalization using the predicted shift amount, by the detected difference of the two shift amounts, wherein a round-off determination and a shift amount calculation are processed in parallel before a normalization shift processing is executed.
摘要翻译： 为了提供能够缩短计算时间的浮点加法/减法处理装置及其方法，浮点计算处理装置包括：近似移位预测单元，用于通过使用输入浮点运算处理装置预测用于归一化的移位量， 点数据在1比特的误差内进行加法/减法处理;移位误差检测单元，用于检测预测偏移量和正确移位量之间的差;以及位移移位器，用于校正结果， 移位量乘以检测到的两个移动量的差异，其中在执行归一化移位处理之前并行处理舍入确定和移位量计算。
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10.发明授权Current-driven signal interface implemented in semiconductor integrated circuit device 失效电流驱动信号接口在半导体集成电路器件中实现
公开(公告)号：US5363332A
公开(公告)日：1994-11-08
申请号：US860442
申请日：1992-03-30
IPC分类号： H03K19/013 , H03K19/0175 , H03K19/018 , G11C8/00 , H01L27/06
CPC分类号： H03K19/013 , H03K19/017518 , H03K19/01806
摘要： A semiconductor integrated circuit device is arranged to have a plurality of logic circuit blocks, a data signal path for interconnecting logic circuit blocks and for providing a function of interfacing a current-driven signal. The logic circuit block on a signal output side includes an output circuit connected to the data signal path and a switching element formed of an NMOS transistor for controlling current flowing through the data signal path in response to an input signal applied to an input terminal of the output circuit. The logic circuit block on a signal input side includes an input circuit connected to the data signal path. The input circuit includes a bipolar transistor having an emitter connected to a constant current source, a collector forming an output terminal, and a base set at a fixed potential. The data signal path led from the output circuit is connected to the emitter of the bipolar transistor. The arrangement results in reducing a signal amplitude on the signal bus, thereby speeding up the transmission of the data signal and reducing noise of the signal.
摘要翻译： 半导体集成电路器件被布置为具有多个逻辑电路块，用于互连逻辑电路块的数据信号路径，并且用于提供与电流驱动信号接口的功能。 信号输出侧的逻辑电路块包括连接到数据信号路径的输出电路和由NMOS晶体管形成的开关元件，用于响应于施加到数据信号路径的输入端子的输入信号来控制流过数据信号路径的电流 输出电路。 信号输入侧的逻辑电路块包括连接到数据信号路径的输入电路。 输入电路包括具有连接到恒流源的发射极，形成输出端的集电极和固定电位的基极的双极晶体管。 从输出电路引出的数据信号路径连接到双极晶体管的发射极。 该结构可以减少信号总线上的信号幅度，从而加速数据信号的传输并降低信号的噪声。
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