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1.发明授权Method of forming one or more nanopores for aligning molecules for molecular electronics 失效形成一个或多个用于分子电子学分子的纳米孔的形成方法公开(公告)号：US07922927B2
公开(公告)日：2011-04-12
申请号：US11906819
申请日：2007-10-03
申请人： Theodore I. Kamins , Yong Chen , Patricia A. Beck
发明人： Theodore I. Kamins , Yong Chen , Patricia A. Beck
IPC分类号： C23F1/00
CPC分类号： B82Y10/00 , B81C1/00031 , C03C15/00 , C03C17/001 , H01L21/0332 , H01L21/0337 , H01L21/31144
摘要： A technique is provided for forming a molecule or an array of molecules having a defined orientation relative to the substrate or for forming a mold for deposition of a material therein. The array of molecules is formed by dispersing them in an array of small, aligned holes (nanopores), or mold, in a substrate. Typically, the material in which the nanopores are formed is insulating. The underlying substrate may be either conducting or insulating. For electronic device applications, the substrate is, in general, electrically conducting and may be exposed at the bottom of the pores so that one end of the molecule in the nanopore makes electrical contact to the substrate. A substrate such as a single-crystal silicon wafer is especially convenient because many of the process steps to form the molecular array can use techniques well developed for semiconductor device and integrated-circuit fabrication.
摘要翻译： 提供了一种用于形成具有相对于基底具有限定取向的分子或分子阵列的技术，或用于形成用于在其中沉积材料的模具。 分子阵列通过将它们分散在基底中的小的，对准的孔（纳米孔）或模具的阵列中而形成。 通常，形成纳米孔的材料是绝缘的。 底层衬底可以是导电的或绝缘的。 对于电子器件应用，基底通常是导电的并且可以在孔的底部暴露，使得纳米孔中的分子的一端与基底电接触。 诸如单晶硅晶片的衬底是特别方便的，因为形成分子阵列的许多工艺步骤可以使用用于半导体器件和集成电路制造的技术。
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2.发明申请Method of forming one or more nanopores for aligning molecules for molecular electronics 失效形成一个或多个用于分子电子学分子的纳米孔的形成方法公开(公告)号：US20080203055A1
公开(公告)日：2008-08-28
申请号：US11906819
申请日：2007-10-03
申请人： Theodore I. Kamins , Yong Chen , Patricia A. Beck
发明人： Theodore I. Kamins , Yong Chen , Patricia A. Beck
IPC分类号： B31D3/00
CPC分类号： B82Y10/00 , B81C1/00031 , C03C15/00 , C03C17/001 , H01L21/0332 , H01L21/0337 , H01L21/31144
摘要： A technique is provided for forming a molecule or an array of molecules having a defined orientation relative to the substrate or for forming a mold for deposition of a material therein. The array of molecules is formed by dispersing them in an array of small, aligned holes (nanopores), or mold, in a substrate. Typically, the material in which the nanopores are formed is insulating. The underlying substrate may be either conducting or insulating. For electronic device applications, the substrate is, in general, electrically conducting and may be exposed at the bottom of the pores so that one end of the molecule in the nanopore makes electrical contact to the substrate. A substrate such as a single-crystal silicon wafer is especially convenient because many of the process steps to form the molecular array can use techniques well developed for semiconductor device and integrated-circuit fabrication.
摘要翻译： 提供了一种用于形成具有相对于基底具有限定取向的分子或分子阵列的技术，或用于形成用于在其中沉积材料的模具。 分子阵列通过将它们分散在基底中的小的，对准的孔（纳米孔）或模具的阵列中而形成。 通常，形成纳米孔的材料是绝缘的。 底层衬底可以是导电的或绝缘的。 对于电子器件应用，基底通常是导电的并且可以在孔的底部暴露，使得纳米孔中的分子的一端与基底电接触。 诸如单晶硅晶片的衬底是特别方便的，因为形成分子阵列的许多工艺步骤可以使用用于半导体器件和集成电路制造的技术。
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公开(公告)号：US20080296785A1
公开(公告)日：2008-12-04
申请号：US12150063
申请日：2008-04-23
申请人： Theodore I. Kamins , Philip J. Kuekes , Yong Chen
发明人： Theodore I. Kamins , Philip J. Kuekes , Yong Chen
IPC分类号： H01L23/48
CPC分类号： B82Y30/00 , B82Y10/00 , C30B11/00 , C30B11/12 , C30B29/605 , H01L2924/0002 , H01L2924/00
摘要： Methods for forming a predetermined pattern of catalytic regions having nanoscale dimensions are provided for use in the growth of nanowires. The methods include one or more nanoimprinting steps to produce arrays of catalytic nanoislands or nanoscale regions of catalytic material circumscribed by noncatalytic material.
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4.发明授权Method of forming catalyst nanoparticles for nanowire growth and other applications 失效形成用于纳米线生长和其他应用的催化剂纳米颗粒的方法公开(公告)号：US07378347B2
公开(公告)日：2008-05-27
申请号：US10281678
申请日：2002-10-28
申请人： Theodore I. Kamins , Philip J. Kuekes , Yong Chen
发明人： Theodore I. Kamins , Philip J. Kuekes , Yong Chen
IPC分类号： H01L21/461
CPC分类号： B82Y30/00 , B82Y10/00 , C30B11/00 , C30B11/12 , C30B29/605 , H01L2924/0002 , H01L2924/00
摘要： Methods for forming a predetermined pattern of catalytic regions having nanoscale dimensions are provided for use in the growth of nanowires. The methods include one or more nanoimprinting steps to produce arrays of catalytic nanoislands or nanoscale regions of catalytic material circumscribed by noncatalytic material.
摘要翻译： 提供用于形成具有纳米级尺寸的催化区域的预定图案的方法用于纳米线的生长。 所述方法包括一个或多个纳米压印步骤，以产生由非催化材料限定的催化材料的催化纳米级或纳米尺度区域的阵列。
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公开(公告)号：US06773616B1
公开(公告)日：2004-08-10
申请号：US10033408
申请日：2001-12-26
IPC分类号： B44C122
CPC分类号： C30B23/02 , C30B25/02 , C30B29/605 , Y10S977/888
摘要： Self-organized, or self-assembled, nanowires of a first composition may be used as an etching mask for fabrication of nanowires of a second composition. The method for forming such nanowires comprises: (a) providing an etchable layer of the second composition and having a buried insulating layer beneath a major surface thereof; (b) growing self-assembled nanowires on the surface of the etchable layer; and (c) etching the etchable layer anisotropically down to the insulating layer, using the self-assembled nanowires as a mask. The self-assembled nanowires may be removed or left. In either event, nanowires of the second composition are formed. The method enables the formation of one-dimensional crystalline nanowires with widths and heights at the nanometer scale, and lengths at the micrometer scale, which are aligned along certain crystallographic directions with high crystal quality. Further, the method of the present invention avoids traditional lithography methods, minimizes environmental toxic chemicals usage, simplifies the manufacturing processes, and allows the formation of high-quality one-dimensional nanowires over large areas.
摘要翻译： 可以将第一组合物的自组织或自组装的纳米线用作用于制造第二组合物的纳米线的蚀刻掩模。 形成这种纳米线的方法包括：（a）提供第二组合物的可蚀刻层，并在其主表面下方具有掩埋绝缘层; （b）在可蚀刻层的表面上生长自组装纳米线; 和（c）使用自组装纳米线作为掩模，各向异性地将可蚀刻层蚀刻到绝缘层。 自组装纳米线可以被去除或留下。 在任一情况下，形成第二组合物的纳米线。 该方法能够形成具有纳米尺度的宽度和高度的一维结晶纳米线，以及在具有高晶体质量的某些晶体方向上对准的微米尺度的长度。 此外，本发明的方法避免了传统的光刻方法，使环境有毒化学品的使用最小化，简化了制造工艺，并且允许在大面积上形成高质量的一维纳米线。
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公开(公告)号：US06211095B1
公开(公告)日：2001-04-03
申请号：US09221025
申请日：1998-12-23
申请人： Yong Chen , Scott W. Corzine , Theodore I. Kamins , Michael J. Ludowise , Pierre H. Mertz , Shih-Yuan Wang
发明人： Yong Chen , Scott W. Corzine , Theodore I. Kamins , Michael J. Ludowise , Pierre H. Mertz , Shih-Yuan Wang
IPC分类号： H01L2131
CPC分类号： H01L21/7624 , H01L21/02381 , H01L21/0245 , H01L21/02488 , H01L21/02502 , H01L21/02538 , H01L21/0254 , H01L21/02658 , H01L21/26533
摘要： A method for growing a crystalline layer that includes a first material on a growth surface of a crystalline substrate of a second material, wherein the first material and the second material have different lattice constants. A buried layer is generated in the substrate such that the buried layer isolates a layer of the substrate that includes the growth surface from the remainder of the substrate. The first material is then deposited on the growth surface at a growth temperature. The isolated layer of the substrate has a thickness that is less than the thickness at which defects are caused in the crystalline lattice of the second material by the first material crystallizing thereon. The buried layer is sufficiently malleable at the growth temperature to allow the deformation of the lattice of the isolated layer without deforming the remainder of the substrate. The present invention may be utilized for growing III-V semiconducting material layers on silicon substrates. In the case of silicon-based substrates, the buried layer is preferably SiO2 that is sufficiently malleable at the growth temperature to allow the deformation of the isolated substrate layer.
摘要翻译： 一种用于生长晶体层的方法，其包括在第二材料的晶体衬底的生长表面上的第一材料，其中第一材料和第二材料具有不同的晶格常数。 在衬底中产生掩埋层，使得掩埋层将衬底的包含生长表面的衬底与衬底的其余部分隔离。 然后在生长温度下将第一种材料沉积在生长表面上。 衬底的隔离层的厚度小于通过第一材料在其上结晶而在第二材料的晶格中引起缺陷的厚度。 掩埋层在生长温度下具有足够的延展性，以允许隔离层的晶格变形，而不使基底的其余部分变形。 本发明可用于在硅衬底上生长III-V半导体材料层。 在硅基基板的情况下，掩埋层优选是在生长温度下足够有韧性的SiO 2，以允许隔离的基底层的变形。
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公开(公告)号：US06791338B1
公开(公告)日：2004-09-14
申请号：US10355748
申请日：2003-01-31
IPC分类号： G01R2700
CPC分类号： H01L51/0595 , B82Y10/00 , B82Y30/00 , H01L29/7613
摘要： A gated nanoscale switch operates as a resonant tunneling device. A conductive channel is formed of a pair of conductive molecular wires and a conductive nanoparticle. Each molecular wire is bound, at one end, to the conductive nanoparticle and, at the opposed end, to one of a pair of electrodes. The structure is located upon a dielectric layer that overlies a conductive substrate. The device may be arranged to operate as a switch with the conductive substrate acting as a gate electrode. Alternatively, the device may be employed to measure the electrical (current versus voltage) characteristics of the molecular wires.
摘要翻译： 门控纳米级开关作为谐振隧穿装置工作。 导电通道由一对导电分子线和导电纳米颗粒形成。 每个分子线在一端结合到导电纳米颗粒上，并且在相对的端部与一对电极中的一个结合。 该结构位于覆盖导电基底的介电层上。 该器件可以被布置为作为开关，其中导电衬底用作栅电极。 或者，可以使用该装置来测量分子线的电（电流对电压）特性。
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公开(公告)号：US06429466B2
公开(公告)日：2002-08-06
申请号：US09774199
申请日：2001-01-29
申请人： Yong Chen , Scott W. Corzine , Theodore I. Kamins , Michael J. Ludowise , Pierre H. Mertz , Shih-Yuan Wang
发明人： Yong Chen , Scott W. Corzine , Theodore I. Kamins , Michael J. Ludowise , Pierre H. Mertz , Shih-Yuan Wang
IPC分类号： H01L31072
CPC分类号： H01L21/7624 , H01L21/02381 , H01L21/0245 , H01L21/02488 , H01L21/02502 , H01L21/02538 , H01L21/0254 , H01L21/02658 , H01L21/26533
摘要： A method for growing a crystalline layer that includes a first material on a growth surface of a crystalline substrate of a second material, wherein the first material and the second material have different lattice constants. A buried layer is generated in the substrate such that the buried layer isolates a layer of the substrate that includes the growth surface from the remainder of the substrate. The second material is then deposited on the growth surface at a growth temperature. The isolated layer of the substrate has a thickness that is less than the thickness at which defects are caused in the crystalline lattice of the first material by the second material crystallizing thereon. The buried layer is sufficiently malleable at the growth temperature to allow the deformation of the lattice of the isolated layer without deforming the remainder of the substrate. The present invention may be utilized for growing III-V semiconducting material layers on silicon substrates. In the case of silicon-based substrates, the buried layer is preferably SiO2 that is sufficiently malleable at the growth temperature to allow the deformation of the isolated substrate layer.
摘要翻译： 一种用于生长晶体层的方法，其包括在第二材料的晶体衬底的生长表面上的第一材料，其中第一材料和第二材料具有不同的晶格常数。 在衬底中产生掩埋层，使得掩埋层将衬底的包含生长表面的衬底与衬底的其余部分隔离。 然后将第二种材料在生长温度下沉积在生长表面上。 衬底的隔离层的厚度小于在其上结晶第二材料时在第一材料的晶格中产生缺陷的厚度。 掩埋层在生长温度下具有足够的延展性，以允许隔离层的晶格变形，而不使基底的其余部分变形。 本发明可用于在硅衬底上生长III-V半导体材料层。 在硅基基板的情况下，掩埋层优选是在生长温度下足够有韧性的SiO 2，以允许隔离的基底层的变形。
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公开(公告)号：US20150093796A1
公开(公告)日：2015-04-02
申请号：US14386286
申请日：2012-03-20
申请人： Hanjie Ying , Dong Liu , Yong Chen , Yong Chen , An Li , Tao Zhou , Jinglan Wu , Xiaoqing Lin , Xiaochun Chen , Jingjing Xie , Jianxin Bai
发明人： Hanjie Ying , Dong Liu , Yong Chen , Yong Chen , An Li , Tao Zhou , Jinglan Wu , Xiaoqing Lin , Xiaochun Chen , Jingjing Xie , Jianxin Bai
摘要： The present invention provides Clostridium acetobutylicum and an application thereof. A preservation number of the Clostridium acetobutylicum provided in the invention is CGMCC No. 5234. The Clostridium acetobutylicum provided in the present invention can be used for cogeneration of acetone, butanol, ethanol, and 3-hydroxy butanone through fermentation, so as to improve the economic benefit of butanol fermentation. NAD+ coupling and regeneration can be implemented by adding metabolism or growth regulating substances, so as to improve the product yield, and at the same time, the yield of cogeneration products can be flexibly adjusted, so as to cater for the market demand.
摘要翻译： 本发明提供丙酮丁醇梭菌及其应用。 本发明提供的丙酮丁醇梭菌的保藏号为CGMCC号5234.本发明提供的丙酮丁醇梭菌可通过发酵用于丙酮，丁醇，乙醇和3-羟基丁酮的热电联供，以改善 丁醇发酵的经济效益。 NAD +偶联和再生可以通过添加新陈代谢或生长调节物质来实现，从而提高产品产量，同时可以灵活调整热电产品的产量，以满足市场需求。
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公开(公告)号：USD989890S1
公开(公告)日：2023-06-20
申请号：US29791238
申请日：2022-01-05
申请人： Yong Chen
设计人： Yong Chen
摘要： FIG. 1 is a perspective view of an octopus toy showing my new design;
FIG. 2 is another perspective view thereof;
FIG. 3 is a front elevational view thereof;
FIG. 4 is a rear elevational view thereof;
FIG. 5 is a left side elevational view thereof;
FIG. 6 is a right side elevational view thereof;
FIG. 7 is a top plan view thereof; and,
FIG. 8 is a bottom plan view thereof.
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