摘要:
A hearing compensation system for the hearing impaired comprises an input transducer for converting acoustical information at an input to electrical signals at an output, an output transducer for converting electrical signals at an input to acoustical information at an output, a plurality of bandpass filters, each bandpass filter having an input connected to the output of said input transducer, a plurality of AGC circuits, each individual AGC circuit associated with a different one of the bandpass filters and having an input connected to the output of its associated bandpass filter and an output connected to the input of the output transducer. The bandpass filters and AGC circuits may be divided into two processing channels, one for low frequencies and one for high frequencies and may drive separate audio transducers, one configured for maximum efficiency at low frequencies and one configured for maximum efficiency at high frequencies.
摘要:
A hearing compensation system comprises an input transducer for converting acoustical information at an input thereof to electrical signals at an output thereof, a differential analog-to-digital converter sampling the electrical signals output from the input transducer at an input thereof and outputting differential signal samples at an output thereof, a digital signal processing circuit having an input connected to the output of the differential analog-to-digital converter and operating on the differential signal samples to form processed differential signal samples at an output thereof, and an output transducer for converting electrical signals at an input thereof to acoustical information at an output thereof, the processed differential signal samples coupled to the input of the output transducer.
摘要:
A method for storing digital information from an image sensor comprises the steps of providing an image sensor producing three-color output data at each of a plurality of pixel locations; providing a digital storage device coupled to the image sensor; sensing three-color digital output data from the image sensor; and storing said three-color output data as digital data in the digital storage device without performing any interpolation on the three-color output data. The data may be compressed prior to storage and expanded after retrieval from storage. In a preferred embodiment, the image sensor comprises a triple-junction active pixel sensor array.
摘要:
A pMOS EEPROM cell includes a source, drain, channel, control gate and well contact. The device is a fully functional single element p-type floating gate MOSFET. A floating gate overlaps the well contact and completely surrounds the drain and source implants. The pMOS cell is written to by means of hot-electron injection, using an intrinsic feedback mechanism to write analog values. Hot electrons are generated in the channel by means of hole impact ionization at the transistor's drain. The pMOS cell is erased by Fowler-Nordheim tunneling. The tunneling voltage is applied only to the well to tunnel electrons from the floating gate. The well-source and well-drain junctions are protected from breakdown by means of guard rings.
摘要:
A three-terminal silicon MOS transistor with a time-varying transfer function is provided which may operate both as a single transistor analog learning device and as a single transistor non-volatile analog memory. The time-varying transfer function is achieved by adding or removing electrons from the fully insulated floating gate of an N-type MOS floating gate transistor. The transistor has a control gate capacitively coupled to the floating gate; it is from the perspective of this control gate that the transfer function of the transistor is modified. Electrons are removed from the floating gate via Fowler-Nordheim tunneling. Electrons are added to the floating gate via hot-electron injection.
摘要:
A proximity sensor system includes a touch-sensor pad with a sensor matrix array having a characteristic capacitance on horizontal and vertical conductors connected to sensor pads. The capacitance changes as a function of the proximity of an object or objects to the sensor matrix. The change in capacitance of each node in both the X and Y directions of the matrix due to the approach of an object is converted to a set of voltages in the X and Y directions. These voltages are processed by circuitry to develop electrical signals representative of the centroid of the profile of the object, i.e, its position in the X and Y dimensions. Noise reduction and background level setting techniques inherently available in the architecture are employed. A conductive paintbrush-type stylus is used to produce paint-like strokes on a display associated with the touch-sensor pad.
摘要:
A circuit for generating N analog voltage signals for reference or bias use employs N analog floating gate storage devices. Electron injection circuitry is provided for injecting electrons on to and a tunneling structure is provided for removing electrons from the floating gate of each floating gate storage device. A follower amplifier is connected to each floating gate storage device and drives an analog output voltage bus. A capacitor is connected to each analog output storage bus. An analog pass gate is connected between each analog output voltage bus and a common monitor/dynamic load bus. Each analog pass gate is driven by a strobe signal.
摘要:
A CMOS single phase register includes two pairs of cross coupled CMOS inverters connected together by transistor switches. The first pair of cross-coupled CMOS inverters is connected to a complementary pair of data inputs through a first pair of transistor switches which turn on in response to a first logic level. The complementary outputs of the first pair of cross-coupled CMOS inverters is connected to the inputs of the second pair of cross-coupled CMOS inverters through a second pair of transistor switches which turn on in response to a second logic level. The complementary outputs of the CMOS single phase register of the present invention are the outputs of the second pair of cross-coupled CMOS inverters. The ground connections of the first pair of cross-coupled CMOS inverters is made through a transistor switch which turns on in response to the first logic level. The positive voltage supply connections of the second pair of cross-coupled CMOS inverters is made through a transistor switch which turns on in response to the second logic level. A single clock line is connected to the gates of all of the transistor switches.
摘要:
A CMOS analog integrated circuit comprising a plurality of nodes for simultaneously computing the largest of the signals at inputs of the nodes. There is a common line supplying current and producing a maximum voltage potential and a plurality of nodes connected to the common line. Each node comprises a follower transistor having a source operably connected to the common line for sourcing current and a gate being the input of the node and being connected to a current signal input source providing a current signal to the node to be compared to the current signals at respective ones of the other nodes. There is an inhibitor transistor having a gate connected to the common line and a drain operably connected to the gate of the follower transistor. The inhibitor transistor provides the voltage output of the node and inhibits the voltage output at all nodes connected to the common line which have a current signal which is smaller than the largest current signal connected to one of the nodes. A plurality of non-linear resistors may be disposed in the common line between respective ones of the nodes of limit current flow therebetween and thereby form subgroups having a single "winner" with each subgroup. A slope limiting transistor may be diode-connected in series with the inhibitor transistor to limit the slope of the voltage output from the inhibitor transistor.
摘要:
An integrated circuit amplifier having a random input offset voltage is adaptable such that the input offset voltage may be cancelled out. An input node is a floating input node and is coupled to a source of input signal by a first capacitor. A second capacitor is connected between the output of the amplifier and the floating node. An ultraviolet window above the second capacitor allows the floating node to be charged, by the application of ultraviolet light, to a voltage which effectively cancels the input offset voltage.