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9 条记录 (耗时 0.026 秒)

    TEMPERATURE MEASUREMENT CIRCUIT AND TEMPERATURE MEASUREMENT METHOD
    1.
    发明申请
    TEMPERATURE MEASUREMENT CIRCUIT AND TEMPERATURE MEASUREMENT METHOD 有权
    温度测量电路和温度测量方法

    公开(公告)号：US20120250721A1

    公开(公告)日：2012-10-04

    申请号：US13434862

    申请日：2012-03-30

    申请人： Ting-Hao Wang ,  Jen-Wei Tsai ,  Tsung-Ping Chou

    发明人： Ting-Hao Wang ,  Jen-Wei Tsai ,  Tsung-Ping Chou

    IPC分类号： G01K15/00 ,  G01K7/00

    CPC分类号： G01K7/00 ,  G01K7/21

    摘要： A temperature measurement circuit includes a sensing unit and a temperature translation unit. The sensing unit is arranged for generating a positive temperature coefficient characteristic and a negative temperature coefficient characteristic according to a temperature. The temperature translation unit is coupled to the sensing unit, and is arranged for generating a measured temperature according to the positive temperature coefficient characteristic and the negative temperature coefficient characteristic.

    摘要翻译： 温度测量电路包括感测单元和温度转换单元。 感测单元被布置成根据温度产生正温度系数特性和负温度系数特性。 温度转换单元耦合到感测单元，并且被布置成根据正温度系数特性和负温度系数特性产生测量温度。

    Temperature measurement circuit and temperature measurement method
    2.
    发明授权
    Temperature measurement circuit and temperature measurement method 有权
    温度测量电路和温度测量方法

    公开(公告)号：US09109956B2

    公开(公告)日：2015-08-18

    申请号：US13434862

    申请日：2012-03-30

    申请人： Ting-Hao Wang ,  Jen-Wei Tsai ,  Tsung-Ping Chou

    发明人： Ting-Hao Wang ,  Jen-Wei Tsai ,  Tsung-Ping Chou

    IPC分类号： G01K15/00 ,  G01K7/00 ,  G01K7/21

    CPC分类号： G01K7/00 ,  G01K7/21

    摘要： A temperature measurement circuit includes a sensing unit and a temperature translation unit. The sensing unit is arranged for generating a positive temperature coefficient characteristic and a negative temperature coefficient characteristic according to a temperature. The temperature translation unit is coupled to the sensing unit, and is arranged for generating a measured temperature according to the positive temperature coefficient characteristic and the negative temperature coefficient characteristic.

    摘要翻译： 温度测量电路包括感测单元和温度转换单元。 感测单元被布置成根据温度产生正温度系数特性和负温度系数特性。 温度转换单元耦合到感测单元，并且被布置成根据正温度系数特性和负温度系数特性产生测量温度。

    METHOD OF DYNAMIC ELEMENT MATCHING AND AN APPARATUS THEREOF
    3.
    发明申请
    METHOD OF DYNAMIC ELEMENT MATCHING AND AN APPARATUS THEREOF 有权
    动力元件匹配方法及其装置

    公开(公告)号：US20140176355A1

    公开(公告)日：2014-06-26

    申请号：US13906351

    申请日：2013-05-31

    申请人： Wen-Hsien Chuang ,  Hsiang-Wei Liu ,  Jen-Wei Tsai ,  Ting-Hao Wang

    发明人： Wen-Hsien Chuang ,  Hsiang-Wei Liu ,  Jen-Wei Tsai ,  Ting-Hao Wang

    IPC分类号： H03M1/66

    CPC分类号： H03M1/0665 ,  G06F1/10 ,  H03L7/0814 ,  H03M1/00 ,  H03M1/747 ,  H03M2201/4135

    摘要： A method to reduce the integral non-linearity (INL) of a digital-to-analog converter (DAC) and a DAC implementing said method are disclosed. The method in this invention is a pseudo dynamic element matching (PDEM) method. Compared with a prior art, the method of this invention provides a better performance in glitch. Compared with another prior art, the method of this invention also guarantees that DEM will not fail even if the input digital code remains constant.

    摘要翻译： 公开了一种降低数模转换器（DAC）和实现所述方法的DAC的积分非线性（INL）的方法。 本发明的方法是伪动态元素匹配（PDEM）方法。 与现有技术相比，本发明的方法提供了更好的毛刺性能。 与另一现有技术相比，本发明的方法也保证即使输入的数字代码保持恒定，DEM也不会失效。

    BANDGAP REFERENCE CIRCUIT
    6.
    发明申请
    BANDGAP REFERENCE CIRCUIT 审中-公开
    带宽参考电路

    公开(公告)号：US20120249115A1

    公开(公告)日：2012-10-04

    申请号：US13191458

    申请日：2011-07-27

    申请人： Wen-Hsien Chuang ,  Ting-Hao Wang ,  Yu-Tsung Lu

    发明人： Wen-Hsien Chuang ,  Ting-Hao Wang ,  Yu-Tsung Lu

    IPC分类号： G05F3/16

    CPC分类号： G05F3/30

    摘要： A bandgap reference circuit includes a modulator, an amplifier, a demodulator, a closed feedback loop and an output circuit. The modulator is utilized for modulating an input signal to generate a modulated input signal. The amplifier is utilized for amplifying the modulated input signal to generate an amplified modulated input signal. The demodulator is utilized for demodulating the amplified modulated input signal to generate a demodulated signal. The closed feedback loop is coupled between an output terminal of the demodulator and an input terminal of the modulator. The output circuit is utilized for generating an output current according to the demodulated signal, where the output current is a constant current insensitive to fluctuations in temperature.

    摘要翻译： 带隙参考电路包括调制器，放大器，解调器，闭合反馈回路和输出电路。 调制器用于调制输入信号以产生调制输入信号。 放大器用于放大调制输入信号以产生放大的调制输入信号。 解调器用于解调放大的调制输入信号以产生解调信号。 闭合反馈回路耦合在解调器的输出端和调制器的输入端之间。 输出电路用于根据解调信号产生输出电流，其中输出电流是对温度波动不敏感的恒定电流。

    High selectivity collar oxide etch processes
    7.
    发明授权
    High selectivity collar oxide etch processes 失效
    高选择性环氧化物蚀刻工艺

    公开(公告)号：US6066566A

    公开(公告)日：2000-05-23

    申请号：US14805

    申请日：1998-01-28

    申请人： Munir-ud-Din Naeem ,  Matthew J. Sendelbach ,  Ting-Hao Wang

    发明人： Munir-ud-Din Naeem ,  Matthew J. Sendelbach ,  Ting-Hao Wang

    IPC分类号： H01L21/302 ,  H01L21/3065 ,  H01L21/334 ,  H01L21/8242 ,  H01L27/108 ,  H01L21/00

    CPC分类号： H01L27/10861 ,  H01L29/66181

    摘要： A collar oxide is formed in a provided a semiconductor substrate having (3) a partially full trench, (2) (i) fill surface defined by fill material partially filling said trench, (ii) upper surface outside of said trench, and (iii) trench sidewall surface not covered by said fill material, and (3) a conformal oxide layer overlying said fill, upper, and sidewall surfaces, by selectively etching as follows:(a) contacting the substrate with a mixture of hydrogen-containing fluorocarbon and an oxygen source under reactive ion etching conditions until at least a portion of the conformal oxide layer on the upper surface is removed, and(b) contacting the substrate from step (a) with a mixture of a hydrogen-free fluorocarbon and a diluent gas under reactive ion etching conditions to further remove conformal oxide remaining on the fill surface and to overetch the upper and fill surfaces, whereby a substantial portion of conformal oxide remains on the side walls to form the collar oxide.A further step (c) may be added after the overetching to remove any residual byproduct polymer deposits. The methods are especially adapted for use in the manufacture of high aspect ratio trench capacitors for integrated circuits. The method provides reduced degradation of pad nitride layers and may be conducted without the use of CO gas.

    摘要翻译： 在所提供的半导体衬底中形成环状氧化物，其具有（3）部分全沟槽，（2）（i）由部分填充所述沟槽的填充材料限定的填充表面，（ii）所述沟槽外部的上表面，和（iii） ）沟槽侧壁表面，以及（3）通过如下选择性蚀刻来覆盖所述填充物，上侧壁和侧壁表面的共形氧化物层：（a）使基底与含氢碳氟化合物的混合物和 在反应离子蚀刻条件下的氧源，直到去除上表面上的共形氧化物层的至少一部分，和（b）使来自步骤（a）的基底与无氢氟碳化合物和稀释气体的混合物 在反应离子蚀刻条件下，以进一步除去残留在填充表面上的保形氧化物，并且去除上表面和填充表面，由此大部分共形氧化物残留在侧壁上以形成环氧化物。 在过蚀刻之后可以加入另外的步骤（c）以除去任何残留的副产物聚合物沉积物。 该方法特别适用于制造用于集成电路的高宽比沟槽电容器。 该方法提供了氮化物层的降低的降低，并且可以在不使用CO气体的情况下进行。

    Data processing device and motherboard module thereof
    9.
    发明授权
    Data processing device and motherboard module thereof 有权
    数据处理装置及其主板模块

    公开(公告)号：US08264842B2

    公开(公告)日：2012-09-11

    申请号：US12749523

    申请日：2010-03-30

    申请人： Kuang-Liang Chen ,  Ting-Hao Wang ,  Ching-Tsai Chang ,  Yun-Ping Liu ,  Wen-Bin Tsay

    发明人： Kuang-Liang Chen ,  Ting-Hao Wang ,  Ching-Tsai Chang ,  Yun-Ping Liu ,  Wen-Bin Tsay

    IPC分类号： H05K7/00

    CPC分类号： G06F1/185 ,  G06F1/1658

    摘要： The present invention discloses a data processing device and a motherboard thereof. The feature of the present invention is separating the motherboard thereof into two daughter boards. The first daughter board is fixed to the data processing device, and the second daughter board is connected to the first daughter board through a connector. The units that frequently be changed, such as a data processing component and data storing component, are disposed on the second daughter board. Besides, a hard disk signal bus of the data processing device, an optical disk drive signal bus, or a screen signal bus may be electrically connected to the first daughter board. As a result, when the data processing device is under maintenance or upgrade, the second daughter board can be removed without removing the casing, and also the plug-in and plug-out frequency of the connectors can be lower.

    摘要翻译： 本发明公开了一种数据处理装置及其主板。 本发明的特征是将其母板分成两个子板。 第一子板被固定到数据处理装置，第二子板通过连接器与第一子板连接。 经常改变的单元（诸如数据处理组件和数据存储组件）被布置在第二子板上。 此外，数据处理装置的硬盘信号总线，光盘驱动器信号总线或屏幕信号总线可以电连接到第一子板。 结果，当数据处理装置正在进行维护或升级时，可以在不移除外壳的情况下移除第二子板，并且连接器的插入和插拔频率也可以更低。