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1.发明申请公开(公告)号：US20050270203A1
公开(公告)日：2005-12-08
申请号：US11124394
申请日：2005-05-09
申请人： Todd Brooks , Kevin Miller , Josephus Van Engelen
发明人： Todd Brooks , Kevin Miller , Josephus Van Engelen
CPC分类号： H03M7/3013
摘要： In a high-fidelity digital modulator, a mapper is provided to minimize quantization noise, jitter, and cross-talk between multiple digital-to-analog or analog-to-digital converters. The mapper receives a quantized level from a quantizer and maps the quantized level to an output sequence. The mapper includes a table defining multiple sequences corresponding to each quantized level. Each sequence includes two or more symbols, having one of multiple values. The mapper also includes a generator that selects one of the multiple sequences as the output sequence. The last symbol of a first output sequence is equal to the first symbol of the next output sequence and so on. The generator selects the output sequence by alternating between a first and a second sequence for each quantized level received. The generator selects the output sequence by alternating between sequences having a positive and a negative common mode energy for each odd valued quantized level received.
摘要翻译： 在高保真数字调制器中，提供映射器以最小化多个数模转换器或模数转换器之间的量化噪声，抖动和串扰。 映射器从量化器接收量化电平，并将量化电平映射到输出序列。 映射器包括定义对应于每个量化级别的多个序列的表。 每个序列包括具有多个值之一的两个或多个符号。 映射器还包括选择多个序列之一作为输出序列的发生器。 第一个输出序列的最后一个符号等于下一个输出序列的第一个符号，依此类推。 发生器通过在接收到的每个量化级别的第一和第二序列之间交替来选择输出序列。 发生器通过在接收到的每个奇数值量化电平具有正和负共模能量的序列之间交替来选择输出序列。
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2.发明授权Method and system for compensating temperature readings from a temperature sensing crystal integrated circuit 有权用于补偿温度感应晶体集成电路的温度读数的方法和系统公开(公告)号：US08321169B2
公开(公告)日：2012-11-27
申请号：US13085407
申请日：2011-04-12
CPC分类号： G01R19/2506 , G01K7/32
摘要： Aspects of a method and system for compensating temperature readings from a temperature sensing crystal integrated circuit are provided. An electronic device may digitize a temperature indication received from a temperature sensing circuit, digitize one or more calibration voltages received from said temperature sensing circuit, and calculate a compensated temperature indication utilizing the digitized calibration voltage(s), and the digitized temperature indication, and data from a table that characterizes behavior of the temperature sensing circuit as a function of temperature. One or more circuits in the electronic device may be controlled based on the compensated temperature indication. The compensated temperature indication may compensate for a gain error and/or offset error of a digital to analog converter that digitizes the temperature indication and the calibration voltage(s). There may be two calibration voltages.
摘要翻译： 提供了用于补偿来自温度感测晶体集成电路的温度读数的方法和系统的方面。 电子设备可以数字化从温度检测电路接收的温度指示，数字化从所述温度检测电路接收的一个或多个校准电压，并且使用数字化校准电压和数字化温度指示来计算补偿温度指示，以及 来自表格的数据表示温度感测电路的行为作为温度的函数。 可以基于补偿的温度指示来控制电子设备中的一个或多个电路。 补偿温度指示可以补偿数字化温度指示和校准电压的数模转换器的增益误差和/或偏移误差。 可能有两个校准电压。
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3.发明申请公开(公告)号：US20110184686A1
公开(公告)日：2011-07-28
申请号：US13085407
申请日：2011-04-12
CPC分类号： G01R19/2506 , G01K7/32
摘要： Aspects of a method and system for compensating temperature readings from a temperature sensing crystal integrated circuit are provided. An electronic device may digitize a temperature indication received from a temperature sensing circuit, digitize one or more calibration voltages received from said temperature sensing circuit, and calculate a compensated temperature indication utilizing the digitized calibration voltage(s), and the digitized temperature indication, and data from a table that characterizes behavior of the temperature sensing circuit as a function of temperature. One or more circuits in the electronic device may be controlled based on the compensated temperature indication. The compensated temperature indication may compensate for a gain error and/or offset error of a digital to analog converter that digitizes the temperature indication and the calibration voltage(s). There may be two calibration voltages.
摘要翻译： 提供了用于补偿来自温度感测晶体集成电路的温度读数的方法和系统的方面。 电子设备可以数字化从温度检测电路接收的温度指示，数字化从所述温度检测电路接收的一个或多个校准电压，并且使用数字化校准电压和数字化温度指示来计算补偿温度指示，以及 来自表格的数据表示温度感测电路的行为作为温度的函数。 可以基于补偿的温度指示来控制电子设备中的一个或多个电路。 补偿温度指示可以补偿数字化温度指示和校准电压的数模转换器的增益误差和/或偏移误差。 可能有两个校准电压。
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4.发明授权Method and system for compensating temperature readings from a temperature sensing crystal integrated circuit 有权用于补偿温度感应晶体集成电路的温度读数的方法和系统公开(公告)号：US07925463B2
公开(公告)日：2011-04-12
申请号：US12364117
申请日：2009-02-02
IPC分类号： G01K15/00
CPC分类号： G01R19/2506 , G01K7/32
摘要： Aspects of a method and system for compensating temperature readings from a temperature sensing crystal integrated circuit are provided. In this regard, a temperature indication and calibration voltages from a temperature sensing crystal integrated circuit (TSCIC) may be digitized and the digital signals may be utilized to calculate a compensated temperature indication. Data derived from a memory integrated within the TSCIC may be retrieved based on the compensated temperature indication. The retrieved data may be utilized to control operation of one or more circuits. The compensated temperature indication may be calculated by removing a gain error and/or offset error from the digitized temperature indication. The compensated temperature indication may be utilized as an index for a data table. The compensated temperature indication may be a normalized compensated temperature indication. The calibration voltages may include a minimum voltage and/or a maximum voltage that the TSCIC is operable to output.
摘要翻译： 提供了用于补偿来自温度感测晶体集成电路的温度读数的方法和系统的方面。 在这方面，来自温度感测晶体集成电路（TSCIC）的温度指示和校准电压可以被数字化，并且数字信号可以用于计算补偿温度指示。 可以基于补偿温度指示来检索从集成在TSCIC内的存储器得到的数据。 所检索的数据可用于控制一个或多个电路的操作。 可以通过从数字化温度指示中移除增益误差和/或偏移误差来计算补偿温度指示。 补偿温度指示可以用作数据表的索引。 补偿温度指示可以是归一化的补偿温度指示。 校准电压可以包括TSCIC可操作以输出的最小电压和/或最大电压。
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公开(公告)号：US20050040979A1
公开(公告)日：2005-02-24
申请号：US10956058
申请日：2004-10-04
申请人： Todd Brooks , David Ho , Kevin Miller
发明人： Todd Brooks , David Ho , Kevin Miller
摘要： The present invention is directed to a sigma-delta digital to analog converted (DAC) including a digital-sigma delta modulator, a decimation filter, and a multi-bit DAC. The digital sigma-delta modulator receives a digital input signal and produces a quantized digital signal therefrom. The decimation filter receives the quantized digital signal and produces a decimated digital signal therefrom. The multi-bit DAC receives the decimated digital signal and produces an analog output signal therefrom. The analog output signal is representative of the digital input signal.
摘要翻译： 本发明涉及一种包括数字Σ-Δ调制器，抽取滤波器和多位DAC的Σ-Δ数模转换（DAC）。 数字Σ-Δ调制器接收数字输入信号并从其产生量化的数字信号。 抽取滤波器接收量化的数字信号并从其产生抽取的数字信号。 多位DAC接收抽取的数字信号并从其产生模拟输出信号。 模拟输出信号代表数字输入信号。
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公开(公告)号：US20060132177A1
公开(公告)日：2006-06-22
申请号：US11355174
申请日：2006-02-16
申请人： Todd Brooks , Anilkumar Tammineedi
发明人： Todd Brooks , Anilkumar Tammineedi
IPC分类号： H03K19/094
CPC分类号： H03F1/3205 , H03F3/005 , H03F3/45475 , H03F3/505 , H03F2200/168 , H03F2200/331 , H03F2200/417 , H03F2200/453 , H03F2203/45101 , H03F2203/5031
摘要： A source-follower transistor based buffer provides high linearity. A replica transistor is used to generate a replica voltage substantially equal to the output voltage of the buffer. The replica voltage is level shifted by a level shift circuit and applied at the drain of the source-follower transistor to improve the linearity of the buffer. The buffer may be used in conjunction with a switched-capacitor sampling circuit. A damping circuit may be used to reduce charge glitches due to sampling. The damping circuit may be a low pass filter. The buffer may be used in an interface circuit that produces an output signal from an input signal and controls the level of the output signal.
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公开(公告)号：US20050128111A1
公开(公告)日：2005-06-16
申请号：US11047750
申请日：2005-02-02
申请人： Todd Brooks
发明人： Todd Brooks
CPC分类号： H03M1/0641 , H03M1/74 , H03M3/332 , H03M3/424
摘要： Methods and systems for applying digital dither in data converters, such as delta-sigma data converters. In one embodiment, an analog signal from a first path of a delta-sigma modulator is quantized to an m-bit digital signal and an n-bit dithered digital feedback signal is generated from at least a portion of the m-bit digital signal. The n-bit dithered digital feedback signal is converted to an analog feedback signal and fed back to a second path of the delta-sigma modulator. In another embodiment, the n-bit dithered digital feedback signal is generated by selecting one of a plurality of sets of n-bits from the m-bit digital signal depending upon a state of a dither control signal. The dither control signal can alternate or pseudo-randomly switch between a plurality of states. The m-bit digital signal may be an m-bit thermometer code signal.
摘要翻译： 在数据转换器中应用数字抖动的方法和系统，如delta-sigma数据转换器。 在一个实施例中，来自Δ-Σ调制器的第一路径的模拟信号被量化为m位数字信号，并且从m位数字信号的至少一部分产生n位抖动数字反馈信号。 n位抖动数字反馈信号被转换成模拟反馈信号并反馈到Δ-Σ调制器的第二路径。 在另一个实施例中，根据抖动控制信号的状态，通过从m位数字信号中选择多个n位组中的一个产生n位抖动数字反馈信号。 抖动控制信号可以在多个状态之间交替或伪随机切换。 m位数字信号可以是m位温度计代码信号。
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公开(公告)号：US20060019796A1
公开(公告)日：2006-01-26
申请号：US11239144
申请日：2005-09-30
申请人： Todd Brooks
发明人： Todd Brooks
IPC分类号： F16H15/38
CPC分类号： F16H15/38
摘要： A toroidal continuously variable transmission with offset rollers includes a first and second toroidal disk each having inwardly facing toroidal portions that face opposite each other. A shaft having a longitudinal axis mounts the first toroidal disk on a first end and mounts the second toroidal disk on a second end. A sliding collar is mounted on the shaft between the first and the second toroidal disks and has at least two off-set rollers attached thereto. The off-set rollers are in communication with the first and the second inwardly facing toroidal portions of the toroidal disks. Translation of the sliding collar on the shaft causes the off-set rollers to rotate about a first axis, wherein the first axis is orthogonally disposed with respect to the longitudinal axis of the shaft.
摘要翻译： 具有偏置辊的环形无级变速器包括第一和第二环形盘，每个具有面向彼此的向内的环形部分。 具有纵向轴线的轴将第一环形盘安装在第一端上并将第二环形盘安装在第二端上。 滑动轴环安装在第一和第二环形盘之间的轴上，并且具有至少两个附接到其上的偏移辊。 偏移辊与环形盘的第一和第二向内的环形部分连通。 滑动轴环在轴上的平移导致偏移辊围绕第一轴线旋转，其中第一轴线相对于轴的纵向轴线正交地布置。
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公开(公告)号：US20050077944A1
公开(公告)日：2005-04-14
申请号：US10626701
申请日：2003-07-25
申请人： Todd Brooks , Anilkumar Tammineedi
发明人： Todd Brooks , Anilkumar Tammineedi
CPC分类号： H03F1/3205 , H03F3/005 , H03F3/45475 , H03F3/505 , H03F2200/168 , H03F2200/331 , H03F2200/417 , H03F2200/453 , H03F2203/45101 , H03F2203/5031
摘要： A source-follower transistor based buffer provides high linearity. A replica transistor is used to generate a replica voltage substantially equal to the output voltage of the buffer. The replica voltage is level shifted by a level shift circuit and applied at the drain of the source-follower transistor to improve the linearity of the buffer. The buffer may be used in conjunction with a switched-capacitor sampling circuit. A damping circuit may be used to reduce charge glitches due to sampling. The damping circuit may be a low pass filter. The buffer may be used in an interface circuit that produces an output signal from an input signal and controls the level of the output signal.
摘要翻译： 基于源极跟随器晶体管的缓冲器提供高线性度。 复制晶体管用于产生基本上等于缓冲器的输出电压的复制电压。 复制电压由电平移位电路电平移位并施加在源极跟随器晶体管的漏极处，以提高缓冲器的线性。 缓冲器可以与开关电容器采样电路结合使用。 可以使用阻尼电路来减少由于取样引起的充电毛刺。 阻尼电路可以是低通滤波器。 缓冲器可以用在从输入信号产生输出信号并控制输出信号电平的接口电路中。
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公开(公告)号：US20050052892A1
公开(公告)日：2005-03-10
申请号：US10916606
申请日：2004-08-12
申请人： Khim Low , Todd Brooks , Agnes Woo , Akira Ito
发明人： Khim Low , Todd Brooks , Agnes Woo , Akira Ito
CPC分类号： H01L23/5256 , H01L2924/0002 , H01L2924/00
摘要： The present invention is directed to systems for evaluating one-time programmable memory cells. A threshold current is applied to a resistive circuit, thereby generating a threshold voltage. A read current is applied to a first memory cell, thereby generating a memory cell voltage. The memory cell voltage is compared to the threshold voltage, thereby determining the state of the memory cell. In a further embodiment of the invention, a second threshold voltage is generated and compared the memory cell voltage, thereby verifying the state of the memory cell. The threshold current is optionally a substantial replica of said read current. The threshold current is optionally a proportional substantial replica of said read current. In an embodiment, the resistive circuit includes a second memory cell, which can be programmed or unprogrammed. The second memory cell is optionally arranged to average the memory cell resistance.
摘要翻译： 本发明涉及用于评估一次性可编程存储器单元的系统。 阈值电流被施加到电阻电路，从而产生阈值电压。 读取电流被施加到第一存储器单元，由此产生存储单元电压。 将存储单元电压与阈值电压进行比较，从而确定存储单元的状态。 在本发明的另一实施例中，产生第二阈值电压并比较存储单元电压，由此验证存储单元的状态。 阈值电流可选地是所述读取电流的实质复制品。 阈值电流可选地是所述读取电流的比例实质复制品。 在一个实施例中，电阻电路包括可被编程或未编程的第二存储单元。 可选地，第二存储单元布置成平均存储单元电阻。
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