利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

68 条记录 (耗时 0.045 秒)

    LIQUID CRYSTAL DISPLAY DEVICE
    6.
    发明申请
    LIQUID CRYSTAL DISPLAY DEVICE 有权
    液晶显示装置

    公开(公告)号：US20090073358A1

    公开(公告)日：2009-03-19

    申请号：US12293221

    申请日：2007-02-19

    申请人： Tokio Taguchi ,  Kazuhiko Tsuda ,  Mutsumi Nakajima ,  Keisuke Yoshida ,  Junichi Yamada

    发明人： Tokio Taguchi ,  Kazuhiko Tsuda ,  Mutsumi Nakajima ,  Keisuke Yoshida ,  Junichi Yamada

    IPC分类号： G02F1/1335

    CPC分类号： G02F1/133555 ,  G02F2201/52

    摘要： Realizes a structure for a transreflective liquid crystal display device in which one pixel is defined by four or more picture elements, the structure providing a high aperture ratio and being suitable for display for which the transmission mode is prioritized.A liquid crystal display device according to the present invention is a transreflective liquid crystal display device, comprising a plurality of picture elements including a first picture element, a second picture element, a third picture element and a fourth picture element for displaying different colors from one another; in which each of the plurality of picture elements includes a transmission area for providing display in a transmission mode and a reflection area for providing display in a reflection mode. Each picture element includes a mesh portion shaped to be meshable with an adjacent picture element; and the reflection area of each picture element is located in the mesh portion.

    摘要翻译： 实现了其中一个像素由四个或更多个像素限定的透反射液晶显示装置的结构，该结构提供高开口率并且适于显示传输模式被优先化的显示。 根据本发明的液晶显示装置是一种透反射液晶显示装置，包括多个像素，包括第一像素，第二像素，第三像素和第四像素，用于从一个 另一个; 其中多个像素中的每一个包括用于在传输模式中提供显示的传输区域和用于以反射模式提供显示的反射区域。 每个像素包括成形为可与相邻像素相啮合的网格部分; 并且每个像素的反射区域位于网格部分中。

    Sense amplifier circuit, memory device using the circuit and method for reading the memory device
    8.
    发明授权
    Sense amplifier circuit, memory device using the circuit and method for reading the memory device 有权
    感应放大器电路，使用电路的存储器件和读取存储器件的方法

    公开(公告)号：US06233170B1

    公开(公告)日：2001-05-15

    申请号：US09464448

    申请日：1999-12-16

    申请人： Junichi Yamada

    发明人： Junichi Yamada

    IPC分类号： G11C1122

    CPC分类号： G11C11/22 ,  G11C7/06

    摘要： The bit lines BL1 and BL2 is precharged to a potential VCC/2, and the plate line PL1 is set to a potential VCC/2. All word lines WL1 and WL2 are set to the high potential so as to sustain the connection node of one terminal of the ferroelectric capacitance and source terminals of cell transistors TC11 and TC12 to a potential VCC/2. After that, all lines except the word line WL1 to be selected are set to the ground potential. The sense amplifier enable signal SAN is set to the ground potential so as to make NMOS transistors MN1 and MN2 in conduction. The charge in a bit line capacitance and a ferroelectric capacitance is discharged to the ground potential. In this case, a signal voltage that can be detected by the sense amplifier SA is generated on the two bit lines BL1 and BL2, so the signal voltage can be amplified by turning on PMOS transistors MP1 and MP2. Thus, a ferroelectric memory device is provided that can realize reading and writing operation by a simple control so as to improve substantially the operation speed and the power consumption.

    摘要翻译： 位线BL1和BL2被预充电到电位VCC / 2，并且板极线PL1被设置为电位VCC / 2。 所有字线WL1和WL2被设置为高电位，以便将铁电电容的一个端子和单元晶体管TC11和TC12的源极端子的连接节点维持到电位VCC / 2。 之后，除了要选择的字线WL1之外的所有线都被设置为地电位。 读出放大器使能信号SAN被设置为接地电位，以使NMOS晶体管MN1和MN2导通。 位线电容和铁电电容中的电荷被放电到地电位。 在这种情况下，可以在两个位线BL1和BL2上产生可由读出放大器SA检测的信号电压，因此可以通过导通PMOS晶体管MP1和MP2来放大信号电压。 因此，提供了通过简单的控制实现读写操作的铁电存储器件，从而大大提高了操作速度和功耗。