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公开(公告)号:US20240363564A1
公开(公告)日:2024-10-31
申请号:US18309678
申请日:2023-04-28
Applicant: Tokyo Electron Limited
Inventor: Soo Doo CHAE , Matthew BARON , Adam GILDEA
IPC: H01L23/00 , H01L25/065 , H10B80/00
CPC classification number: H01L24/06 , H01L24/03 , H01L24/05 , H01L24/08 , H01L24/80 , H01L25/0657 , H10B80/00 , H01L2224/03616 , H01L2224/0362 , H01L2224/05647 , H01L2224/05687 , H01L2224/06505 , H01L2224/08146 , H01L2224/80895 , H01L2224/80896 , H01L2225/06527 , H01L2225/06544 , H01L2225/06565 , H01L2924/1431 , H01L2924/1434
Abstract: At least one aspect of the present disclosure is directed to a semiconductor device. The semiconductor device includes a first substrate including a first area and a second area; a second substrate including a third area and a fourth area; a first bonding layer comprising a first dielectric material that bonds the first area to the third area; and a second bonding layer comprising a second dielectric material that bonds the second area to the fourth area. The first dielectric material is different from the second dielectric material.
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公开(公告)号:US20200006129A1
公开(公告)日:2020-01-02
申请号:US16562207
申请日:2019-09-05
Applicant: Tokyo Electron Limited
Inventor: Soo Doo CHAE , Jeffrey SMITH , Gerrit J. LEUSINK , Robert D. CLARK , Kai-Hung YU
IPC: H01L21/768 , H01L23/522
Abstract: A semiconductor device is provided. The semiconductor device can have a substrate including dielectric material. A plurality of narrow interconnect openings can be formed within said dielectric material. In addition, a plurality of wide interconnect openings can be formed within said dielectric material. The semiconductor device can include a first metal filling the narrow interconnect openings to form an interconnect structure and conformally covering a surface of the wide interconnect openings formed in the dielectric material, and a second metal formed over the first metal and encapsulated by the first metal to form another interconnect structure within the wide interconnect openings.
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公开(公告)号:US20250087628A1
公开(公告)日:2025-03-13
申请号:US18367315
申请日:2023-09-12
Applicant: Tokyo Electron Limited
Inventor: Soo Doo CHAE , David L. O'MEARA , Matthew BARON , Hojin KIM , Arkalgud SITARAM
IPC: H01L23/00
Abstract: A method includes providing a first substrate having a first bonding surface. The method includes providing a second substrate having a second bonding surface. The method includes coupling a metal-containing precursor to the first bonding surface and the second bonding surface. The method includes activating the metal-containing precursor on the first bonding surface and the second bonding surface. The method further includes chemically reacting the activated metal-containing precursor on the first bonding surface and the second bonding surface to form an interface between the first substrate and the second substrate.
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公开(公告)号:US20180211870A1
公开(公告)日:2018-07-26
申请号:US15875442
申请日:2018-01-19
Applicant: Tokyo Electron Limited
Inventor: Soo Doo CHAE , Jeffrey SMITH , Gerrit J. LEUSINK , Robert D. CLARK , Kai-Hung YU
IPC: H01L21/768 , H01L23/522
Abstract: A semiconductor device is provided. The semiconductor device can have a substrate including dielectric material. A plurality of narrow interconnect openings can be formed within said dielectric material. In addition, a plurality of wide interconnect openings can be formed within said dielectric material. The semiconductor device can include a first metal filling the narrow interconnect openings to form an interconnect structure and conformally covering a surface of the wide interconnect openings formed in the dielectric material, and a second metal formed over the first metal and encapsulated by the first metal to form another interconnect structure within the wide interconnect openings.
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