公开(公告)号：US10916318B2

公开(公告)日：2021-02-09

申请号：US16543739

申请日：2019-08-19

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Susumu Hashimoto ,  Masaki Kado ,  Michael Arnaud Quinsat ,  Nobuyuki Umetsu ,  Tsuyoshi Kondo ,  Yasuaki Ootera ,  Shiho Nakamura

IPC: G11C11/15 ,  G11C19/08 ,  G11C11/16

Abstract: A magnetic storage device of an embodiment includes: a first magnetic part including a first portion and a second portion and extending in a first direction from the first portion to the second portion; a layered part which is stacked on the first magnetic part in a second direction intersecting with the first direction; a first electrode electrically connected with the first portion; and a second electrode electrically connected with the second portion. The layered part includes a first layer and a second layer which is disposed between the first layer and the first magnetic part, the second layer includes a metal oxide, and the first layer includes at least one selected from the group consisting of a metal nitride and a metal carbide.

公开(公告)号：US10482941B2

公开(公告)日：2019-11-19

申请号：US16128554

申请日：2018-09-12

Applicant: Toshiba Memory Corporation

Inventor： Takuya Shimada ,  Yasuaki Ootera ,  Tsuyoshi Kondo ,  Nobuyuki Umetsu ,  Michael Arnaud Quinsat ,  Masaki Kado ,  Susumu Hashimoto ,  Shiho Nakamura ,  Hideaki Aochi ,  Tomoya Sanuki ,  Shinji Miyano ,  Yoshihiro Ueda ,  Yuichi Ito ,  Yasuhito Yoshimizu

IPC: G11C11/16 ,  H01L27/22 ,  H01F10/32 ,  H01L43/02 ,  G11C11/02

Abstract: According to one embodiment, a magnetic memory device includes a first memory portion, a first conductive portion, a first interconnection, and a controller. The first memory portion includes a first magnetic portion including a first portion and a second portion, a first magnetic layer, and a first nonmagnetic layer provided between the second portion and the first magnetic layer. The first conductive portion is electrically connected to the first portion. The first interconnection is electrically connected to the first magnetic layer. The controller is electrically connected to the first conductive portion and the first interconnection. The controller applies a first pulse having a first pulse height and a first pulse length between the first conductive portion and the first interconnection in a first write operation and applies a second pulse having a second pulse height and a second pulse length in a first shift operation.

公开(公告)号：US20180358104A1

公开(公告)日：2018-12-13

申请号：US15915650

申请日：2018-03-08

Applicant: Toshiba Memory Corporation

Inventor： Yasuaki OOTERA ,  Tsuyoshi Kondo ,  Nobuyuki Umetsu ,  Michael Arnaud Quinsat ,  Takuya Shimada ,  Masaki Kado ,  Susumu Hashimoto ,  Shiho Nakamura

IPC: G11C19/08 ,  H01L43/02 ,  H01L43/12 ,  H01L27/22 ,  G11C11/14

CPC classification number: G11C19/0841 ,  G11C11/14 ,  G11C11/161 ,  H01L27/222 ,  H01L43/02 ,  H01L43/10 ,  H01L43/12

Abstract: According to one embodiment, a magnetic memory device includes a first magnetic portion extending in a first direction, a first magnetic layer, and a first nonmagnetic layer provided between the first magnetic layer and a portion of the first magnetic portion. The first magnetic portion has a first surface. The first surface includes bottom portions, and top portions. The bottom portions and the top portions are arranged alternately in the first direction. The bottom portions include a first bottom portion, a second bottom portion adjacent to the first bottom portion in the first direction, a third bottom portion, and a fourth bottom portion adjacent to the third bottom portion in the first direction. The top portions include a first top portion provided between the first bottom portion and the second bottom portion, and a second top portion provided between the third bottom portion and the fourth bottom portion.

公开(公告)号：US10453545B2

公开(公告)日：2019-10-22

申请号：US15915650

申请日：2018-03-08

Applicant: Toshiba Memory Corporation

Inventor： Yasuaki Ootera ,  Tsuyoshi Kondo ,  Nobuyuki Umetsu ,  Michael Arnaud Quinsat ,  Takuya Shimada ,  Masaki Kado ,  Susumu Hashimoto ,  Shiho Nakamura

IPC: G11C19/08 ,  H01L43/02 ,  H01L27/22 ,  G11C11/14 ,  H01L43/10 ,  G11C11/16 ,  H01L43/12

Abstract: According to one embodiment, a magnetic memory device includes a first magnetic portion extending in a first direction, a first magnetic layer, and a first nonmagnetic layer provided between the first magnetic layer and a portion of the first magnetic portion. The first magnetic portion has a first surface. The first surface includes bottom portions, and top portions. The bottom portions and the top portions are arranged alternately in the first direction. The bottom portions include a first bottom portion, a second bottom portion adjacent to the first bottom portion in the first direction, a third bottom portion, and a fourth bottom portion adjacent to the third bottom portion in the first direction. The top portions include a first top portion provided between the first bottom portion and the second bottom portion, and a second top portion provided between the third bottom portion and the fourth bottom portion.

公开(公告)号：US20190287637A1

公开(公告)日：2019-09-19

申请号：US16120636

申请日：2018-09-04

Applicant: Toshiba Memory Corporation

Inventor： Michael Arnaud Quinsat ,  Yasuaki Ootera ,  Tsuyoshi Kondo ,  Nobuyuki Umetsu ,  Takuya Shimada ,  Masaki Kado ,  Susumu Hashimoto ,  Shiho Nakamura ,  Hideaki Aochi ,  Tomoya Sanuki ,  Shinji Myano ,  Yoshihiro Ueda ,  Yuichi Ito ,  Yasuhito Yoshimizu

IPC: G11C19/08 ,  G11C11/16 ,  H01L27/22 ,  H01L43/02

Abstract: According to one embodiment, a magnetic memory device includes a first interconnect, a second interconnect, a first memory portion, and a controller. The first memory portion is provided between the first and second interconnects. The controller is electrically connected with the first and second interconnects. The first memory portion includes a first magnetic member, a first magnetic element, and a first non-linear element. The first magnetic element is provided between the first magnetic member and the second interconnect in a first current path between the first and second interconnects. The first non-linear element is provided between the first magnetic element and the second interconnect in the first current path. The controller is configured to supply a first shift current in the first current path in a first shift operation. The controller is configured to supply a first reading current in the first current path in a first reading operation.

公开(公告)号：US10311932B2

公开(公告)日：2019-06-04

申请号：US15918304

申请日：2018-03-12

Applicant: Toshiba Memory Corporation

Inventor： Nobuyuki Umetsu ,  Tsuyoshi Kondo ,  Yasuaki Ootera ,  Takuya Shimada ,  Michael Arnaud Quinsat ,  Masaki Kado ,  Susumu Hashimoto ,  Shiho Nakamura ,  Tomoya Sanuki ,  Yoshihiro Ueda ,  Yuichi Ito ,  Shinji Miyano ,  Hideaki Aochi ,  Yasuhito Yoshimizu

IPC: G11C19/08 ,  G11C11/16 ,  H01L27/22 ,  H01L23/528 ,  H01F10/32 ,  H01L43/08 ,  H01L43/10 ,  H01L43/02

Abstract: According to one embodiment, a magnetic memory device includes a magnetic portion, a first magnetic layer, a first nonmagnetic layer, a first element portion, first to third interconnects, and a controller. In a first operation, the controller sets the first interconnect to a first potential, the second interconnect to a second potential, and the third interconnect to a third potential. An absolute value of a difference between the second potential and the third potential is greater than that between the first potential and the third potential. In a second operation, the controller sets the first interconnect to a fourth potential, the second interconnect to a fifth potential, and the third interconnect to a sixth potential. An absolute value of a difference between the fifth potential and the sixth potential is less than that between the fourth potential and the sixth potential.

公开(公告)号：US10276224B2

公开(公告)日：2019-04-30

申请号：US15700769

申请日：2017-09-11

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Hirofumi Morise ,  Tsuyoshi Kondo ,  Nobuyuki Umetsu ,  Yasuaki Ootera ,  Susumu Hashimoto ,  Masaki Kado ,  Takuya Shimada ,  Michael Arnaud Quinsat ,  Shiho Nakamura

IPC: G11C11/16 ,  H01L43/08 ,  G11C19/08

Abstract: According to an embodiment, a magnetic memory includes a first magnetic portion, a second magnetic portion, a first nonmagnetic portion, and a controller. The first magnetic portion includes a first portion and a second portion. The controller in a first operation supplies a first current from the first portion toward the second portion. The controller in a second operation supplies a second current to from the second portion toward the first portion. A first electrical resistance value can be different from a second electrical resistance value. The first electrical resistance value is between the second magnetic portion and the portion of the first magnetic portion before the first operation and the second operation are performed. The second electrical resistance value is between the second magnetic portion and the portion of the first magnetic portion after the first operation and the second operation are performed.

公开(公告)号：US20190088346A1

公开(公告)日：2019-03-21

申请号：US15919710

申请日：2018-03-13

Applicant: Toshiba Memory Corporation

Inventor： Yasuaki Ootera ,  Tsuyoshi Kondo ,  Nobuyuki Umetsu ,  Michael Arnaud Quinsat ,  Takuya Shimada ,  Masaki Kado ,  Susumu Hashimoto ,  Shiho Nakamura ,  Hideaki Aochi ,  Tomoya Sanuki ,  Shinji Miyano ,  Yoshihiro Ueda ,  Yuichi Ito ,  Yasuhito Yoshimizu

IPC: G11C19/08 ,  H01L43/08 ,  H01L43/10 ,  H01L27/22

CPC classification number: G11C19/0841 ,  G11C19/28 ,  H01L27/228 ,  H01L43/08 ,  H01L43/10

Abstract: According to one embodiment, a magnetic memory device includes a first magnetic portion, a first magnetic layer, a first nonmagnetic layer, a second magnetic portion, a second magnetic layer, a second nonmagnetic layer, a first electrode, and a second electrode. The first magnetic portion includes a first magnetic part and a second magnetic part. The first nonmagnetic layer is provided between the first magnetic layer and the first magnetic part. The second magnetic portion includes a third magnetic part and a fourth magnetic part. The second nonmagnetic layer is provided between the second magnetic layer and the third magnetic part. The first electrode electrically is connected to the second magnetic part and the fourth magnetic part. The second electrode is electrically connected to the first magnetic part and the third magnetic part.

公开(公告)号：US20200303624A1

公开(公告)日：2020-09-24

申请号：US16538974

申请日：2019-08-13

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Nobuyuki UMETSU ,  Tsuyoshi Kondo ,  Masaki Kado ,  Shiho Nakamura ,  Susumu Hashimoto ,  Yasuaki Ootera ,  Michael Arnaud Quinsat ,  Masahiro Koike ,  Tsutomu Nakanishi ,  Megumi Yakabe ,  Agung Setiadi

IPC: H01L43/02 ,  G11C11/16 ,  H01L27/22 ,  H01L43/08 ,  H01L43/10

Abstract: A magnetic memory according to an embodiment includes: a magnetic member including a first to third magnetic parts, the first magnetic part including a first portion and a second portion and extending in a first direction from the first portion to the second portion, the second magnetic part extending in a second direction that crosses the first direction, and the third magnetic part connecting the second magnetic part and the first portion; a first nonmagnetic metal layer arranged along the third magnetic part, the first nonmagnetic metal layer including a first end portion on a side of the second portion, a position of the first end portion along the first direction being between positions of the first and second portions along the first direction; and a first and second electrodes supplying a current between the first and second magnetic parts via the third magnetic part.

公开(公告)号：US10446249B2

公开(公告)日：2019-10-15

申请号：US16120636

申请日：2018-09-04

Applicant: Toshiba Memory Corporation

Inventor： Michael Arnaud Quinsat ,  Yasuaki Ootera ,  Tsuyoshi Kondo ,  Nobuyuki Umetsu ,  Takuya Shimada ,  Masaki Kado ,  Susumu Hashimoto ,  Shiho Nakamura ,  Hideaki Aochi ,  Tomoya Sanuki ,  Shinji Miyano ,  Yoshihiro Ueda ,  Yuichi Ito ,  Yasuhito Yoshimizu

IPC: G11C19/08 ,  G11C11/16 ,  H01L27/22 ,  H01L43/02 ,  H01L43/10

Abstract: According to one embodiment, a magnetic memory device includes a first interconnect, a second interconnect, a first memory portion, and a controller. The first memory portion is provided between the first and second interconnects. The controller is electrically connected with the first and second interconnects. The first memory portion includes a first magnetic member, a first magnetic element, and a first non-linear element. The first magnetic element is provided between the first magnetic member and the second interconnect in a first current path between the first and second interconnects. The first non-linear element is provided between the first magnetic element and the second interconnect in the first current path. The controller is configured to supply a first shift current in the first current path in a first shift operation. The controller is configured to supply a first reading current in the first current path in a first reading operation.