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    Method of manufacture of semiconductor device
    1.
    发明申请
    Method of manufacture of semiconductor device 失效
    半导体器件的制造方法

    公开(公告)号：US20070166977A1

    公开(公告)日：2007-07-19

    申请号：US11644887

    申请日：2006-12-26

    申请人： Hiroshi Itokawa ,  Yoshimasa Kawase ,  Toshihiko Iinuma ,  Haruko Akutsu ,  Kyoichi Suguro

    发明人： Hiroshi Itokawa ,  Yoshimasa Kawase ,  Toshihiko Iinuma ,  Haruko Akutsu ,  Kyoichi Suguro

    IPC分类号： H01L21/4763 ,  H01L21/44

    CPC分类号： H01L21/28518 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/7833

    摘要： A semiconductor device manufacturing method is disclosed. A silicon-containing gate electrode is first formed above the surface of a silicon-containing semiconductor substrate. Then, a sidewall insulating film is formed on the sidewall of the gate electrode and a film of metal is formed on the semiconductor substrate to cover the gate electrode and the sidewall insulating film. The front and back sides of the semiconductor substrate are heated through heat conduction by an ambient gas. Thereby, the metal is caused to react with silicon contained in the semiconductor substrate and the gate electrode to form a metal silicide film.

    摘要翻译： 公开了半导体器件制造方法。 首先在含硅半导体衬底的表面上形成含硅栅电极。 然后，在栅电极的侧壁上形成侧壁绝缘膜，并且在半导体衬底上形成金属膜以覆盖栅电极和侧壁绝缘膜。 通过环境气体的热传导来加热半导体衬底的正面和背面。 由此，使金属与包含在半导体衬底和栅电极中的硅反应，形成金属硅化物膜。

    Method of manufacture of semiconductor device
    3.
    发明授权
    Method of manufacture of semiconductor device 失效
    半导体器件的制造方法

    公开(公告)号：US07557040B2

    公开(公告)日：2009-07-07

    申请号：US11644887

    申请日：2006-12-26

    申请人： Hiroshi Itokawa ,  Yoshimasa Kawase ,  Toshihiko Iinuma ,  Haruko Akutsu ,  Kyoichi Suguro

    发明人： Hiroshi Itokawa ,  Yoshimasa Kawase ,  Toshihiko Iinuma ,  Haruko Akutsu ,  Kyoichi Suguro

    IPC分类号： H01L21/44

    CPC分类号： H01L21/28518 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/7833

    摘要： A semiconductor device manufacturing method is disclosed. A silicon-containing gate electrode is first formed above the surface of a silicon-containing semiconductor substrate. Then, a sidewall insulating film is formed on the sidewall of the gate electrode and a film of metal is formed on the semiconductor substrate to cover the gate electrode and the sidewall insulating film. The front and back sides of the semiconductor substrate are heated through heat conduction by an ambient gas. Thereby, the metal is caused to react with silicon contained in the semiconductor substrate and the gate electrode to form a metal silicide film.

    摘要翻译： 公开了半导体器件制造方法。 首先在含硅半导体衬底的表面上形成含硅栅电极。 然后，在栅电极的侧壁上形成侧壁绝缘膜，并且在半导体衬底上形成金属膜以覆盖栅电极和侧壁绝缘膜。 通过环境气体的热传导来加热半导体衬底的正面和背面。 由此，使金属与包含在半导体衬底和栅电极中的硅反应，形成金属硅化物膜。

    Semiconductor device and method of manufacturing the same
    7.
    发明授权
    Semiconductor device and method of manufacturing the same 有权
    半导体装置及其制造方法

    公开(公告)号：US06924518B2

    公开(公告)日：2005-08-02

    申请号：US10743006

    申请日：2003-12-23

    申请人： Toshihiko Iinuma ,  Ichiro Mizushima ,  Mitsuaki Izuha ,  Kiyotaka Miyano ,  Kyoichi Suguro

    发明人： Toshihiko Iinuma ,  Ichiro Mizushima ,  Mitsuaki Izuha ,  Kiyotaka Miyano ,  Kyoichi Suguro

    IPC分类号： H01L21/28 ,  H01L21/336 ,  H01L29/165 ,  H01L29/417 ,  H01L29/423 ,  H01L29/49 ,  H01L29/78 ,  H01L29/80

    CPC分类号： H01L29/66477 ,  H01L29/165 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66628

    摘要： There is disclosed is a semiconductor device which comprises a semiconductor substrate, isolation regions formed within the semiconductor substrate to define the active region, a pair of impurity diffusion regions formed within the element region in a manner to have surfaces elevated from the isolation region, a SiGe film formed on an upper surface of the impurity diffusion region so as to cover partly the side surface of the impurity diffusion region, a Ge concentration in the SiGe film being higher at a lower surface of the SiGe film than at an upper surface of the SiGe film, a metal silicide layer formed on the SiGe film, and a gate electrode formed in the active region of the semiconductor substrate with a gate insulating film interposed therebetween and having a sidewall insulating film formed on the side surface.

    摘要翻译： 公开了一种半导体器件，其包括半导体衬底，形成在半导体衬底内以限定有源区的隔离区，在元件区内以从隔离区升高的表面形成的一对杂质扩散区， SiGe膜形成在杂质扩散区域的上表面上，以部分地覆盖杂质扩散区域的侧表面，SiGe膜的Ge浓度在SiGe膜的下表面处比在 SiGe膜，形成在SiGe膜上的金属硅化物层，以及形成在半导体衬底的有源区中的栅电极，栅极绝缘膜插入其间并且具有形成在侧表面上的侧壁绝缘膜。

    Semiconductor device and method of manufacturing the same
    8.
    发明申请
    Semiconductor device and method of manufacturing the same 审中-公开
    半导体装置及其制造方法

    公开(公告)号：US20100055859A1

    公开(公告)日：2010-03-04

    申请号：US12591085

    申请日：2009-11-06

    申请人： Takayuki Ito ,  Toshihiko Iinuma ,  Kyoichi Suguro

    发明人： Takayuki Ito ,  Toshihiko Iinuma ,  Kyoichi Suguro

    IPC分类号： H01L21/336 ,  H01L21/425

    CPC分类号： H01L21/26506 ,  H01L21/26513 ,  H01L21/2686 ,  H01L29/6653 ,  H01L29/66575 ,  H01L29/6659

    摘要： Disclosed is a method for manufacturing a semiconductor device comprising implanting ions of an impurity element into a semiconductor region, implanting, into the semiconductor region, ions of a predetermined element which is a group IV element or an element having the same conductivity type as the impurity element and larger in mass number than the impurity element, and irradiating a region into which the impurity element and the predetermined element are implanted with light to anneal the region, the light having an emission intensity distribution, a maximum point of the distribution existing in a wavelength region of not more than 600 nm.

    摘要翻译： 公开了一种制造半导体器件的方法，包括将杂质元素的离子注入到半导体区域中，将作为IV族元素的预定元素或与杂质相同的导电类型的元素的离子注入半导体区域 元素，并且质量数大于杂质元素，并且用光照射杂质元素和预定元素被注入的区域以使该区域退火，该光具有发光强度分布，存在于a的分布的最大点 波长区域不大于600nm。

    Semiconductor device and method of manufacturing the same
    10.
    发明授权
    Semiconductor device and method of manufacturing the same 有权
    半导体装置及其制造方法

    公开(公告)号：US06376888B1

    公开(公告)日：2002-04-23

    申请号：US09559356

    申请日：2000-04-27

    申请人： Yoshitaka Tsunashima ,  Kyoichi Suguro ,  Atsushi Murakoshi ,  Kouji Matsuo ,  Toshihiko Iinuma

    发明人： Yoshitaka Tsunashima ,  Kyoichi Suguro ,  Atsushi Murakoshi ,  Kouji Matsuo ,  Toshihiko Iinuma

    IPC分类号： H01L2976

    CPC分类号： H01L21/28185 ,  H01L21/28088 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/823842 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/66583

    摘要： Disclosed is a semiconductor device having an N-type MIS transistor formed in a first region and a P-type MIS transistor formed in a second region, wherein, the N-type MIS transistor includes a first gate insulating film formed on at least the bottom of a first concave portion formed in the first region and a first gate electrode formed on the first gate insulating film, the P-type MIS transistor includes a second gate insulating film formed on at least the bottom of a second concave portion formed in the second region and a second gate electrode formed on the second gate insulating film, each of the first and second gate electrodes includes at least one metal-containing film, and at least one of the first and second gate electrodes is of a laminate structure including a plurality of the metal-containing films, and the work function of the metal-containing film constituting at least a part of the first gate electrode and in contact with the first gate insulating film is smaller than the work function of the metal-containing film constituting at least a part of the second gate electrode and in contact with the second gate insulating film.

    摘要翻译： 公开了一种半导体器件，其具有形成在第一区域中的N型MIS晶体管和形成在第二区域中的P型MIS晶体管，其中，所述N型MIS晶体管包括形成在至少底部的第一栅极绝缘膜 形成在所述第一区域中的第一凹部和形成在所述第一栅极绝缘膜上的第一栅电极，所述P型MIS晶体管包括形成在所述第二栅极绝缘膜的至少第二凹部的底部上的第二栅极绝缘膜， 区域和形成在所述第二栅极绝缘膜上的第二栅极电极，所述第一和第二栅极电极中的每一个包括至少一个含金属膜，并且所述第一和第二栅极电极中的至少一个是包括多个 的含金属膜的膜，并且构成第一栅电极的至少一部分并与第一栅极绝缘膜接触的含金属膜的功函数小于th 构成至少一部分第二栅电极并与第二栅极绝缘膜接触的含金属膜的功函数。