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    Method of manufacturing semiconductor integrated circuit device optical mask therefor, its manufacturing method, and mask blanks
    2.
    发明授权
    Method of manufacturing semiconductor integrated circuit device optical mask therefor, its manufacturing method, and mask blanks 有权
    半导体集成电路器件的光掩模及其制造方法和掩模毛坯的制造方法

    公开(公告)号：US07125651B2

    公开(公告)日：2006-10-24

    申请号：US10674381

    申请日：2003-10-01

    申请人： Norio Hasegawa ,  Tsuneo Terasawa ,  Toshihiko Tanaka

    发明人： Norio Hasegawa ,  Tsuneo Terasawa ,  Toshihiko Tanaka

    IPC分类号： G03C5/00 ,  G03F9/00

    CPC分类号： G03F1/56 ,  G03F1/44 ,  G03F1/62 ,  G03F7/70983

    摘要： In order to suppress or prevent the occurrence of foreign matter in the manufacture of a semiconductor integrated circuit device by the use of a photo mask constituted in such a manner that a resist film is made to function as a light screening film, inspection or exposure treatment is carried out, when the photo mask 1PA1 has been mounted on a predetermined apparatus such as, e.g., an inspection equipment or aligner, in the state in which a mounting portion 2 of the predetermined apparatus is contacted with that region of a major surface of a mask substrate 1a of the photo mask 1PA1 in which a light shielding pattern 1b and a mask pattern 1mr, each formed of a resist film, on the major surface of the mask substrate 1a do not exist.

    摘要翻译： 为了通过使用以使抗蚀剂膜作为遮光膜的方式构成的光掩模来抑制或防止在制造半导体集成电路器件时发生异物，检查或曝光处理 当在预定设备的安装部分2与主要区域的区域接触的状态下，当光掩模1PA1已经安装在诸如检查设备或对准器的预定设备上时， 在掩模基板1a的主表面上不存在其中由抗蚀剂膜形成的遮光图案1b和掩模图案1mr的光掩模1 PA1的掩模基板1a的表面。

    Method for manufacturing a semiconductor device using half-tone phase-shift mask to transfer a pattern onto a substrate
    4.
    发明授权
    Method for manufacturing a semiconductor device using half-tone phase-shift mask to transfer a pattern onto a substrate 有权
    使用半色调相移掩模制造半导体器件以将图案转印到衬底上的方法

    公开(公告)号：US06645856B2

    公开(公告)日：2003-11-11

    申请号：US10170647

    申请日：2002-06-14

    申请人： Toshihiko Tanaka ,  Norio Hasegawa ,  Tsuneo Terasawa

    发明人： Toshihiko Tanaka ,  Norio Hasegawa ,  Tsuneo Terasawa

    IPC分类号： H01L2132

    CPC分类号： G03F1/32 ,  G03F1/56 ,  Y10S438/946

    摘要： A pattern is transferred to a resist film on a wafer by a reduction projection exposure method using a half-tone phase-shift mask in which is formed a half-tone phase-shifter pattern including a thin-film pattern functioning as an attenuator and a resist pattern functioning as the photosensitive composition for phase adjustment. This method improves the accuracy of dimensions of the pattern transferred to the wafer.

    摘要翻译： 通过使用半色调相移掩模的缩小投影曝光方法将图案转印到晶片上的抗蚀剂膜，其中形成半色调移相器图形，其包括用作衰减器的薄膜图案和 作为用于相位调整的光敏组合物的抗蚀剂图案。 该方法提高了传送到晶片的图案的尺寸精度。

    Method for manufacturing semiconductor integrated circuit device, optical mask used therefor, method for manufacturing the same, and mask blanks used therefor
    10.
    发明授权
    Method for manufacturing semiconductor integrated circuit device, optical mask used therefor, method for manufacturing the same, and mask blanks used therefor 有权
    用于制造半导体集成电路器件的方法，用于其的光学掩模，其制造方法和用于其的掩模毛坯

    公开(公告)号：US06677107B1

    公开(公告)日：2004-01-13

    申请号：US09646036

    申请日：2000-09-13

    申请人： Norio Hasegawa ,  Tsuneo Terasawa ,  Toshihiko Tanaka

    发明人： Norio Hasegawa ,  Tsuneo Terasawa ,  Toshihiko Tanaka

    IPC分类号： G03C500

    CPC分类号： G03F1/56 ,  G03F1/44 ,  G03F1/62 ,  G03F7/70983

    摘要： In order to suppress or prevent the occurrence of foreign matter in the manufacture of a semiconductor integrated circuit device by the use of a photo mask constituted in such a manner that a resist film is made to function as a light screening film, inspection or exposure treatment is carried out, when the photo mask 1PA1 has been mounted on a predetermined apparatus such as, e.g., an inspection equipment or aligner, in the state in which a mounting portion 2 of the predetermined apparatus is contacted with that region of a major surface of a mask substrate 1a of the photo mask 1PA1 in which a light shielding pattern 1b and a mask pattern 1mr, each formed of a resist film, on the major surface of the mask substrate 1a do not exist.

    摘要翻译： 为了通过使用以使抗蚀剂膜作为遮光膜的方式构成的光掩模来抑制或防止在制造半导体集成电路器件时发生异物，检查或曝光处理 当在预定设备的安装部分2与主要表面的区域接触的状态下，当光掩模1PA1已经安装在诸如检查设备或对准器的预定设备上时， 在掩模基板1a的主表面上不存在其中由抗蚀剂膜形成的遮光图案1b和掩模图案1mr的光掩模1PA1的掩模基板1a。