Driving circuit for brushless DC motors
    1.
    发明授权
    Driving circuit for brushless DC motors 失效
    无刷直流电机驱动电路

    公开(公告)号:US4633150A

    公开(公告)日:1986-12-30

    申请号:US804259

    申请日:1985-12-03

    IPC分类号: H02P6/04 H02P6/10 H02P6/02

    CPC分类号: H02P6/10

    摘要: A driving circuit for a brushless DC motor having a small amount of torque ripple comprises a magnetic pole position detecting circuit for detecting positions of magnetic poles of a rotor magnet and delivering polyphase signals indicating the positions, a rectifier adder circuit for producing a sum of positive or negative portions of the polyphase signals from the magnetic pole position detecting circuit, a first error amplifier for adjusting a gain of the magnetic pole position detecting circuit to make an output signal of the rectifier adder circuit to be proportional to an instruction signal, a power supply circuit for supplying currents to armature coils in response to the polyphase signals, a modulating signal producing circuit for producing a modulating signal synchronized with the rotation of the motor, and a second error amplifier for adjusting a gain of the power supply circuit to make the currents supplied to the armature coils to be proportional to the modulating signal.

    摘要翻译: 具有少量转矩波动的无刷直流电动机的驱动电路包括磁极位置检测电路,用于检测转子磁体的磁极位置并输出指示位置的多相信号,整流器加法电路产生正的和 或来自磁极位置检测电路的多相信号的负极部分,用于调节磁极位置检测电路的增益以使整流器加法器电路的输出信号与指令信号成比例的第一误差放大器, 用于响应于多相信号向电枢线圈提供电流的电源电路,用于产生与电动机的旋转同步的调制信号的调制信号产生电路和用于调节电源电路的增益的第二误差放大器, 提供给电枢线圈的电流与调制信号成正比。

    Servo system
    2.
    发明授权
    Servo system 失效
    伺服系统

    公开(公告)号:US4636696A

    公开(公告)日:1987-01-13

    申请号:US785900

    申请日:1985-10-09

    摘要: A servo system for controlling the rotational speed of a rotating body or the moving speed of a moving body to be a desired speed. The system comprises a voltage source which generates at least two predetermined voltages, a comparator which compares a voltage of an AC signal containing a speed information of the moving body with each of the voltages generated by the voltage source and outputs at least two output signals in each half period of the AC signal, a counter for counting reference clock signals, a memory for storing a count value of the counter when the comparator outputs each of the output signals, a processor for producing a speed error signal from the count value stored in the memory, and a driver for supplying a driving power to the moving body in accordance with the speed error signal thereby to keep a desired speed of the moving body. Further, an error compensator may be provided for compensating a voltage shift of the predetermined voltages.

    摘要翻译: 一种用于将旋转体的旋转速度或移动体的移动速度控制为期望速度的伺服系统。 该系统包括产生至少两个预定电压的电压源,比较器,其将包含移动体的速度信息的AC信号的电压与由电压源产生的每个电压进行比较,并输出至少两个输出信号 AC信号的每个半周期,用于计数参考时钟信号的计数器,用于当比较器输出每个输出信号时存储计数器的计数值的存储器,用于从存储在存储器中的计数值产生速度误差信号的处理器 存储器和用于根据速度误差信号向移动体提供驱动力的驱动器,从而保持移动体的期望速度。 此外,可以提供误差补偿器来补偿预定电压的电压偏移。

    Frequency synthesizer
    3.
    发明授权
    Frequency synthesizer 失效
    频率合成器

    公开(公告)号:US4301422A

    公开(公告)日:1981-11-17

    申请号:US28750

    申请日:1979-04-10

    申请人: Hiroshi Minakuchi

    发明人: Hiroshi Minakuchi

    CPC分类号: H03L7/097

    摘要: A first frequency-to-voltage converter develops a first voltage representative of a standard frequency. A variable frequency source is provided to furnish a pulse sequence with constant-duration but variable repetition pulses. A frequency-to-voltage converter receives the pulse sequence to develop a second voltage representative of a total pulse energy generated in the pulse sequence per unit time. The deviation of the second voltage from the first voltage is detected by a comparator to control the variable frequency source to derive a desired frequency.

    摘要翻译: 第一个频率 - 电压转换器开发代表标准频率的第一电压。 提供可变频率源以提供具有恒定持续时间但可变重复脉冲的脉冲序列。 频率 - 电压转换器接收脉冲序列以产生表示每单位时间脉冲序列中产生的总脉冲能量的第二电压。 第二电压与第一电压的偏差由比较器检测,以控制可变频率源以导出期望的频率。

    Digital frequency-phase comparator
    4.
    发明授权
    Digital frequency-phase comparator 失效
    数字频率相位比较器

    公开(公告)号:US4277754A

    公开(公告)日:1981-07-07

    申请号:US87370

    申请日:1979-10-23

    申请人: Hiroshi Minakuchi

    发明人: Hiroshi Minakuchi

    IPC分类号: H03D13/00

    CPC分类号: H03D13/003

    摘要: A digital frequency-phase comparator includes a bistable element responsive to first and second frequency input pulse signals for generating a phase error signal, a circuit which includes second and third bistable elements responsive only to the leading edge transition of the input pulse signals in the presence of the outputs from the first bistable element to generate frequency error signals, and a circuit which combines the phase and frequency error signals to provide a triple state output.

    摘要翻译: 数字频率相位比较器包括响应于第一和第二频率输入脉冲信号以产生相位误差信号的双稳态元件,包括第二和第三双稳态元件的电路,其仅响应在存在的输入脉冲信号的前沿跃迁 的来自第一双稳态元件的输出以产生频率误差信号,以及组合相位和频率误差信号以提供三态输出的电路。

    Integrated precision reference source
    6.
    发明授权
    Integrated precision reference source 失效
    集成精密参考源

    公开(公告)号:US4559488A

    公开(公告)日:1985-12-17

    申请号:US555678

    申请日:1983-11-28

    申请人: Hiroshi Minakuchi

    发明人: Hiroshi Minakuchi

    IPC分类号: G05F1/56 G05F1/575 G05F3/20

    CPC分类号: G05F1/575

    摘要: An integrated precision reference source for supplying a reference voltage or a reference current under the condition of a lower feed voltage is disclosed, includes a first transistor, a first resistor connected between base and collector of the first transistor, a second resistor connected between base and emitter of the first transistor, and a second transistor whose base is connected to the collector of the first transistor and whose emitter is connected through a third resistor to the emitter of the first transistor.

    摘要翻译: 公开了一种用于在较低进给电压条件下提供参考电压或参考电流的集成精密参考源,包括第一晶体管,连接在第一晶体管的基极和集电极之间的第一电阻器,第二电阻器,连接在基极和 第一晶体管的发射极和第二晶体管,其基极连接到第一晶体管的集电极,其发射极通过第三电阻器连接到第一晶体管的发射极。

    Integrated signal processing circuit
    7.
    发明授权
    Integrated signal processing circuit 失效
    集成信号处理电路

    公开(公告)号:US4379238A

    公开(公告)日:1983-04-05

    申请号:US352852

    申请日:1982-02-26

    申请人: Hiroshi Minakuchi

    发明人: Hiroshi Minakuchi

    IPC分类号: H03K17/62 H03K5/00 H03K17/56

    CPC分类号: H03K17/6242

    摘要: Disclosed is an integrated circuit in which more than two kinds of information outputs are superimposed on the same output terminal and the output level of an output terminal is varied in more than three steps in order to apply many information outputs to a small number of output terminals and transmit the operation state of the internal circuit externally. The structure of the integrated circuit is simplified, because the number of terminals in the integrated circuit and the number of connection wires between internal and external circuits can be reduced.

    摘要翻译: 公开了一种集成电路,其中两个以上的信息输出叠加在相同的输出端子上,并且输出端子的输出电平以三个步长变化,以便将许多信息输出应用于少数输出端子 并从外部传输内部电路的工作状态。 由于集成电路中的端子数量和内部和外部电路之间的连接线数量可以减少,集成电路的结构被简化。

    Programmable frequency divider
    8.
    发明授权
    Programmable frequency divider 失效
    可编程分频器

    公开(公告)号:US4331926A

    公开(公告)日:1982-05-25

    申请号:US118850

    申请日:1980-02-05

    申请人: Hiroshi Minakuchi

    发明人: Hiroshi Minakuchi

    CPC分类号: H03K23/665

    摘要: A programmable frequency divider includes a programmable counter which comprises flip-flops 1 to 11 of a number less by one than the number of bits in a program value. The divider has first and second control circuits 101, 102 which respectively control every half period of a preset divided output pulse alternately, the second control circuit acting to delay the moment of the control in response to the least significant bit having a selected logic level, thereby enabling one to reduce the clock pulse frequency to a half in comparison with a conventional one. One can also obtain an optional sub-output signal of twice or one-half the frequency of a preset frequency output signal. Refer to FIG. 2.

    摘要翻译: 可编程分频器包括可编程计数器,其包括比编程值中的位数少一个数量的触发器1至11。 分频器具有交替地分别控制预置的分割输出脉冲的每半个周期的第一和第二控制电路101,102,第二控制电路响应于具有所选择的逻辑电平的最低有效位而延迟控制的时刻, 从而能够将时钟脉冲频率与常规脉冲频率相比降低一半。 还可以获得预设频率输出信号频率的两倍或一半的可选副输出信号。 参见图 2。

    Velocity detecting apparatus insensitive to noise
    9.
    发明授权
    Velocity detecting apparatus insensitive to noise 失效
    速度检测装置对噪声不敏感

    公开(公告)号:US4115831A

    公开(公告)日:1978-09-19

    申请号:US818859

    申请日:1977-07-25

    申请人: Hiroshi Minakuchi

    发明人: Hiroshi Minakuchi

    CPC分类号: G01P3/4805 H02P7/2885

    摘要: A velocity detecting apparatus comprises a waveform shaping circuit including a first stage switching transistor connected in a rotational speed control loop for a rotary machine, for amplifying and shaping an A.C. signal derived from a velocity sensor and being operated between a saturation region and an active region, a waveform transform circuit having a stable state and a quasi-stable state for a given period after the application of an input signal, for transforming an output signal of the waveform shaping circuit to a square wave having a given duration, an integration circuit for integrating the square wave with time to produce an integrated output, and a comparator for comparing the output voltage of the integration circuit with a reference voltage. In this velocity detecting apparatus, the beginning of the quasi-stable state of the waveform transform circuit is established by the beginning of the active region of the first stage switching transistor of the waveform shaping circuit, and the integration circuit includes first and second series-connected resistors arranged to voltage divide the square wave. One end of an integrating capacitor is connected to the junction of the first and second resistors while the resistances of the first and second resistors are selected such that a duty factor of the square wave during constant velocity control lies between approximately 4/5 and 1/1.

    摘要翻译: 速度检测装置包括波形整形电路,其包括连接在用于旋转机器的转速控制回路中的第一级开关晶体管,用于放大和整形从速度传感器导出并在饱和区域和有源区域之间操作的AC信号 ,在施加输入信号之后的给定时间段内具有稳定状态和准稳态的波形变换电路,用于将波形整形电路的输出信号变换为具有给定持续时间的方波;积分电路, 将方波与时间积分以产生集成输出,以及用于将积分电路的输出电压与参考电压进行比较的比较器。 在该速度检测装置中,通过波形整形电路的第一级开关晶体管的有源区域的开始建立波形变换电路的准稳态的开始,积分电路包括第一和第二串联电路, 连接的电阻器被设置为对方波进行分压。 积分电容器的一端连接到第一和第二电阻器的结,同时选择第一和第二电阻器的电阻,使得恒定速度控制中的方波的占空因数在大约4/5和1 / 1。

    Digital frequency synthesizer with frequency divider programmable in
response to stored digital control signal
    10.
    发明授权
    Digital frequency synthesizer with frequency divider programmable in response to stored digital control signal 失效
    具有分频器数字频率合成器,可响应存储的数字控制信号而编程

    公开(公告)号:US4296407A

    公开(公告)日:1981-10-20

    申请号:US38991

    申请日:1979-05-14

    申请人: Hiroshi Minakuchi

    发明人: Hiroshi Minakuchi

    CPC分类号: H03J5/0254 H03K23/66

    摘要: A digital frequency synthesizer comprises a programmable frequency divider, an analog-to-digital converter for converting an analog program control signal into a digital signal, and a digital storage medium for storing the digital signal to control the frequency division ratio of the programmable frequency divider in accordance with the digital value of the stored signal.

    摘要翻译: 数字频率合成器包括可编程分频器,用于将模拟程序控制信号转换为数字信号的模数转换器,以及用于存储数字信号以控制可编程分频器的分频比的数字存储介质 根据存储信号的数字值。