Methods and systems for increasing surface area of multilayer ceramic capacitors

    公开(公告)号:US10128047B2

    公开(公告)日:2018-11-13

    申请号:US15212297

    申请日:2016-07-18

    Abstract: Methods and systems to improve a multilayer ceramic capacitor using additive manufacturing are disclosed. Layers of a capacitor may be modified from its traditional planar shape to a wavy structure. The wavy shape increases surface area within a fixed volume of the capacitor, thus increasing capacitance, and may comprise smooth and repetitive oscillations without the presence of voltage-degrading sharp corners. In addition, the ends of each conductive layer do not have sharp edges, such as comprising of a round corner. The one-dimensional wave pattern may run parallel to the width of the capacitor, or it may align in parallel to the length of the capacitor. In some embodiments, the wave pattern may be parallel to both the width and the length—in two dimensions—such that it forms an egg-crate shape. Further, the wavy structures may comprise of secondary or tertiary wavy structures to further increase surface area.

    METHODS AND SYSTEMS FOR GEOMETRIC OPTIMIZATION OF MULTILAYER CERAMIC CAPACITORS

    公开(公告)号:US20190214196A1

    公开(公告)日:2019-07-11

    申请号:US16357349

    申请日:2019-03-19

    Abstract: Methods and systems to improve a multilayer ceramic capacitor using additive manufacturing are disclosed. Conductive layer ends and dielectric layer edges of a multilayer ceramic capacitor may be modified to comprise a round shape, which may increase voltage limits by reducing electric field intensity that results from sharp corners. Further, the capacitor may comprise wave-like structures to increase surface area of a conductive layer and/or dielectric layer. The round shape of the conductive layer end may in-part reduce the need for a wide protective gap due to its dome-shape permitting the dielectric layer to be wider on top and bottom, and thinner at the center, e.g. concave, which provides strength support to the layers. The 3D Printing process permits the distance between the conductive layer end of the conductive layer to be much closer to the dielectric layer edge of the dielectric layer, such as below the standard 500 microns.

    METHODS AND SYSTEMS FOR GEOMETRIC OPTIMIZATION OF MULTILAYER CERAMIC CAPACITORS
    4.
    发明申请
    METHODS AND SYSTEMS FOR GEOMETRIC OPTIMIZATION OF MULTILAYER CERAMIC CAPACITORS 审中-公开
    多层陶瓷电容几何优化的方法与系统

    公开(公告)号:US20170018365A1

    公开(公告)日:2017-01-19

    申请号:US15250993

    申请日:2016-08-30

    CPC classification number: H01G4/30 H01G4/0085 H01G4/012 H01G4/1227 H01G4/232

    Abstract: Methods and systems to improve a multilayer ceramic capacitor using additive manufacturing are disclosed. Conductive layer ends and dielectric layer edges of a multilayer ceramic capacitor may be modified to comprise a round shape, which may increase voltage limits by reducing electric field intensity that results from sharp corners. Further, the capacitor may comprise wave-like structures to increase surface area of a conductive layer and/or dielectric layer. The round shape of the conductive layer end may in-part reduce the need for a wide protective gap due to its dome-shape permitting the dielectric layer to be wider on top and bottom, and thinner at the center, e.g. concave, which provides strength support to the layers. The 3D Printing process permits the distance between the conductive layer end of the conductive layer to be much closer to the dielectric layer edge of the dielectric layer, such as below the standard 500 microns.

    Abstract translation: 公开了使用添加剂制造改进多层陶瓷电容器的方法和系统。 多层陶瓷电容器的导电层端部和电介质层边缘可以被修改为包括圆形,这可以通过减小由尖角引起的电场强度来增加电压限制。 此外,电容器可以包括波形结构以增加导电层和/或介电层的表面积。 导电层端部的圆形可以部分地减少由于其圆顶形状允许电介质层在顶部和底部更宽并且在中心更薄的圆顶形状的宽保护间隙的需要,例如, 凹面,其为层提供强度支撑。 3D印刷工艺允许导电层的导电层端之间的距离更接近电介质层的电介质层边缘,例如低于标准500微米。

    Methods and systems for geometric optimization of multilayer ceramic capacitors

    公开(公告)号:US10242803B2

    公开(公告)日:2019-03-26

    申请号:US15250993

    申请日:2016-08-30

    Abstract: Methods and systems to improve a multilayer ceramic capacitor using additive manufacturing are disclosed. Conductive layer ends and dielectric layer edges of a multilayer ceramic capacitor may be modified to comprise a round shape, which may increase voltage limits by reducing electric field intensity that results from sharp corners. Further, the capacitor may comprise wave-like structures to increase surface area of a conductive layer and/or dielectric layer. The round shape of the conductive layer end may in-part reduce the need for a wide protective gap due to its dome-shape permitting the dielectric layer to be wider on top and bottom, and thinner at the center, e.g. concave, which provides strength support to the layers. The 3D Printing process permits the distance between the conductive layer end of the conductive layer to be much closer to the dielectric layer edge of the dielectric layer, such as below the standard 500 microns.

    Methods and systems to minimize delamination of multilayer ceramic capacitors

    公开(公告)号:US10236123B2

    公开(公告)日:2019-03-19

    申请号:US15406763

    申请日:2017-01-15

    Abstract: Methods and systems to improve a multilayer ceramic capacitor using additive manufacturing are disclosed. Conductive layer ends of a multilayer ceramic capacitor may be modified to comprise a round shape, which may increase structural stability of the capacitor's layers. Other configurations may be possible, such as bulbous or wavy shaped conductive layer ends. The layers may comprise one or more pillars made from dielectric material, e.g., barium titanate, disposed through a portion of a conductive layer. The dielectric material may be the same material used in the insulator layers of the capacitor. Each pillar may comprise a plurality of spot connections surrounding its perimeter. The embedded pillars may be used to prevent delamination of the layers and to increase mechanical strength. Additionally, an algorithm of a computing device may determine an optimal shape, size, and/or configuration of the capacitor based on one or more predetermined specifications or properties.

    METHODS AND SYSTEMS FOR INCREASING SURFACE AREA OF MULTILAYER CERAMIC CAPACITORS
    8.
    发明申请
    METHODS AND SYSTEMS FOR INCREASING SURFACE AREA OF MULTILAYER CERAMIC CAPACITORS 审中-公开
    增加多层陶瓷电容表面积的方法与系统

    公开(公告)号:US20170018364A1

    公开(公告)日:2017-01-19

    申请号:US15212297

    申请日:2016-07-18

    CPC classification number: H01G4/30 H01G4/005 H01G4/012 H01G4/1227 H01G4/232

    Abstract: Methods and systems to improve a multilayer ceramic capacitor using additive manufacturing are disclosed. Layers of a capacitor may be modified from its traditional planar shape to a wavy structure. The wavy shape increases surface area within a fixed volume of the capacitor, thus increasing capacitance, and may comprise smooth and repetitive oscillations without the presence of voltage-degrading sharp corners. In addition, the ends of each conductive layer do not have sharp edges, such as comprising of a round corner. The one-dimensional wave pattern may run parallel to the width of the capacitor, or it may align in parallel to the length of the capacitor. In some embodiments, the wave pattern may be parallel to both the width and the length—in two dimensions—such that it forms an egg-crate shape. Further, the wavy structures may comprise of secondary or tertiary wavy structures to further increase surface area.

    Abstract translation: 公开了使用添加剂制造改进多层陶瓷电容器的方法和系统。 电容器的层可以从其传统的平面形状改变为波浪形结构。 波形形状增加了电容器的固定体积内的表面积,从而增加电容,并且可以包括平滑和重复的振荡,而不存在电压降低的锐角。 此外,每个导电层的端部不具有锋利的边缘,例如包括圆角。 一维波形图可以平行于电容器的宽度延伸,或者可以与电容器的长度平行排列。 在一些实施例中,波形图案可以平行于宽度和长度 - 在两个维度上 - 使得其形成蛋箱形状。 此外,波浪结构可以包括二次或三次波浪结构,以进一步增加表面积。

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