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    Apparatus and methods for improved input/output cells
    1.
    发明授权
    Apparatus and methods for improved input/output cells 有权
    改进输入/输出单元的装置和方法

    公开(公告)号：US07239170B2

    公开(公告)日：2007-07-03

    申请号：US10614956

    申请日：2003-07-08

    申请人： Victor Suen ,  William Lau ,  Hong-Him Lim ,  Cheng-Gang Kong

    发明人： Victor Suen ,  William Lau ,  Hong-Him Lim ,  Cheng-Gang Kong

    IPC分类号： H03K17/16 ,  H03K19/003

    CPC分类号： G11C7/1057 ,  G11C7/1051 ,  G11C7/1066 ,  G11C7/1078 ,  G11C7/1084 ,  G11C7/1093

    摘要： Apparatus and methods are provided for improving data exchanges between electronic devices, such as memory controllers and RLDRAMs. An I/O cell includes a signal pad for transferring a first signal to an electronic device coupled thereto and for receiving a second signal from the electronic device. In one aspect, a duty cycle controller is coupled to the signal pad for balancing a duty cycle of the first signal with respect to a clock signal. In another aspect, dynamic switchable termination is coupled to the signal pad for providing termination impedance when the I/O cell is receiving the second signal.

    摘要翻译： 提供了用于改善诸如存储器控制器和RLDRAM之类的电子设备之间的数据交换的装置和方法。 I / O单元包括用于将第一信号传送到与其耦合的电子设备并用于从电子设备接收第二信号的信号焊盘。 在一个方面，占空比控制器耦合到信号焊盘，用于平衡相对于时钟信号的第一信号的占空比。 在另一方面，当I / O单元正在接收第二信号时，动态可切换端接耦合到信号焊盘以提供终端阻抗。

    Apparatus and methods for improved input/output cells
    2.
    发明申请
    Apparatus and methods for improved input/output cells 有权
    改进输入/输出单元的装置和方法

    公开(公告)号：US20050010833A1

    公开(公告)日：2005-01-13

    申请号：US10614956

    申请日：2003-07-08

    申请人： Victor Suen ,  William Lau ,  Hong-Him Lim ,  Cheng-Gang Kong

    发明人： Victor Suen ,  William Lau ,  Hong-Him Lim ,  Cheng-Gang Kong

    IPC分类号： G06F1/04 ,  G11C7/10

    CPC分类号： G11C7/1057 ,  G11C7/1051 ,  G11C7/1066 ,  G11C7/1078 ,  G11C7/1084 ,  G11C7/1093

    摘要： Apparatus and methods are provided for improving data exchanges between electronic devices, such as memory controllers and RLDRAMs. An I/O cell includes a signal pad for transferring a first signal to an electronic device coupled thereto and for receiving a second signal from the electronic device. In one aspect, a duty cycle controller is coupled to the signal pad for balancing a duty cycle of the first signal with respect to a clock signal. In another aspect, dynamic switchable termination is coupled to the signal pad for providing termination impedance when the I/O cell is receiving the second signal.

    摘要翻译： 提供了用于改善诸如存储器控制器和RLDRAM之类的电子设备之间的数据交换的装置和方法。 I / O单元包括用于将第一信号传送到与其耦合的电子设备并用于从电子设备接收第二信号的信号焊盘。 在一个方面，占空比控制器耦合到信号焊盘，用于平衡第一信号相对于时钟信号的占空比。 在另一方面，当I / O单元正在接收第二信号时，动态可切换终端耦合到信号焊盘以提供终端阻抗。

    Wide-range programmable delay line
    6.
    发明申请
    Wide-range programmable delay line 有权

    公开(公告)号：US20060132210A1

    公开(公告)日：2006-06-22

    申请号：US11021361

    申请日：2004-12-22

    申请人： Cheng-Gang Kong ,  Victor Suen

    发明人： Cheng-Gang Kong ,  Victor Suen

    IPC分类号： H03H11/26

    CPC分类号： H03K5/133 ,  H03K2005/00058 ,  H03K2005/00071

    摘要： An apparatus comprising an input section, a first delay circuit and a second delay circuit. The input section may be configured to present a first intermediate signal by selecting either (i) an input clock signal or (ii) a feedback of an output signal. The first delay circuit may be configured to generate a second intermediate signal by delaying the first intermediate signal by inserting one of a plurality of fixed delays in response to a first control signal. The second delay circuit may be configured to generate the output signal by delaying the second intermediate signal by inserting a programmable delay in response to a second control signal.

    Wide-range programmable delay line
    7.
    发明授权
    Wide-range programmable delay line 有权
    宽范围可编程延时线

    公开(公告)号：US07119596B2

    公开(公告)日：2006-10-10

    申请号：US11021361

    申请日：2004-12-22

    申请人： Cheng-Gang Kong ,  Victor Suen

    发明人： Cheng-Gang Kong ,  Victor Suen

    IPC分类号： H03H11/26

    CPC分类号： H03K5/133 ,  H03K2005/00058 ,  H03K2005/00071

    摘要： An apparatus comprising an input section, a first delay circuit and a second delay circuit. The input section may be configured to present a first intermediate signal by selecting either (i) an input clock signal or (ii) a feedback of an output signal. The first delay circuit may be configured to generate a second intermediate signal by delaying the first intermediate signal by inserting one of a plurality of fixed delays in response to a first control signal. The second delay circuit may be configured to generate the output signal by delaying the second intermediate signal by inserting a programmable delay in response to a second control signal.

    摘要翻译： 一种装置，包括输入部分，第一延迟电路和第二延迟电路。 输入部分可以被配置为通过选择（i）输入时钟信号或（ii）输出信号的反馈来呈现第一中间信号。 第一延迟电路可以被配置为通过响应于第一控制信号插入多个固定延迟中的一个来延迟第一中间信号来产生第二中间信号。 第二延迟电路可以被配置为通过响应于第二控制信号插入可编程延迟来延迟第二中间信号来生成输出信号。

    SIGNAL DELAY SKEW REDUCTION SYSTEM
    9.
    发明申请
    SIGNAL DELAY SKEW REDUCTION SYSTEM 失效
    信号延迟减少系统

    公开(公告)号：US20120278783A1

    公开(公告)日：2012-11-01

    申请号：US13544632

    申请日：2012-07-09

    申请人： Andrey Nikitin ,  Ranko Scepanovic ,  Igor Kucherenko ,  William Lau ,  Cheng-Gang Kong ,  Hui-Yin Seto ,  Andrej Zolotykh ,  Ivan Pavisic ,  Sandeep Bhutani ,  Aiguo Lu ,  Ilya Lyalin

    发明人： Andrey Nikitin ,  Ranko Scepanovic ,  Igor Kucherenko ,  William Lau ,  Cheng-Gang Kong ,  Hui-Yin Seto ,  Andrej Zolotykh ,  Ivan Pavisic ,  Sandeep Bhutani ,  Aiguo Lu ,  Ilya Lyalin

    IPC分类号： G06F17/50

    CPC分类号： G06F17/505 ,  G06F2217/84

    摘要： A system and method are provided for reducing signal skew. The method includes receiving a netlist having components and connections among the components. Each connection has at least one signal wire. A plurality of net groups is identified, each net group including at least some of the connections and for which equivalent routing is desired. For each net group, the method includes systematically routing connection paths between the components for the connections, each connection path extending between an output of one of the components and an input to at least one other of the components and including at least one path fragment. Routing includes, for at least one of the connections of the net group, routing at least one grounded shielding wire in a routing channel adjacent and parallel to at least one of the path fragments of the connection path.

    摘要翻译： 提供了一种减少信号偏移的系统和方法。 该方法包括接收具有组件之间的组件和连接的网表。 每个连接具有至少一个信号线。 识别多个网络组，每个网络组包括至少一些连接并且期望等效路由。 对于每个网络组，所述方法包括系统地路由用于连接的组件之间的连接路径，每个连接路径在组件之一的输出和至少一个其他组件的输入之间延伸并且包括至少一个路径片段。 对于网络组的至少一个连接，路由包括在与连接路径的路径片段中的至少一个相邻并且平行的路由信道中路由至少一个接地屏蔽线。

    Method and computer program for generating grounded shielding wires for signal wiring
    10.
    发明授权
    Method and computer program for generating grounded shielding wires for signal wiring 失效
    用于生成信号线接地屏蔽线的方法和计算机程序

    公开(公告)号：US08516425B2

    公开(公告)日：2013-08-20

    申请号：US13544632

    申请日：2012-07-09

    申请人： Andrey Nikitin ,  Ranko Scepanovic ,  Igor Kucherenko ,  William Lau ,  Cheng-Gang Kong ,  Hui-Yin Seto ,  Andrej Zolotykih ,  Ivan Pavisic ,  Sandeep Bhutani ,  Aiguo Lu ,  Ilya Lyalin

    发明人： Andrey Nikitin ,  Ranko Scepanovic ,  Igor Kucherenko ,  William Lau ,  Cheng-Gang Kong ,  Hui-Yin Seto ,  Andrej Zolotykih ,  Ivan Pavisic ,  Sandeep Bhutani ,  Aiguo Lu ,  Ilya Lyalin

    IPC分类号： G06F17/50

    CPC分类号： G06F17/505 ,  G06F2217/84

    摘要： A system and method are provided for reducing signal skew. The method includes receiving a netlist having components and connections among the components. Each connection has at least one signal wire. A plurality of net groups is identified, each net group including at least some of the connections and for which equivalent routing is desired. For each net group, the method includes systematically routing connection paths between the components for the connections, each connection path extending between an output of one of the components and an input to at least one other of the components and including at least one path fragment. Routing includes, for at least one of the connections of the net group, routing at least one grounded shielding wire in a routing channel adjacent and parallel to at least one of the path fragments of the connection path.

    摘要翻译： 提供了一种减少信号偏移的系统和方法。 该方法包括接收具有组件之间的组件和连接的网表。 每个连接具有至少一个信号线。 识别多个网络组，每个网络组包括至少一些连接并且期望等效路由。 对于每个网络组，所述方法包括系统地路由用于连接的组件之间的连接路径，每个连接路径在组件之一的输出和至少一个其他组件的输入之间延伸并且包括至少一个路径片段。 对于网络组的至少一个连接，路由包括在与连接路径的路径片段中的至少一个相邻并且平行的路由信道中路由至少一个接地屏蔽线。