Parallel power converter topology
    1.
    发明授权
    Parallel power converter topology 有权
    并联电源转换器拓扑

    公开(公告)号:US08824178B1

    公开(公告)日:2014-09-02

    申请号:US12982798

    申请日:2010-12-30

    IPC分类号: H02M7/537

    摘要: A power converter may include a first power path having no energy storage and a second power path having substantial energy storage. The first and second power paths have first and second input waveforms that are complementary with respect to a source waveform. The first power path, which may be more efficient than the second path, may transfer as much power as possible from the input to the output. The energy storage enables the second power path to make up the difference between the power available from the source and the power drawn by the first power path, and to make up the difference between the power demanded by a load and the power supplied by the first path.

    摘要翻译: 功率转换器可以包括没有能量存储的第一功率路径和具有大量能量存储的第二功率路径。 第一和第二电源路径具有相对于源波形互补的第一和第二输入波形。 可能比第二路径更有效的第一功率路径可以将尽可能多的功率从输入端传送到输出端。 能量存储使得第二功率路径能够弥补从源提供的功率与由第一功率路径消耗的功率之间的差异,并且补偿由负载所需的功率与由第一功率提供的功率之间的差 路径。

    Power Point Tracking
    2.
    发明申请
    Power Point Tracking 有权
    功率点跟踪

    公开(公告)号:US20110160930A1

    公开(公告)日:2011-06-30

    申请号:US12972398

    申请日:2010-12-17

    IPC分类号: G06F1/26 H02J1/00

    摘要: A local power converter may include a controller to manipulate the operating point of a local power converter to cause the power point tracking feature of a central power converter to operate at a point determined by the controller. In some embodiments, the controller can manipulate the operating point of the local power converter by alternating between at least two modes. In some other embodiments, the controller can manipulate the operating point of the local power converter to provide a substantially constant slope. In some other embodiments, the controller can maintain a substantially constant impedance ratio. In some other embodiments, the controller enables perturbations from the power point tracking feature of the central power converter to reach the power source.

    摘要翻译: 本地电力转换器可以包括控制器来操纵局部电力转换器的工作点,以使中央电源转换器的电源点跟踪特征在由控制器确定的点上操作。 在一些实施例中,控制器可以通过在至少两种模式之间交替来操纵本地功率转换器的工作点。 在一些其他实施例中,控制器可以操纵局部功率转换器的工作点以提供基本恒定的斜率。 在一些其他实施例中,控制器可以保持基本恒定的阻抗比。 在一些其他实施例中,控制器使得来自中央功率转换器的功率点跟踪特征的扰动到达电源。

    Temperature compensation for RF detectors
    3.
    发明授权
    Temperature compensation for RF detectors 有权
    射频探测器的温度补偿

    公开(公告)号:US07728647B2

    公开(公告)日:2010-06-01

    申请号:US12175362

    申请日:2008-07-17

    IPC分类号: H01L35/00

    摘要: Compensation for an RF detector includes components having different order temperature functions. The components are combined and may be adjusted by various numbers of user-accessible terminals to provide individual adjustment for factors such as operating frequency. In some embodiments, first and second-order temperature functions are generated independently and combined to provide a polynomial function of temperature with coefficients that may be adjusted. In other embodiments, the outputs of the function generators may be more complex functions of temperature with various adjustable parameters.

    摘要翻译: RF检测器的补偿器包括具有不同顺序温度功能的组件。 这些组件被组合并且可以通过各种数量的用户可访问终端进行调整,以提供诸如操作频率等因素的单独调整。 在一些实施例中,独立地生成一阶和二阶温度函数并组合以提供具有可被调整的系数的温度的多项式函数。 在其他实施例中,功能发生器的输出可以是具有各种可调节参数的温度的更复杂的功能。

    Interpolated variable gain amplifier with multiple active feedback cells
    4.
    发明授权
    Interpolated variable gain amplifier with multiple active feedback cells 有权
    具有多个有源反馈单元的内插可变增益放大器

    公开(公告)号:US07292100B1

    公开(公告)日:2007-11-06

    申请号:US11089043

    申请日:2005-03-22

    IPC分类号: H03F3/45

    CPC分类号: H03G1/0035 H03G3/30

    摘要: An interpolated variable gain amplifier (VGA) utilizes multiple active feedback cells. The active feedback cells may be implemented as transconductance (gm) cells that replicate gm cells in the interpolated input stages.

    摘要翻译: 内插可变增益放大器(VGA)利用多个有源反馈单元。 有源反馈单元可以被实现为在内插输入级中复制gm单元的跨导(gm)单元。

    Fully differential logic or circuit for multiple non-overlapping inputs
    5.
    发明授权
    Fully differential logic or circuit for multiple non-overlapping inputs 有权
    用于多个不重叠输入的全差分逻辑或电路

    公开(公告)号:US06265901B1

    公开(公告)日:2001-07-24

    申请号:US09448121

    申请日:1999-11-24

    IPC分类号: H03K19086

    CPC分类号: H03M7/22

    摘要: A high speed, multiple input restrictive OR circuit with fully differential inputs and output is used in applications in which only one input can be active at a time. N differential voltage inputs are converted into N corresponding differential current signals of unit current values. The current signals corresponding to active complement input signals are summed together, with a compensation current equal to (N−1) current units subtracted from the total. The resulting compensated complement currents together with any active input current form a single differential current that indicates the logic state at the input. This differential current is preferably converted to a buffered output differential voltage in an output stage. For high accuracy applications, a common unit reference current is used to generate both a scaled compensation current and unit input stage source currents.

    摘要翻译: 具有全差分输入和输出的高速,多输入限制OR电路用于一次只能有一个输入有效的应用中。 N个差分电压输入转换为单位电流值的N个相应的差分电流信号。 与有效补码输入信号对应的电流信号相加在一起,补偿电流等于从总数减去的(N-1)个当前单位。 所产生的补偿补偿电流与任何有源输入电流一起形成单个差分电流,指示输入端的逻辑状态。 该差分电流优选地在输出级转换为缓冲输出差分电压。 对于高精度应用,公共单位参考电流用于产生标定的补偿电流和单位输入级源电流。

    Compensation with ratiometric attenuation
    6.
    发明授权
    Compensation with ratiometric attenuation 有权
    补偿比例衰减

    公开(公告)号:US08207777B1

    公开(公告)日:2012-06-26

    申请号:US11355318

    申请日:2006-02-14

    IPC分类号: G06G7/24

    CPC分类号: H03G7/001 H03G7/08

    摘要: An input signal is applied to a ratiometric gain/attenuator circuit. A nulling circuit is arranged to null the input signal with an output from the ratiometric gain/attenuator circuit. The ratiometric gain/attenuator circuit may include a gain stage in series with a ratiometric attenuator. By implementing the attenuator ratiometrically, the gain may be compensated with reference to a ratio of component values. A limiting stage with an absolute reference may precede the gain stage, and a pair of detector cells may arranged at the inputs to the nulling circuit.

    摘要翻译: 输入信号被施加到比例增益/衰减器电路。 排列电路被设置为使用比例增益/衰减器电路的输出使输入信号无效。 比例增益/衰减器电路可以包括与比例衰减器串联的增益级。 通过比例地实现衰减器,可以参考组件值的比率来补偿增益。 具有绝对参考的限制级可以在增益级之前,并且一对检测器单元可以布置在零电路的输入处。

    Energy Conversion Systems With Power Control
    7.
    发明申请
    Energy Conversion Systems With Power Control 有权
    带功率控制的能量转换系统

    公开(公告)号:US20100157638A1

    公开(公告)日:2010-06-24

    申请号:US12368990

    申请日:2009-02-10

    IPC分类号: H02M7/537

    摘要: In one embodiment, a power conversion system includes a controller to provide power control to a converter, and a distortion mitigation circuit. In another embodiment, a system includes a converter to transfer power between a power source and a load having fluctuating power demand, and a controller to provide power control, where the controller may selectively disable the power control. In another embodiment, a power conversion system includes a controller to generate a drive signal to provide power control to a power path in response to a sense signal from the power path, where the sense signal is taken from other than the input of the power path, or the drive signal is applied to the power path at other than a first power stage.

    摘要翻译: 在一个实施例中,功率转换系统包括向转换器提供功率控制的控制器和失真缓解电路。 在另一实施例中,系统包括转换器,用于在电源和具有波动的功率需求的负载之间传递功率,以及控制器,用于提供功率控制,其中控制器可以选择性地禁用功率控制。 在另一实施例中,功率转换系统包括控制器,用于响应于来自功率路径的感测信号而产生驱动信号以向功率路径提供功率控制,其中感测信号取自功率路径的输入 或者驱动信号被施加到除了第一功率级以外的功率路径。

    Temperature Compensation For RF Detectors
    8.
    发明申请
    Temperature Compensation For RF Detectors 有权
    RF检测器的温度补偿

    公开(公告)号:US20100013545A1

    公开(公告)日:2010-01-21

    申请号:US12175362

    申请日:2008-07-17

    IPC分类号: G06F7/16

    摘要: Compensation for an RF detector includes components having different order temperature functions. The components are combined and may be adjusted by various numbers of user-accessible terminals to provide individual adjustment for factors such as operating frequency. In some embodiments, first and second-order temperature functions are generated independently and combined to provide a polynomial function of temperature with coefficients that may be adjusted. In other embodiments, the outputs of the function generators may be more complex functions of temperature with various adjustable parameters.

    摘要翻译: RF检测器的补偿器包括具有不同顺序温度功能的组件。 这些组件被组合并且可以通过各种数量的用户可访问终端进行调整,以提供诸如操作频率等因素的单独调整。 在一些实施例中,独立地生成一阶和二阶温度函数并组合以提供具有可被调整的系数的温度的多项式函数。 在其他实施例中,功能发生器的输出可以是具有各种可调节参数的温度的更复杂的功能。

    Compensation for detectors
    9.
    发明申请
    Compensation for detectors 有权
    检测器补偿

    公开(公告)号:US20060132216A1

    公开(公告)日:2006-06-22

    申请号:US11020897

    申请日:2004-12-22

    IPC分类号: G06G7/24

    CPC分类号: G06G7/24

    摘要: The intercept of a logarithmic amplifier is temperature stabilized by generating a signal having the form H log H where H is a function of temperature such as T/T0. The first H factor is cancelled, thereby generating a correction signal having the form Y log H. The cancellation may be implemented with a transconductance cell having a hyperbolic tangent function. The H log H function may be generated by a pair of junctions biased by one temperature-stable current and one temperature-dependent current. The pair of junctions and the transconductance cell may be coupled together in a translinear loop. A user-accessible terminal may allow adjustment of the correction signal for different operating frequencies.

    摘要翻译: 对数放大器的截距通过产生具有H log H形式的信号来进行温度稳定,其中H是诸如T / T 0℃之类的温度的函数。 第一H因子被取消,从而产生具有Y log H形式的校正信号。可以用具有双曲正切函数的跨导单元实现取消。 H对数H函数可以由一对由一个温度稳定电流和一个温度依赖电流偏置的接点产生。 一对结和跨导单元可以在一个跨线性环路中耦合在一起。 用户可访问的终端可以允许针对不同的操作频率调整校正信号。

    Resetting flip-flop structures and methods for high-rate trigger generation and event monitoring
    10.
    发明授权
    Resetting flip-flop structures and methods for high-rate trigger generation and event monitoring 有权
    重置触发器结构和方法,用于高速率触发器生成和事件监视

    公开(公告)号:US06271701B1

    公开(公告)日:2001-08-07

    申请号:US09312141

    申请日:1999-05-14

    IPC分类号: H03K508

    CPC分类号: H03K3/037 H03K3/70

    摘要: D flip-flop structures are provided which respond to a DATA signal and a clock (CLK) signal by generating an output signal whose state during each clock pulse is that of the DATA signal at that pulse's leading edge and whose state between clock pulses is reset to a selected logic value. Accordingly, these flip-flops can function (e.g., monitor events in the DATA signal or generate sequences of trigger pulses) at the clock rate.

    摘要翻译: 提供了通过产生输出信号来响应DATA信号和时钟(CLK)信号的D触发器结构,其中每个时钟脉冲期间的状态是在该脉冲的前沿处的DATA信号的状态,并且其时钟脉冲之间的状态被复位 到一个选定的逻辑值。 因此,这些触发器可以以时钟速率起作用(例如,监视DATA信号中的事件或产生触发脉冲序列)。