利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

507 条记录 (耗时 0.034 秒)

    Analog-to-digital and digital-to-analog conversion window adjustment based on reference cells in a memory device
    1.
    发明授权
    Analog-to-digital and digital-to-analog conversion window adjustment based on reference cells in a memory device 有权
    基于存储器件中的参考单元的模数和数模转换窗口调整

    公开(公告)号：US08787103B2

    公开(公告)日：2014-07-22

    申请号：US13187665

    申请日：2011-07-21

    申请人： Vishal Sarin ,  Jung-Sheng Hoei ,  Frankie F. Roohparvar

    发明人： Vishal Sarin ,  Jung-Sheng Hoei ,  Frankie F. Roohparvar

    IPC分类号： G11C7/02

    CPC分类号： G11C16/06 ,  G11C7/16 ,  G11C11/5621 ,  G11C16/0483 ,  G11C27/005 ,  G11C2211/5634

    摘要： An analog-to-digital conversion window is defined by reference voltages stored in reference memory cells of a memory device. A first reference voltage is read to define an upper limit of the conversion window and a second reference voltage is read to define a lower limit of the conversion window. An analog voltage representing a digital bit pattern is read from a memory cell and converted to the digital bit pattern by an analog-to-digital conversion process using the conversion window as the limits for the sampling process. This scheme helps in real time tracking of the ADC window with changes in the program window of the memory array.

    摘要翻译： 模数转换窗口由存储在存储器件的参考存储单元中的参考电压定义。 读取第一参考电压以限定转换窗口的上限，并且读取第二参考电压以定义转换窗口的下限。 表示数字位模式的模拟电压从存储单元读取，并通过使用转换窗口作为采样处理的限制的模数转换处理转换为数字位模式。 该方案通过存储器阵列的程序窗口的改变，有助于实时跟踪ADC窗口。

    ANALOG SENSING OF MEMORY CELLS WITH A SOURCE FOLLOWER DRIVER IN A SEMICONDUCTOR MEMORY DEVICE
    3.
    发明申请
    ANALOG SENSING OF MEMORY CELLS WITH A SOURCE FOLLOWER DRIVER IN A SEMICONDUCTOR MEMORY DEVICE 有权
    用半导体存储器件中的源极驱动器对存储器电池进行模拟感测

    公开(公告)号：US20120307576A1

    公开(公告)日：2012-12-06

    申请号：US13572174

    申请日：2012-08-10

    申请人： Vishal Sarin ,  Jung-Sheng Hoei ,  Frankie F. Roohparvar

    发明人： Vishal Sarin ,  Jung-Sheng Hoei ,  Frankie F. Roohparvar

    IPC分类号： G11C7/00

    CPC分类号： G11C16/26 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/28 ,  G11C16/3481 ,  G11C27/02 ,  G11C27/024 ,  G11C2211/5634

    摘要： Memory devices, methods, and sample and hold circuits are disclosed, including a memory device that includes a sample and hold circuit coupled to a bit line. One such sample and hold circuit includes a read circuit, a verify circuit, and a reference circuit. The read circuit stores a read threshold voltage that was read from a selected memory cell. The verify circuit stores a target threshold voltage that is compared to the read threshold voltage to generate an inhibit signal when the target and read threshold voltages are substantially equal. The reference circuit stores a reference threshold voltage that can be used to translate the read threshold voltage to compensate for a transistor voltage drop and/or temperature variations.

    摘要翻译： 公开了存储器件，方法和采样和保持电路，包括包括耦合到位线的采样和保持电路的存储器件。 一个这样的采样和保持电路包括读取电路，验证电路和参考电路。 读取电路存储从所选存储单元读取的读取阈值电压。 验证电路存储与读取的阈值电压相比较的目标阈值电压，以在目标和读取阈值电压基本相等时产生禁止信号。 参考电路存储参考阈值电压，该参考阈值电压可用于转换读取阈值电压以补偿晶体管电压降和/或温度变化。

    Mitigation of data corruption from back pattern and program disturb in a non-volatile memory device
    5.
    发明授权
    Mitigation of data corruption from back pattern and program disturb in a non-volatile memory device 有权
    缓解非易失性存储设备中的后台模式和程序干扰造成的数据损坏

    公开(公告)号：US08274833B2

    公开(公告)日：2012-09-25

    申请号：US13354453

    申请日：2012-01-20

    申请人： Vishal Sarin ,  Jung-Sheng Hoei ,  Frankie F. Roohparvar

    发明人： Vishal Sarin ,  Jung-Sheng Hoei ,  Frankie F. Roohparvar

    IPC分类号： G11C16/04

    CPC分类号： G11C16/3418

    摘要： A write algorithm is used to remove errors due to back pattern effects, cell-to-cell capacitive coupling, and program disturb in memory cells. Original data to be programmed is adjusted prior to an initial programming operation of the memory cells. The original data is then programmed into the memory cells in another programming operation. A read adjustment weight data value is associated with each series string of memory cells. The weight data value is used to compensate data read during an initial word line read. The weight data value is updated after each read and read adjustment such that the adjusted weight data value is used on the subsequent read operations.

    摘要翻译： 使用写入算法来消除由于存储器单元中的反向图案效应，单元到单元电容耦合以及程序干扰引起的错误。 要编程的原始数据在存储器单元的初始编程操作之前被调整。 然后在另一个编程操作中将原始数据编程到存储器单元中。 读取调整权重数据值与存储器单元的每个串联串相关联。 权重数据值用于补偿在初始字线读取期间读取的数据。 在每次读取和读取调整之后更新权重数据值，使得在随后的读取操作中使用经调整的权重数据值。

    REDUCING NOISE IN SEMICONDUCTOR DEVICES
    7.
    发明申请
    REDUCING NOISE IN SEMICONDUCTOR DEVICES 有权
    减少半导体器件中的噪声

    公开(公告)号：US20120069675A1

    公开(公告)日：2012-03-22

    申请号：US13308976

    申请日：2011-12-01

    申请人： Vishal Sarin ,  Frankie F. Roohparvar ,  Jung Sheng Hoei

    发明人： Vishal Sarin ,  Frankie F. Roohparvar ,  Jung Sheng Hoei

    IPC分类号： G11C16/26 ,  G11C16/04

    CPC分类号： G11C16/26 ,  G11C11/5642 ,  G11C16/3418

    摘要： The present disclosure includes methods, devices, modules, and systems for reducing noise in semiconductor devices. One method embodiment includes applying a reset voltage to a control gate of a semiconductor device for a period of time. The method further includes sensing the state of the semiconductor device after applying the reset voltage.

    摘要翻译： 本公开包括用于降低半导体器件中的噪声的方法，装置，模块和系统。 一个方法实施例包括将复位电压施加到半导体器件的控制栅极一段时间。 该方法还包括在施加复位电压之后感测半导体器件的状态。

    M+N bit programming and M+L bit read for M bit memory cells
    8.
    发明授权
    M+N bit programming and M+L bit read for M bit memory cells 有权
    对M位存储单元进行M + N位编程和M + L位读取

    公开(公告)号：US08111550B2

    公开(公告)日：2012-02-07

    申请号：US13005291

    申请日：2011-01-12

    申请人： Vishal Sarin ,  Jung-Sheng Hoei ,  Frankie F. Roohparvar

    发明人： Vishal Sarin ,  Jung-Sheng Hoei ,  Frankie F. Roohparvar

    IPC分类号： G11C16/04

    CPC分类号： G11C16/0483 ,  G11C7/16 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/10 ,  G11C16/26 ,  G11C16/3418 ,  G11C16/3427 ,  G11C27/005 ,  G11C2211/5641

    摘要： A memory device and programming and/or reading process is described that programs and/or reads the cells in the memory array with higher threshold voltage resolution than required. In programming non-volatile memory cells, this allows a more accurate threshold voltage placement during programming and enables pre-compensation for program disturb, increasing the accuracy of any subsequent read or verify operation on the cell. In reading/sensing memory cells, the increased threshold voltage resolution allows more accurate interpretations of the programmed state of the memory cell and also enables more effective use of probabilistic data encoding techniques such as convolutional code, partial response maximum likelihood (PRML), low-density parity check (LDPC), Turbo, and Trellis modulation encoding and/or decoding, reducing the overall error rate of the memory.

    摘要翻译： 描述了存储器件和编程和/或读取过程，其以比所需的更高的阈值电压分辨率编程和/或读取存储器阵列中的单元。 在编程非易失性存储器单元中，这允许在编程期间更准确的阈值电压放置，并且能够对程序干扰进行预补偿，从而提高单元上随后的任何读取或验证操作的准确性。 在读/读存储器单元中，增加的阈值电压分辨率允许更准确地解释存储器单元的编程状态，并且还能够更有效地使用概率数据编码技术，例如卷积码，部分响应最大似然（PRML） 密度奇偶校验（LDPC），Turbo和网格调制编码和/或解码，降低了存储器的总体错误率。

    MITIGATION OF DATA CORRUPTION FROM BACK PATTERN AND PROGRAM DISTURB IN A NON-VOLATILE MEMORY DEVICE
    10.
    发明申请
    MITIGATION OF DATA CORRUPTION FROM BACK PATTERN AND PROGRAM DISTURB IN A NON-VOLATILE MEMORY DEVICE 有权
    在非易失性存储器件中缓解数据从后向模式和程序干扰的破坏

    公开(公告)号：US20110058413A1

    公开(公告)日：2011-03-10

    申请号：US12912027

    申请日：2010-10-26

    申请人： Vishal Sarin ,  Jung-Sheng Hoei ,  Frankie F. Roohparvar

    发明人： Vishal Sarin ,  Jung-Sheng Hoei ,  Frankie F. Roohparvar

    IPC分类号： G11C16/10 ,  G11C16/12 ,  G11C16/26

    CPC分类号： G11C16/3418

    摘要： In one of the disclosed embodiments, a write algorithm is used to remove errors due to back pattern effects, cell-to-cell capacitive coupling, and program disturb in memory cells. Original data to be programmed is adjusted prior to an initial programming operation of the memory cells. The original data is then programmed into the memory cells in another programming operation. In an alternate embodiment, a read adjustment weight data value is associated with each series string of memory cells. The weight data value is used to compensate data read during an initial word line read. The weight data value is updated after each read and read adjustment such that the adjusted weight data value is used on the subsequent read operations.

    摘要翻译： 在所公开的实施例之一中，使用写入算法来消除由于存储器单元中的反向图案效应，单元到单元电容耦合和程序干扰引起的错误。 要编程的原始数据在存储器单元的初始编程操作之前被调整。 然后在另一个编程操作中将原始数据编程到存储器单元中。 在替代实施例中，读取调整权重数据值与存储器单元的每个串联串相关联。 权重数据值用于补偿在初始字线读取期间读取的数据。 在每次读取和读取调整之后更新权重数据值，使得在随后的读取操作中使用经调整的权重数据值。