摘要:
Particularly in high current applications, impact ionization induced electron-hole pairs are generated in the drain of an MOS transistor that can cause a parasitic bipolar transistor to become destructively conductive. The holes pass through the body region of the MOS transistor, which has intrinsic resistance, to the source, which is typically held at a relatively low voltage, such as ground. The hole current causes a voltage to develop in the body region, which acts as the base. This increased base voltage is what can cause the parasitic bipolar transistor to become conductive. The likelihood of this is greatly reduced by developing a voltage between the source, which acts as the emitter, and the body region by passing the channel current through an impedance between the source and the body region. This causes the emitter voltage to increase as the base voltage is increased and thereby prevent the parasitic bipolar transistor from becoming conductive.
摘要:
A method of manufacturing a semiconductor component includes forming a first electrically insulating layer (120) and a second electrically insulating layer (130) over a semiconductor substrate (110). The method further includes etching a first trench (140) and a second trench (150) through the first and second electrically insulating layers and into the semiconductor substrate, and etching a third trench (610) through a bottom surface of the second trench and into the semiconductor substrate. The third trench has a first portion (920) and a second portion (930) interior to the first portion. The method still further includes forming a third electrically insulating layer (910) filling the first trench and the first portion of the third trench without filling the second portion of the third trench, and also includes forming a plug layer (1010) in the second portion of the third trench.
摘要:
A semiconductor component comprises a first semiconductor region (110, 310), a second semiconductor region (120, 320) above the first semiconductor region, a third semiconductor region (130, 330) above the second semiconductor region, a fourth semiconductor region (140, 340) above the third semiconductor region, a fifth semiconductor region (150, 350) above the second semiconductor region and at least partially contiguous with the fourth semiconductor region, a sixth semiconductor region (160, 360) above and electrically shorted to the fifth semiconductor region, and an electrically insulating layer (180, 380) above the fourth semiconductor region and the fifth semiconductor region. A junction (145, 345) between the fourth semiconductor region and the fifth semiconductor region forms a zener diode junction, which is located only underneath the electrically insulating layer. In one embodiment, a seventh semiconductor region (170) circumscribes the third, fourth, fifth, and sixth semiconductor regions.
摘要:
A semiconductor component includes a RESURF transistor (100, 200, 300, 400, 500) that includes a first semiconductor region (110, 210, 310, 410, 510) having a first conductivity type and an electrically-floating semiconductor region (115, 215, 315, 415, 515, 545) having a second conductivity type located above the first semiconductor region. The RESURF transistor further includes a second semiconductor region (120, 220, 320, 420, 520) having the first conductivity type located above the electrically-floating semiconductor region, a third semiconductor region (130, 230) having the first conductivity type located above the second semiconductor region, and a fourth semiconductor region (140, 240, 340, 440, 540) having the second conductivity type located above the second semiconductor region. In a particular embodiment, the fourth semiconductor region and the electrically-floating semiconductor region deplete the second semiconductor region when a reverse bias is applied between the third semiconductor region and the fourth semiconductor region.
摘要:
An embodiment of a method of redistributing power in a semiconductor component includes varying a saturation current between a drain terminal (330) and a source terminal (320) of a field effect transistor (FET) (200, 500). The FET is at least a portion of the semiconductor component. The threshold voltage of the FET is maintained substantially constant across the FET while the drain-to-source saturation current per unit area is varied across the FET. In one embodiment, the drain-to-source saturation current per unit area is varied such that it is lower at a center of the FET than at a periphery of the FET. In particular embodiments, the drain-to-source saturation current per unit area may be varied across the FET by changing one or more of the gate-to-source voltage, the channel length, the channel width, the gate oxide thickness, and the channel mobility across the FET.
摘要:
A semiconductor component includes a first semiconductor region (110, 210) having a first conductivity type and a second semiconductor region (120, 220) above the first semiconductor region and having a second conductivity type. The semiconductor component further comprises a third semiconductor region (130, 230) above the second semiconductor region and having the first conductivity type, a fourth semiconductor region (140, 240) above the third semiconductor region and having the second conductivity type, a fifth semiconductor region (150, 250) above the third semiconductor region and having the first conductivity type, a sixth semiconductor region (160, 260) substantially enclosed within the fifth semiconductor region and having the second conductivity type, and a seventh semiconductor region (170, 270) above the first semiconductor region and having the second conductivity type. The seventh semiconductor region is adjacent to the third and fourth semiconductor regions, and is separated from the fifth semiconductor region.
摘要:
A semiconductor component comprises a first semiconductor region (110, 310), a second semiconductor region (120, 320) above the first semiconductor region, a third semiconductor region (130, 330) above the second semiconductor region, a fourth semiconductor region (140, 340) above the third semiconductor region, a fifth semiconductor region (150, 350) above the second semiconductor region and at least partially contiguous with the fourth semiconductor region, a sixth semiconductor region (160, 360) above and electrically shorted to the fifth semiconductor region, and an electrically insulating layer (180, 380) above the fourth semiconductor region and the fifth semiconductor region. A junction (145, 345) between the fourth semiconductor region and the fifth semiconductor region forms a zener diode junction, which is located only underneath the electrically insulating layer. In one embodiment, a seventh semiconductor region (170) circumscribes the third, fourth, fifth, and sixth semiconductor regions.
摘要:
In one embodiment, semiconductor device 10 comprises a diode which uses isolation regions (34, 16, and 13) and a plurality of dopant concentrations (30, 20, 24, and 26) which may be used to limit the parasitic current that is injected into the semiconductor substrate (12). Various biases on the isolation regions (34, 16, and 13) may be used to affect the behavior of semiconductor device (10). In addition, a conductive layer (28) may be formed overlying the junction between anode (42) and cathode (40). This conductive layer (28) may decrease the electric field in selected regions in order to increase the maximum voltage that may be applied to cathode (40).
摘要:
A semiconductor component comprises a first semiconductor region (110, 310), a second semiconductor region (120, 320) above the first semiconductor region, a third semiconductor region (130, 330) above the second semiconductor region, a fourth semiconductor region (140, 340) above the third semiconductor region, a fifth semiconductor region (150, 350) above the second semiconductor region and at least partially contiguous with the fourth semiconductor region, a sixth semiconductor region (160, 360) above and electrically shorted to the fifth semiconductor region, and an electrically insulating layer (180, 380) above the fourth semiconductor region and the fifth semiconductor region. A junction (145, 345) between the fourth semiconductor region and the fifth semiconductor region forms a zener diode junction, which is located only underneath the electrically insulating layer. In one embodiment, a seventh semiconductor region (170) circumscribes the third, fourth, fifth, and sixth semiconductor regions.
摘要:
A conductive layer includes a first portion that forms a Schottky region with an underlying first region having a first conductivity type. A second region of a second conductivity type underlies the first region, where the second conductivity type is opposite the first conductivity type. A third region of the first conductivity type immediately underlies the second region and is electrically coupled to a cathode of the device.