公开(公告)号：US5851422A

公开(公告)日：1998-12-22

申请号：US797138

申请日：1997-02-10

申请人： Wataru Saito ,  Atsushi Baba ,  Tadafumi Shindo ,  Naoki Shimada ,  Hidetoshi Ozawa ,  Yoshinori Kinase ,  Tisato Kajiyama ,  Yasuhiro Imamura ,  Norihiro Kaiya ,  Yoshitaka Goto

发明人： Wataru Saito ,  Atsushi Baba ,  Tadafumi Shindo ,  Naoki Shimada ,  Hidetoshi Ozawa ,  Yoshinori Kinase ,  Tisato Kajiyama ,  Yasuhiro Imamura ,  Norihiro Kaiya ,  Yoshitaka Goto

IPC分类号： G02F1/1333 ,  C08F20/10 ,  C08F20/12 ,  C08F22/10 ,  C08L33/04 ,  C08L33/06 ,  C08L35/02 ,  C09K19/12 ,  C09K19/20 ,  C09K19/54 ,  C09K19/60 ,  G02F1/13 ,  C09K19/52

CPC分类号： C09K19/544

摘要： A record display medium is provided which can offer a high display contrast and is less likely to cause a lowering of contrast or disappearance of display even in low temperature and high temperature regions. A polymeric material for a liquid crystal/polymer composite film comprising a liquid crystal present in a polymer matrix, a liquid crystal/polymer composite film using the material, and use of the record display medium are also provided. The polymeric material for a liquid crystal/polymer composite film comprising a liquid crystal present in a polymer matrix has a glass transition temperature of 150.degree. C. or above and is insoluble in water.

摘要翻译： 提供了可以提供高显示对比度的记录显示介质，并且即使在低温和高温区域中也不太可能引起对比度降低或显示消失。 还提供了一种用于液晶/聚合物复合膜的聚合物材料，其包含存在于聚合物基质中的液晶，使用该材料的液晶/聚合物复合膜以及记录显示介质的使用。 含有存在于聚合物基质中的液晶的液晶/聚合物复合膜用聚合物材料的玻璃化转变温度为150℃以上，不溶于水。

公开(公告)号：US5932137A

公开(公告)日：1999-08-03

申请号：US647822

申请日：1996-05-15

申请人： Atsushi Baba ,  Wataru Saito ,  Isa Nishiyama ,  Atsushi Yoshizawa

发明人： Atsushi Baba ,  Wataru Saito ,  Isa Nishiyama ,  Atsushi Yoshizawa

IPC分类号： G02F1/1333 ,  C09K19/12 ,  C09K19/44 ,  C09K19/46 ,  C09K19/54 ,  G02F1/13 ,  C09K19/20

CPC分类号： C09K19/12 ,  C09K19/46 ,  C09K19/544 ,  Y10T428/1036

摘要： A recording display medium is provided which can offer a high display contrast and is less likely to cause a lowering of contrast or disappearance of display even in low temperature and high temperature regions. A smectic liquid crystal composition, for use in the recording display medium, and use of the recording display medium are also provided. The liquid crystal composition comprises: at least one member selected from the group constituting of compounds represented by the following general formula (I): ##STR1## wherein R.sup.1 represents an alkyl or alkoxy group having 8 to 18 carbon atoms; and at least one member selected from the group consisting of compounds represented by the following general formulae (II) to (VII): ##STR2## wherein R.sup.2, R.sup.4, R.sup.5, and R.sup.6 represent an alkyl group having 2 to 18 carbon atoms, R.sup.3, R.sup.7, R.sup.8, R.sup.9, and R.sup.10 represent an alkyl or alkoxy group having 2 to 18 carbon atoms, and X represents a halogen atom or an alkyl or alkoxy group having 2 to 18 carbon atoms.

摘要翻译： 提供了能够提供高显示对比度的记录显示介质，并且即使在低温和高温区域中也不太可能引起对比度降低或显示消失。 还提供了用于记录显示介质的近晶液晶组合物和记录显示介质的使用。 液晶组合物包含：选自由以下通式（I）表示的化合物组成的组中的至少一种：其中R1表示碳原子数为8〜18的烷基或烷氧基; 和选自由以下通式（II）至（VII）表示的化合物中的至少一种：其中R 2，R 4，R 5和R 6表示具有2至18个碳原子的烷基，R 3，R 7， R 8，R 9和R 10表示碳原子数2〜18的烷基或烷氧基，X表示卤素原子或碳原子数2〜18的烷基或烷氧基。

公开(公告)号：US08829608B2

公开(公告)日：2014-09-09

申请号：US13051987

申请日：2011-03-18

申请人： Wataru Saito ,  Syotaro Ono ,  Shunji Taniuchi ,  Miho Watanabe ,  Hiroaki Yamashita

发明人： Wataru Saito ,  Syotaro Ono ,  Shunji Taniuchi ,  Miho Watanabe ,  Hiroaki Yamashita

IPC分类号： H01L29/78

CPC分类号： H01L29/7813 ,  H01L29/0865 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/42372 ,  H01L29/66734

摘要： According to one embodiment, a semiconductor device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of the first conductivity type, a third semiconductor layer of a second conductivity type, a fourth semiconductor layer of the second conductivity type, a fifth semiconductor layer of the first conductivity type, a control electrode, a first main electrode, a second main electrode, and a sixth semiconductor layer of the first conductivity type. The second semiconductor layer and the third semiconductor layer are alternately provided on the first semiconductor layer in a direction substantially parallel to a major surface of the first semiconductor layer. The fourth semiconductor layer is provided on the second semiconductor layer and the third semiconductor layer. The fifth semiconductor layer is selectively provided on a surface of the fourth semiconductor layer. The control electrode is provided in a trench via an insulating film. The trench penetrates through the fourth semiconductor layer from a surface of the fifth semiconductor layer and is in contact with the second semiconductor layer. The first main electrode is connected to the first semiconductor layer. The second main electrode is connected to the fourth semiconductor layer and the fifth semiconductor layer. The sixth semiconductor layer is provided between the fourth semiconductor layer and the second semiconductor layer. An impurity concentration of the sixth semiconductor layer is higher than an impurity concentration of the second semiconductor layer.

摘要翻译： 根据一个实施例，半导体器件包括第一导电类型的第一半导体层，第一导电类型的第二半导体层，第二导电类型的第三半导体层，第二导电类型的第四半导体层， 第一导电类型的第五半导体层，第一导电类型的控制电极，第一主电极，第二主电极和第六半导体层。 第二半导体层和第三半导体层在与第一半导体层的主表面大致平行的方向上交替地设置在第一半导体层上。 第四半导体层设置在第二半导体层和第三半导体层上。 第五半导体层选择性地设置在第四半导体层的表面上。 控制电极通过绝缘膜设置在沟槽中。 沟槽从第五半导体层的表面穿过第四半导体层并且与第二半导体层接触。 第一主电极连接到第一半导体层。 第二主电极连接到第四半导体层和第五半导体层。 第六半导体层设置在第四半导体层和第二半导体层之间。 第六半导体层的杂质浓度高于第二半导体层的杂质浓度。

公开(公告)号：US08772869B2

公开(公告)日：2014-07-08

申请号：US12050405

申请日：2008-03-18

申请人： Wataru Saito ,  Syotaro Ono

发明人： Wataru Saito ,  Syotaro Ono

IPC分类号： H01L29/66

CPC分类号： H01L29/7802 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0634 ,  H01L29/0638 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/42368 ,  H01L29/7811

摘要： A power semiconductor device includes: a first semiconductor layer; second and third semiconductor layers above and alternatively arranged along a direction parallel to an upper surface of the first semiconductor layer; and plural fourth semiconductor layers provided on some of immediately upper regions of the third semiconductor layer. An array period of the fourth semiconductor layers is larger than that of the second semiconductor layer. A thickness of part of the gate insulating film in an immediate upper region of a central portion between the fourth semiconductor layers is thicker than a thickness of part of the gate insulating film in an immediate upper region of the fourth semiconductor layers. Sheet impurity concentrations of the second and third semiconductor layers in the central portion are higher than a sheet impurity concentration of the third semiconductor layer in an immediately lower region of the fourth semiconductor layers.

摘要翻译： 功率半导体器件包括：第一半导体层; 第二和第三半导体层，并且沿着平行于第一半导体层的上表面的方向排列; 以及多个第四半导体层，设置在第三半导体层的一些上部区域上。 第四半导体层的阵列周期大于第二半导体层的阵列周期。 在第四半导体层之间的中心部分的直接上部区域中的栅极绝缘膜的一部分的厚度比在第四半导体层的直接上部区域中的栅极绝缘膜的一部分的厚度厚。 第二半导体层和第三半导体层在中心部分的片状杂质浓度高于第四半导体层的紧邻下部区域中的第三半导体层的片状杂质浓度。

公开(公告)号：US08624265B2

公开(公告)日：2014-01-07

申请号：US13234943

申请日：2011-09-16

申请人： Wataru Saito

发明人： Wataru Saito

IPC分类号： H01L29/15 ,  H01L31/0312

CPC分类号： H01L29/808 ,  H01L29/0623 ,  H01L29/1075 ,  H01L29/1087 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/4175 ,  H01L29/7787

摘要： According to one embodiment, the semiconductor element includes a semi-insulating substrate which has a first first-conductivity-type layer. The semiconductor element includes a first semiconductor layer. The first semiconductor layer contains non-doped AlXGa1-XN (0≦X

摘要翻译： 根据一个实施例，半导体元件包括具有第一第一导电型层的半绝缘衬底。 半导体元件包括第一半导体层。 第一半导体层包含非掺杂的AlXGa1-XN（0 @ X <1）。 半导体元件包括第二半导体层。 第二半导体层包含非掺杂或第二导电型AlYGa1-YN（0

公开(公告)号：US08610210B2

公开(公告)日：2013-12-17

申请号：US12840201

申请日：2010-07-20

申请人： Hiroshi Ohta ,  Yasuto Sumi ,  Kiyoshi Kimura ,  Wataru Sekine ,  Wataru Saito ,  Syotaro Ono ,  Munehisa Yabuzaki ,  Nana Hatano ,  Miho Watanabe

发明人： Hiroshi Ohta ,  Yasuto Sumi ,  Kiyoshi Kimura ,  Wataru Sekine ,  Wataru Saito ,  Syotaro Ono ,  Munehisa Yabuzaki ,  Nana Hatano ,  Miho Watanabe

IPC分类号： H01L29/66

CPC分类号： H01L29/66712 ,  H01L29/0619 ,  H01L29/0634 ,  H01L29/0638 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/7811

摘要： According to one embodiment, a power semiconductor device includes a first semiconductor layer, and first, second and third semiconductor regions. The first semiconductor layer has a first conductivity type. The first semiconductor regions have a second conductivity type, and are formed with periodicity in a lateral direction in a second semiconductor layer of the first conductivity type. The second semiconductor layer is provided on a major surface of the first semiconductor layer in a device portion with a main current path formed in a vertical direction generally perpendicular to the major surface and in a terminal portion provided around the device portion. The second semiconductor region has the first conductivity type and is a portion of the second semiconductor layer sandwiched between adjacent ones of the first semiconductor regions. The third semiconductor regions have the second conductivity type and are provided below the first semiconductor regions in the terminal portion.

摘要翻译： 根据一个实施例，功率半导体器件包括第一半导体层以及第一，第二和第三半导体区域。 第一半导体层具有第一导电类型。 第一半导体区域具有第二导电类型，并且在第一导电类型的第二半导体层中在横向方向上形成周期性。 第二半导体层设置在器件部分的第一半导体层的主表面上，其主电流通道形成在大体上垂直于主表面的垂直方向上，以及设置在器件部分周围的端子部分中。 第二半导体区域具有第一导电类型，并且是夹在相邻的第一半导体区域中的第二半导体层的一部分。 第三半导体区域具有第二导电类型并且设置在端子部分中的第一半导体区域的下方。

公开(公告)号：US20120187452A1

公开(公告)日：2012-07-26

申请号：US13239229

申请日：2011-09-21

申请人： Wataru Saito ,  Hidetoshi Fujimoto

发明人： Wataru Saito ,  Hidetoshi Fujimoto

IPC分类号： H01L29/78 ,  H01L29/205

CPC分类号： H01L29/42316 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/4236 ,  H01L29/66462 ,  H01L29/7781

摘要： According to one embodiment, the semiconductor element includes a first semiconductor layer. The first semiconductor layer contains AlXGa1-XN. A top layer of the first semiconductor layer is terminated by nitrogen. The semiconductor element includes a second semiconductor layer containing non-doped or first conductivity-type AlYGa1-YN formed on the first semiconductor layer. The semiconductor element includes a third semiconductor layer containing AlZGa1-ZN formed on the second semiconductor layer. The semiconductor element includes a first major electrode connected to the third semiconductor layer. The semiconductor element includes a second major electrode connected to the third semiconductor layer. The semiconductor element includes a gate electrode provided on the third semiconductor layer between the first major electrode and the second major electrode.

摘要翻译： 根据一个实施例，半导体元件包括第一半导体层。 第一半导体层包含AlXGa1-XN。 第一半导体层的顶层由氮端接。 半导体元件包括形成在第一半导体层上的含有非掺杂或第一导电型AlYGa1-YN的第二半导体层。 半导体元件包括形成在第二半导体层上的含有AlZGa1-ZN的第三半导体层。 半导体元件包括连接到第三半导体层的第一主电极。 半导体元件包括连接到第三半导体层的第二主电极。 半导体元件包括设置在第一主电极和第二主电极之间的第三半导体层上的栅电极。

公开(公告)号：US08188521B2

公开(公告)日：2012-05-29

申请号：US12728823

申请日：2010-03-22

申请人： Wataru Saito ,  Syotaro Ono ,  Munehisa Yabuzaki ,  Nana Hatano ,  Miho Watanabe

发明人： Wataru Saito ,  Syotaro Ono ,  Munehisa Yabuzaki ,  Nana Hatano ,  Miho Watanabe

IPC分类号： H01L29/739 ,  H01L29/78 ,  H01L29/08

CPC分类号： H01L29/7802 ,  H01L29/0619 ,  H01L29/0626 ,  H01L29/0634 ,  H01L29/0657 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/7808 ,  H01L29/7811 ,  H01L29/7828

摘要： A power semiconductor device has semiconductor layers, including: first layer of first type; second and third layers respectively of first and second types alternately on the first layer; fourth layers of second type on the third layers; fifth layers of first type on the fourth layer; sixth and seventh layers respectively of second and first types alternately on the second and third layers; a first electrode connected to the first layer; an insulation film on fourth, sixth, and seventh layers; a second electrode on fourth, sixth, and seventh layers via the insulation film; and a third electrode joined to fourth and fifth layers, wherein the sixth layers are connected to the fourth layers and one of the third layers between two fourth layers, and an impurity concentration of the third layers below the sixth layers is higher than that of the third layers under the fourth layers.

摘要翻译： 功率半导体器件具有半导体层，包括：第一层第一层; 第一和第二类型的第二和第三层交替地在第一层上; 第三层第四层第四层; 第四层第五层第一层; 第二层和第三层的第六层和第七层交替地在第二层和第三层上; 连接到第一层的第一电极; 第四层，第六层和第七层的绝缘膜; 经由绝缘膜的第四，第六和第七层上的第二电极; 以及连接到第四和第五层的第三电极，其中第六层连接到第四层，第二层之间的第三层之间的第二层之间的第二层和第三层之间的第三层的杂质浓度高于第六层的第三层 第四层第三层。

公开(公告)号：US08058688B2

公开(公告)日：2011-11-15

申请号：US11864101

申请日：2007-09-28

申请人： Syotaro Ono ,  Wataru Saito

发明人： Syotaro Ono ,  Wataru Saito

IPC分类号： H01L31/119

CPC分类号： H01L29/7802 ,  H01L29/0634 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/66712

摘要： A semiconductor device includes: a semiconductor substrate; a first semiconductor layer of a first conductivity type provided on a major surface of the semiconductor substrate and having lower doping concentration than the semiconductor substrate; a plurality of first semiconductor column regions of the first conductivity type provided on the first semiconductor layer; a plurality of second semiconductor column regions of a second conductivity type provided on the first semiconductor layer, the second semiconductor column regions being adjacent to the first semiconductor column regions; a first semiconductor region; a second semiconductor region; a gate insulating film; a first main electrode; a second main electrode; and a control electrode. Doping concentrations in both the first and second semiconductor column region are low on the near side of the first semiconductor layer and high on the second main electrode side.

摘要翻译： 半导体器件包括：半导体衬底; 第一导电类型的第一半导体层设置在半导体衬底的主表面上并且具有比半导体衬底低的掺杂浓度; 设置在第一半导体层上的多个第一导电类型的第一半导体柱区域; 设置在所述第一半导体层上的第二导电类型的多个第二半导体柱区域，所述第二半导体柱区域与所述第一半导体柱区域相邻; 第一半导体区域; 第二半导体区域; 栅极绝缘膜; 第一主电极; 第二主电极; 和控制电极。 第一和第二半导体柱区域中的掺杂浓度在第一半导体层的近侧为低，在第二主电极侧为高。

公开(公告)号：US20110272708A1

公开(公告)日：2011-11-10

申请号：US13052881

申请日：2011-03-21

申请人： Akira Yoshioka ,  Wataru Saito ,  Yasunobu Saito ,  Hidetoshi Fujimoto ,  Tetsuya Ohno

发明人： Akira Yoshioka ,  Wataru Saito ,  Yasunobu Saito ,  Hidetoshi Fujimoto ,  Tetsuya Ohno

IPC分类号： H01L29/205 ,  H01L29/22

CPC分类号： H01L29/7783 ,  H01L21/28264 ,  H01L21/743 ,  H01L29/0847 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/7787 ,  H01L29/78

摘要： According to one embodiment, a nitride semiconductor device includes a first, a second and a third semiconductor layer, a first and a second main electrode and a control electrode. The first layer made of a nitride semiconductor of a first conductivity type is provided on a substrate. The second layer made of a nitride semiconductor of a second conductivity type is provided on the first layer. The third layer made of a nitride semiconductor is provided on the second layer. The first electrode is electrically connected with the second layer. The second electrode is provided at a distance from the first electrode and electrically connected with the second layer. The control electrode is provided within a first trench via an insulating film. The first trench is disposed between the first and the second main electrodes, penetrates the third and the second layers, and reaches the first layer.

摘要翻译： 根据一个实施例，氮化物半导体器件包括第一，第二和第三半导体层，第一和第二主电极和控制电极。 在基板上设置由第一导电类型的氮化物半导体制成的第一层。 由第二导电类型的氮化物半导体制成的第二层设置在第一层上。 在第二层上设置由氮化物半导体构成的第三层。 第一电极与第二层电连接。 第二电极设置在与第一电极相距一定距离处并与第二层电连接。 控制电极经由绝缘膜设置在第一沟槽内。 第一沟槽设置在第一和第二主电极之间，穿过第三层和第二层，并到达第一层。