Image device and methods of forming the same
    1.
    发明授权
    Image device and methods of forming the same 有权
    图像装置及其形成方法

    公开(公告)号:US09040341B2

    公开(公告)日:2015-05-26

    申请号:US13487840

    申请日:2012-06-04

    IPC分类号: H01L31/18 H01L27/146

    摘要: A method of forming of an image sensor device includes a patterned hardmask layer is formed over a substrate. The patterned hard mask layer has a plurality of first openings in a periphery region, and a plurality of second openings in a pixel region. A first patterned mask layer is formed over the pixel region to expose the periphery region. A plurality of first trenches is etched into the substrate in the periphery region. Each first trench, each first opening and each second opening are filled with a dielectric material. A second patterned mask layer is formed over the periphery region to expose the pixel region. The dielectric material in each second opening over the pixel region is removed. A plurality of dopants is implanted through each second opening to form various doped isolation features in the pixel region.

    摘要翻译: 形成图像传感器装置的方法包括在衬底上形成图案化的硬掩模层。 图案化的硬掩模层在周边区域中具有多个第一开口,在像素区域中具有多个第二开口。 在像素区域上形成第一图案化掩模层以暴露外围区域。 多个第一沟槽被蚀刻到周边区域中的衬底中。 每个第一沟槽,每个第一开口和每个第二开口都填充有电介质材料。 在外围区域上形成第二图案化掩模层以暴露像素区域。 在像素区域上的每个第二开口中的电介质材料被去除。 通过每个第二开口注入多个掺杂剂,以在像素区域中形成各种掺杂的隔离特征。

    IMAGE DEVICE AND METHODS OF FORMING THE SAME
    2.
    发明申请
    IMAGE DEVICE AND METHODS OF FORMING THE SAME 有权
    图像装置及其形成方法

    公开(公告)号:US20130323876A1

    公开(公告)日:2013-12-05

    申请号:US13487840

    申请日:2012-06-04

    IPC分类号: H01L31/18

    摘要: A method of forming of an image sensor device includes a patterned hardmask layer is formed over a substrate. The patterned hard mask layer has a plurality of first openings in a periphery region, and a plurality of second openings in a pixel region. A first patterned mask layer is formed over the pixel region to expose the periphery region. A plurality of first trenches is etched into the substrate in the periphery region. Each first trench, each first opening and each second opening are filled with a dielectric material. A second patterned mask layer is formed over the periphery region to expose the pixel region. The dielectric material in each second opening over the pixel region is removed. A plurality of dopants is implanted through each second opening to form various doped isolation features in the pixel region.

    摘要翻译: 形成图像传感器装置的方法包括在衬底上形成图案化的硬掩模层。 图案化的硬掩模层在周边区域中具有多个第一开口,在像素区域中具有多个第二开口。 在像素区域上形成第一图案化掩模层以暴露外围区域。 多个第一沟槽被蚀刻到周边区域中的衬底中。 每个第一沟槽,每个第一开口和每个第二开口都填充有电介质材料。 在外围区域上形成第二图案化掩模层以暴露像素区域。 在像素区域上的每个第二开口中的电介质材料被去除。 通过每个第二开口注入多个掺杂剂,以在像素区域中形成各种掺杂的隔离特征。

    Seamless Multi-Poly Structure and Methods of Making Same
    3.
    发明申请
    Seamless Multi-Poly Structure and Methods of Making Same 有权
    无缝多层结构及其制作方法

    公开(公告)号:US20130168794A1

    公开(公告)日:2013-07-04

    申请号:US13342148

    申请日:2012-01-02

    IPC分类号: H01L27/146 H01L31/18

    CPC分类号: H01L27/14614 H01L27/14689

    摘要: A sensor array is integrated onto the same chip as core logic. The sensor array uses a first polysilicon and the core logic uses a second polysilicon. The first polysilicon is etched to provide a tapered profile edge in the interface between the sensor array and the core logic regions to avoid an excessive step. Amorphous carbon can be deposited over the interface region without formation of voids, thus providing for improved manufacturing yield and reliability.

    摘要翻译: 传感器阵列集成到与核心逻辑相同的芯片上。 传感器阵列使用第一多晶硅,核心逻辑使用第二多晶硅。 蚀刻第一多晶硅以在传感器阵列和核心逻辑区域之间的接口中提供锥形轮廓边缘,以避免过度的步骤。 无定形碳可以在界面区域上沉积而不形成空隙,从而提供改善的制造成品率和可靠性。

    Seamless multi-poly structure and methods of making same
    4.
    发明授权
    Seamless multi-poly structure and methods of making same 有权
    无缝多聚结构及其制作方法

    公开(公告)号:US08587084B2

    公开(公告)日:2013-11-19

    申请号:US13342148

    申请日:2012-01-02

    IPC分类号: H01L21/70 H01L21/76

    CPC分类号: H01L27/14614 H01L27/14689

    摘要: A sensor array is integrated onto the same chip as core logic. The sensor array uses a first polysilicon and the core logic uses a second polysilicon. The first polysilicon is etched to provide a tapered profile edge in the interface between the sensor array and the core logic regions to avoid an excessive step. Amorphous carbon can be deposited over the interface region without formation of voids, thus providing for improved manufacturing yield and reliability.

    摘要翻译: 传感器阵列集成到与核心逻辑相同的芯片上。 传感器阵列使用第一多晶硅,核心逻辑使用第二多晶硅。 蚀刻第一多晶硅以在传感器阵列和核心逻辑区域之间的接口中提供锥形轮廓边缘,以避免过度的步骤。 无定形碳可以在界面区域上沉积而不形成空隙,从而提供改善的制造成品率和可靠性。

    Method of forming planarized coatings on contact hole patterns of various duty ratios
    5.
    再颁专利
    Method of forming planarized coatings on contact hole patterns of various duty ratios 有权
    在各种占空比的接触孔图案上形成平面化涂层的方法

    公开(公告)号:USRE41697E1

    公开(公告)日:2010-09-14

    申请号:US11235648

    申请日:2005-09-26

    IPC分类号: H01L21/4763

    摘要: A method of forming a planarized photoresist coating on a substrate having holes with different duty ratios is described. A first photoresist preferably comprised of a Novolac resin and a diazonaphthoquinone photoactive compound is coated on a substrate and baked at or slightly above its Tg so that it reflows and fills the holes. The photoresist is exposed without a mask at a dose that allows the developer to thin the photoresist to a recessed depth within the holes. After the photoresist is hardened with a 250° C. bake, a second photoresist is coated on the substrate to form a planarized film with a thickness variation of less than 50 Angstroms between low and high duty ratio hole regions. One application is where the second photoresist is used to form a trench pattern in a via first dual damascene method. Secondly, the method is useful in fabricating MIM capacitors.

    摘要翻译: 描述了在具有不同占空比的孔的基板上形成平坦化光致抗蚀剂涂层的方法。 优选将包含酚醛清漆树脂和重氮萘醌光敏化合物的第一光致抗蚀剂涂覆在基材上并在其Tg以上或略高于其Tg的温度下使其回流并填充孔。 以允许显影剂将光致抗蚀剂减薄到孔内的凹陷深度的剂量,光刻胶不用掩模曝光。 在250℃烘烤后光致抗蚀剂硬化后,在基板上涂覆第二光致抗蚀剂,以形成厚度变化小于50埃的低和高占空比孔区域的平坦化膜。 一种应用是第二光致抗蚀剂用于以通孔第一双镶嵌方法形成沟槽图案。 其次,该方法在制造MIM电容器方面是有用的。

    Method of forming planarized coatings on contact hole patterns of various duty ratios
    6.
    发明授权
    Method of forming planarized coatings on contact hole patterns of various duty ratios 有权
    在各种占空比的接触孔图案上形成平面化涂层的方法

    公开(公告)号:US06645851B1

    公开(公告)日:2003-11-11

    申请号:US10245429

    申请日:2002-09-17

    IPC分类号: H01L214763

    摘要: A method of forming a planarized photoresist coating on a substrate having holes with different duty ratios is described. A first photoresist preferably comprised of a Novolac resin and a diazonaphthoquinone photoactive compound is coated on a substrate and baked at or slightly above its Tg so that it reflows and fills the holes. The photoresist is exposed without a mask at a dose that allows the developer to thin the photoresist to a recessed depth within the holes. After the photoresist is hardened with a 250° C. bake, a second photoresist is coated on the substrate to form a planarized film with a thickness variation of less than 50 Angstroms between low and high duty ratio hole regions. One application is where the second photoresist is used to form a trench pattern in a via first dual damascene method. Secondly, the method is useful in fabricating MIM capacitors.

    摘要翻译: 描述了在具有不同占空比的孔的基板上形成平坦化光致抗蚀剂涂层的方法。 优选将包含酚醛清漆树脂和重氮萘醌光敏化合物的第一光致抗蚀剂涂覆在基材上并在其Tg以上或略高于其Tg的温度下使其回流并填充孔。 以允许显影剂将光致抗蚀剂减薄到孔内的凹陷深度的剂量,光刻胶不用掩模曝光。 在250℃烘烤后光致抗蚀剂硬化后,在基板上涂覆第二光致抗蚀剂,以形成厚度变化小于50埃的低和高占空比孔区域的平坦化膜。 一种应用是第二光致抗蚀剂用于以通孔第一双镶嵌方法形成沟槽图案。 其次,该方法在制造MIM电容器方面是有用的。

    Lens structures suitable for use in image sensors and method for making the same
    7.
    发明授权
    Lens structures suitable for use in image sensors and method for making the same 有权
    适用于图像传感器的镜头结构及其制作方法

    公开(公告)号:US07443005B2

    公开(公告)日:2008-10-28

    申请号:US10982978

    申请日:2004-11-05

    IPC分类号: H01L29/78

    摘要: An image sensor includes a double-microlens structure with an outer microlens aligned over an inner microlens, both microlenses aligned over a corresponding photosensor. The inner or outer microlens may be formed by a silylation process in which a reactive portion of a photoresist material reacts with a silicon-containing agent. The inner or outer microlens may be formed by step etching of a dielectric material, the step etching process including a series of alternating etch steps including an anisotropic etching step and an etching step that causes patterned photoresist to laterally recede. Subsequent isotropic etching processes may be used to smooth the etched step structure and form a smooth lens. A thermally stable and photosensitive polymeric/organic material may also be used to form permanent inner or outer lenses. The photosensitive material is coated then patterned using photolithography, reflowed, then cured to form a permanent lens structure.

    摘要翻译: 图像传感器包括双微透镜结构,其外部微透镜在内部微透镜上对准,两个微透镜在相应的光电传感器上对准。 内部或外部微透镜可以通过甲硅烷基化方法形成,其中光致抗蚀剂材料的反应性部分与含硅试剂反应。 内部或外部微透镜可以通过介电材料的步骤蚀刻形成,该步骤蚀刻工艺包括一系列交替蚀刻步骤,其包括各向异性蚀刻步骤和使图案化光致抗蚀剂横向后退的蚀刻步骤。 可以使用随后的各向同性蚀刻工艺来平滑蚀刻的台阶结构并形成光滑的透镜。 热稳定和感光的聚合物/有机材料也可用于形成永久的内镜片或外镜片。 感光材料被涂覆,然后使用光刻图案化,回流,然后固化以形成永久性透镜结构。

    Methods to improve photonic performances of photo-sensitive integrated circuits
    8.
    发明授权
    Methods to improve photonic performances of photo-sensitive integrated circuits 有权
    提高光敏集成电路光子性能的方法

    公开(公告)号:US07189957B2

    公开(公告)日:2007-03-13

    申请号:US10906604

    申请日:2005-02-25

    IPC分类号: H01L31/00 H01L21/00

    摘要: Described is a light-directing feature formed in the inter-level dielectric (ILD) layer in combination with an anti-reflective (AR) layer to effectively and simultaneously increase quantum efficiency and cross-talk immunity thereby improving photonic performances of photo-sensitive integrated circuits. A plurality of photosensor cells is formed on a semiconductor substrate. An AR layer is subsequently formed on the plurality of photosensor cells, the AR layer being substantially non-reflective of incident light. An ILD layer is then formed over the AR layer, the ILD layer comprising a plurality of light-directing features formed in openings in the ILD layer over the AR layer above and about certain of the plurality of photosensor cells.

    摘要翻译: 描述了在层间电介质(ILD)层中形成的与抗反射(AR)层组合的光导特征,以有效并同时地提高量子效率和串扰抗扰度,从而改善光敏集成的光子性能 电路。 多个光电传感器单元形成在半导体基板上。 随后在多个光电传感器单元上​​形成AR层,AR层基本上不反射入射光。 然后在AR层上形成ILD层,ILD层包括多个导光特征,其形成在ILD层中的多个光敏元件上方和周围的AR层上的开口中。

    Methods to Improve Photonic Performances of Photo-Sensitive Integrated Circuits
    10.
    发明申请
    Methods to Improve Photonic Performances of Photo-Sensitive Integrated Circuits 有权
    提高光敏集成电路光子性能的方法

    公开(公告)号:US20060192083A1

    公开(公告)日:2006-08-31

    申请号:US10906604

    申请日:2005-02-25

    IPC分类号: H01L27/00 H01L31/00

    摘要: Described is a light-directing feature formed in the inter-level dielectric (ILD) layer in combination with an anti-reflective (AR) layer to effectively and simultaneously increase quantum efficiency and cross-talk immunity thereby improving photonic performances of photo-sensitive integrated circuits. A plurality of photosensor cells is formed on a semiconductor substrate. An AR layer is subsequently formed on the plurality of photosensor cells, the AR layer being substantially non-reflective of incident light. An ILD layer is then formed over the AR layer, the ILD layer comprising a plurality of light-directing features formed in openings in the ILD layer over the AR layer above and about certain of the plurality of photosensor cells.

    摘要翻译: 描述了在层间电介质(ILD)层中形成的与抗反射(AR)层组合的光导特征,以有效并同时地提高量子效率和串扰抗扰度,从而改善光敏集成的光子性能 电路。 多个光电传感器单元形成在半导体基板上。 随后在多个光电传感器单元上​​形成AR层,AR层基本上不反射入射光。 然后在AR层上形成ILD层,ILD层包括多个导光特征,其形成在ILD层中的多个光敏元件上方和周围的AR层上的开口中。