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1.
公开(公告)号:US07800109B2
公开(公告)日:2010-09-21
申请号:US10907956
申请日:2005-04-22
申请人: Wen-Kuang Tsao , Hung-I Hsu , Hsiang-Hsien Chung , Min-Huang Chen
发明人: Wen-Kuang Tsao , Hung-I Hsu , Hsiang-Hsien Chung , Min-Huang Chen
IPC分类号: H01L29/76
CPC分类号: H01L29/4908
摘要: A thin film transistor including a gate, a gate insulating layer, a semiconductor layer, a source electrode and a drain electrode is provided. The gate is disposed over a substrate, wherein the gate comprises at least one layer of aluminum-yttrium alloy nitride. The gate insulating layer is formed over the substrate to cover the gate. The semiconductor layer is disposed over the gate insulating layer above the gate. The source electrode and the drain electrode are disposed over the semiconductor layer.
摘要翻译: 提供了包括栅极,栅极绝缘层,半导体层,源极和漏极的薄膜晶体管。 栅极设置在衬底上,其中栅极包括至少一层铝 - 钇合金氮化物。 栅极绝缘层形成在衬底上以覆盖栅极。 半导体层设置在栅极上方的栅绝缘层上。 源电极和漏极设置在半导体层上。
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公开(公告)号:US20060237724A1
公开(公告)日:2006-10-26
申请号:US10907956
申请日:2005-04-22
申请人: Wen-Kuang Tsao , Hung-I Hsu , Hsiang-Hsien Chung , Min-Huang Chen
发明人: Wen-Kuang Tsao , Hung-I Hsu , Hsiang-Hsien Chung , Min-Huang Chen
IPC分类号: H01L29/76
CPC分类号: H01L29/4908
摘要: A thin film transistor including a gate, a gate insulating layer, a semiconductor layer and a soruce/drain is provided. The gate is disposed over a substrate, wherein the gate comprises at least one layer of aluminum-yttrium alloy nitride. The gate insulating layer is formed over the substrate to cover the gate. The semiconductor layer is disposed over the gate insulating layer above the gate. The source/drain is disposed over the semiconductor layer.
摘要翻译: 提供了包括栅极,栅极绝缘层,半导体层和引出/漏极的薄膜晶体管。 栅极设置在衬底上,其中栅极包括至少一层铝 - 钇合金氮化物。 栅极绝缘层形成在衬底上以覆盖栅极。 半导体层设置在栅极上方的栅绝缘层上。 源极/漏极设置在半导体层上。
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3.
公开(公告)号:US20080121521A1
公开(公告)日:2008-05-29
申请号:US11504075
申请日:2006-08-15
申请人: Hsiang-Hsien Chung , Wen-Kuang Tsao , Hung-Yi Hsu , Chien-Yu Chen
发明人: Hsiang-Hsien Chung , Wen-Kuang Tsao , Hung-Yi Hsu , Chien-Yu Chen
IPC分类号: C23C14/00
CPC分类号: C23C14/3407 , C23C14/54 , H01J37/3426 , H01J37/3491
摘要: A plasma sputtering target assembly and a method therefor are provided. The sputtering target assembly includes a target, a bonding layer having a plurality of particles and having a first side bonded with the target and second side, and a backplate bonded with the second side of the bonding layer. The particles are being provided when the backplate is heated. Alternatively, a plurality of protrusions is formed on the backplate and the bonding layer is larger than or equal to the protrusions in altitude. Since the bonding layer has a composition and sputter yield of the part different from that of the target, in sputtering, the bonding layer is made exposed to plasma and thus an exceptional discharging phenomenon is caused when the target is struck through. By detecting the phenomenon, whether the target is almost over-sputtered may be forecasted and the backplate may be prevented from being struck through.
摘要翻译: 提供等离子体溅射靶组件及其方法。 溅射靶组件包括靶,具有多个颗粒并具有与靶和第二侧接合的第一侧的接合层和与接合层的第二侧接合的背板。 当背板被加热时,颗粒被提供。 或者,在背板上形成多个突起,并且接合层大于或等于高度的突起。 由于接合层具有与靶不同的部分的组成和溅射产率,因此在溅射中,使接合层暴露于等离子体,因此当靶被穿过时会引起特殊的放电现象。 通过检测该现象,可以预测目标是否几乎过度喷溅,并且可以防止背板被击穿。
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公开(公告)号:US20080061327A1
公开(公告)日:2008-03-13
申请号:US11979667
申请日:2007-11-07
申请人: Ching-Yeh Kuo , Tsung-Chi Cheng , Yu-Chou Lee , Yea-Chung Shih , Wen-Kuang Tsao , Hsiang-Hsien Chung , Hung-Yi Hsu , Jui-Chung Chang
发明人: Ching-Yeh Kuo , Tsung-Chi Cheng , Yu-Chou Lee , Yea-Chung Shih , Wen-Kuang Tsao , Hsiang-Hsien Chung , Hung-Yi Hsu , Jui-Chung Chang
IPC分类号: H01L29/94
CPC分类号: H01L29/66742 , H01L29/458 , H01L29/4908 , H01L29/786
摘要: A semiconductor device and its manufacturing method are disclosed. The nitrogen flow is gradually changed to form a semiconductor device with a gate or a source/drain having a nitrified gradient layer structure. Different extents of nitrification inside the nitrified gradient layer structure provide protection and buffering to prevent the undercut after etching due to different materials in the multilayer structure or the interface effect.
摘要翻译: 公开了一种半导体器件及其制造方法。 氮气流逐渐变化以形成具有硝化梯度层结构的栅极或源极/漏极的半导体器件。 硝化梯度层结构内的不同硝化程度提供保护和缓冲,以防止由于多层结构中的不同材料或界面效应而导致的蚀刻后的底切。
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公开(公告)号:US20060197089A1
公开(公告)日:2006-09-07
申请号:US11070216
申请日:2005-03-03
申请人: Ching-Yeh Kuo , Tsung-Chi Cheng , Yu-Chou Lee , Yea-Chung Shih , Wen-Kuang Tsao , Hsiang-Hsien Chung , Hung-Yi Hsu , Jui-Chung Chang
发明人: Ching-Yeh Kuo , Tsung-Chi Cheng , Yu-Chou Lee , Yea-Chung Shih , Wen-Kuang Tsao , Hsiang-Hsien Chung , Hung-Yi Hsu , Jui-Chung Chang
IPC分类号: H01L29/786 , H01L21/84
CPC分类号: H01L29/66742 , H01L29/458 , H01L29/4908 , H01L29/786
摘要: A semiconductor device and its manufacturing method are disclosed. The nitrogen flow is gradually changed to form a semiconductor device with a gate or a source/drain having a nitrified gradient layer structure. Different extents of nitrification inside the nitrified gradient layer structure provide protection and buffering to prevent the undercut after etching due to different materials in the multilayer structure or the interface effect.
摘要翻译: 公开了一种半导体器件及其制造方法。 氮气流逐渐变化以形成具有硝化梯度层结构的栅极或源极/漏极的半导体器件。 硝化梯度层结构内的不同硝化程度提供保护和缓冲,以防止由于多层结构中的不同材料或界面效应而导致的蚀刻后的底切。
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公开(公告)号:US07855383B2
公开(公告)日:2010-12-21
申请号:US11979667
申请日:2007-11-07
申请人: Ching-Yeh Kuo , Tsung-Chi Cheng , Yu-Chou Lee , Yea-Chung Shih , Wen-Kuang Tsao , Hsiang-Hsien Chung , Hung-Yi Hsu , Jui-Chung Chang
发明人: Ching-Yeh Kuo , Tsung-Chi Cheng , Yu-Chou Lee , Yea-Chung Shih , Wen-Kuang Tsao , Hsiang-Hsien Chung , Hung-Yi Hsu , Jui-Chung Chang
IPC分类号: H01L29/786
CPC分类号: H01L29/66742 , H01L29/458 , H01L29/4908 , H01L29/786
摘要: A semiconductor device and its manufacturing method are disclosed. The nitrogen flow is gradually changed to form a semiconductor device with a gate or a source/drain having a nitrified gradient layer structure. Different extents of nitrification inside the nitrified gradient layer structure provide protection and buffering to prevent the undercut after etching due to different materials in the multilayer structure or the interface effect.
摘要翻译: 公开了一种半导体器件及其制造方法。 氮气流逐渐变化以形成具有硝化梯度层结构的栅极或源极/漏极的半导体器件。 硝化梯度层结构内的不同硝化程度提供保护和缓冲,以防止由于多层结构中的不同材料或界面效应而导致的蚀刻后的底切。
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公开(公告)号:US20070007522A1
公开(公告)日:2007-01-11
申请号:US11160660
申请日:2005-07-05
申请人: Wen-Kuang Tsao , Hung-I Hsu
发明人: Wen-Kuang Tsao , Hung-I Hsu
IPC分类号: H01L31/00
CPC分类号: H01L29/4908 , H01L29/458
摘要: A thin film transistor including a gate, a gate insulating layer, a semiconductor layer and a source/drain is provided. The gate is disposed over a substrate, wherein the gate comprises at least one molybdenum-niobium alloy nitride layer. The gate insulating layer is formed over the substrate to cover the gate. The semiconductor layer is disposed over the gate insulating layer above the gate. The source/drain is disposed over the semiconductor layer.
摘要翻译: 提供了包括栅极,栅极绝缘层,半导体层和源极/漏极的薄膜晶体管。 栅极设置在衬底上,其中栅极包括至少一个钼 - 铌合金氮化物层。 栅极绝缘层形成在衬底上以覆盖栅极。 半导体层设置在栅极上方的栅绝缘层上。 源极/漏极设置在半导体层上。
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公开(公告)号:US07408190B2
公开(公告)日:2008-08-05
申请号:US11160660
申请日:2005-07-05
申请人: Wen-Kuang Tsao , Hung-I Hsu
发明人: Wen-Kuang Tsao , Hung-I Hsu
IPC分类号: H01L29/04 , H01L29/10 , H01L31/20 , H01L31/036 , H01L31/0376
CPC分类号: H01L29/4908 , H01L29/458
摘要: A thin film transistor including a gate, a gate insulating layer, a semiconductor layer and a source/drain is provided. The gate is disposed over a substrate, wherein the gate comprises at least one molybdenum-niobium alloy nitride layer. The gate insulating layer is formed over the substrate to cover the gate. The semiconductor layer is disposed over the gate insulating layer above the gate. The source/drain is disposed over the semiconductor layer.
摘要翻译: 提供了包括栅极,栅极绝缘层,半导体层和源极/漏极的薄膜晶体管。 栅极设置在衬底上,其中栅极包括至少一个钼 - 铌合金氮化物层。 栅极绝缘层形成在衬底上以覆盖栅极。 半导体层设置在栅极上方的栅绝缘层上。 源极/漏极设置在半导体层上。
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公开(公告)号:US07807519B2
公开(公告)日:2010-10-05
申请号:US12146439
申请日:2008-06-25
申请人: Wen-Kuang Tsao , Hung-I Hsu
发明人: Wen-Kuang Tsao , Hung-I Hsu
IPC分类号: H01L21/336
CPC分类号: H01L29/4908 , H01L29/458
摘要: A thin film transistor including a gate, a gate insulating layer, a semiconductor layer and a source/drain is provided. The gate is disposed over a substrate and includes at least one molybdenum-niobium alloy nitride layer. The gate insulating layer is formed over the substrate to cover the gate. The semiconductor layer is disposed over the gate insulating layer above the gate. The source/drain is disposed over the semiconductor layer.
摘要翻译: 提供了包括栅极,栅极绝缘层,半导体层和源极/漏极的薄膜晶体管。 栅极设置在衬底上并且包括至少一个钼 - 铌合金氮化物层。 栅极绝缘层形成在衬底上以覆盖栅极。 半导体层设置在栅极上方的栅绝缘层上。 源极/漏极设置在半导体层上。
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公开(公告)号:US20080261356A1
公开(公告)日:2008-10-23
申请号:US12146439
申请日:2008-06-25
申请人: Wen-Kuang Tsao , Hung-I Hsu
发明人: Wen-Kuang Tsao , Hung-I Hsu
IPC分类号: H01L21/336
CPC分类号: H01L29/4908 , H01L29/458
摘要: A thin film transistor including a gate, a gate insulating layer, a semiconductor layer and a source/drain is provided. The gate is disposed over a substrate and includes at least one molybdenum-niobium alloy nitride layer. The gate insulating layer is formed over the substrate to cover the gate. The semiconductor layer is disposed over the gate insulating layer above the gate. The source/drain is disposed over the semiconductor layer.
摘要翻译: 提供了包括栅极,栅极绝缘层,半导体层和源极/漏极的薄膜晶体管。 栅极设置在衬底上并且包括至少一个钼 - 铌合金氮化物层。 栅极绝缘层形成在衬底上以覆盖栅极。 半导体层设置在栅极上方的栅绝缘层上。 源极/漏极设置在半导体层上。
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