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    [THIN FILM TRANSISTOR AND FABRICATING METHOD THEREOF]
    4.
    发明申请
    [THIN FILM TRANSISTOR AND FABRICATING METHOD THEREOF] 有权
    [薄膜晶体管及其制造方法]

    公开(公告)号：US20050006645A1

    公开(公告)日：2005-01-13

    申请号：US10605403

    申请日：2003-09-29

    申请人： Yu-Chou Lee ,  Wen-Kuang Tsao

    发明人： Yu-Chou Lee ,  Wen-Kuang Tsao

    IPC分类号： H01L21/336 ,  H01L29/49 ,  H01L29/786 ,  H01L29/04 ,  H01L31/036

    CPC分类号： H01L29/66765 ,  H01L29/4908 ,  H01L29/78669

    摘要： A method for fabricating a thin film transistor (TFT) is described. A MoNb gate is formed on a substrate, and an insulating layer is formed on the substrate covering the gate. A channel layer is formed on the insulating layer above the gate, and a source/drain is formed on the channel layer to constitute a TFT. Since the gate is constituted of a MoNb layer, the contact resistance thereof can be reduced.

    摘要翻译： 对薄膜晶体管（TFT）的制造方法进行说明。 在基板上形成MoNb栅极，在覆盖栅极的基板上形成绝缘层。 在栅极上方的绝缘层上形成沟道层，在沟道层上形成源极/漏极，构成TFT。 由于栅极由MoNb层构成，所以可以降低其接触电阻。

    Thin film transistor and fabricating method thereof
    5.
    发明授权
    Thin film transistor and fabricating method thereof 有权
    薄膜晶体管及其制造方法

    公开(公告)号：US06921698B2

    公开(公告)日：2005-07-26

    申请号：US10605403

    申请日：2003-09-29

    申请人： Yu-Chou Lee ,  Wen-Kuang Tsao

    发明人： Yu-Chou Lee ,  Wen-Kuang Tsao

    IPC分类号： H01L21/336 ,  H01L29/49 ,  H01L29/786 ,  H01L29/76

    CPC分类号： H01L29/66765 ,  H01L29/4908 ,  H01L29/78669

    摘要： A method for fabricating a thin film transistor (TFT) is described. A MoNb gate is formed on a substrate, and an insulating layer is formed on the substrate covering the gate. A channel layer is formed on the insulating layer above the gate, and a source/drain is formed on the channel layer to constitute a TFT. Since the gate is constituted of a MoNb layer, the contact resistance thereof can be reduced.

    摘要翻译： 对薄膜晶体管（TFT）的制造方法进行说明。 在基板上形成MoNb栅极，在覆盖栅极的基板上形成绝缘层。 在栅极上方的绝缘层上形成沟道层，在沟道层上形成源极/漏极，构成TFT。 由于栅极由MoNb层构成，所以可以降低其接触电阻。

    MAGNETRON SPUTTERING PROCESS
    6.
    发明申请
    MAGNETRON SPUTTERING PROCESS 审中-公开
    MAGNETRON喷溅工艺

    公开(公告)号：US20060144696A1

    公开(公告)日：2006-07-06

    申请号：US10908304

    申请日：2005-05-06

    申请人： Yu-Chou Lee ,  Hsiang-Hsien Chung ,  Hung-I Hsu

    发明人： Yu-Chou Lee ,  Hsiang-Hsien Chung ,  Hung-I Hsu

    IPC分类号： C23C14/32 ,  C23C14/00

    CPC分类号： C23C14/35

    摘要： A magnetron sputtering process is provided. First, a reaction chamber including a substrate base, a target comprised of Al or its alloy or other metals or their alloy with higher melting point, and a magnetron device. Next, a substrate is disposed onto the substrate base. The pressure within the reaction chamber is set from 0.1 pa˜0.35 pa, and then a sputtering process is initiated within the reaction chamber to deposit a film on the substrate. Because the pressure within the reaction chamber is set from 0.1 pa˜0.35 pa, a better step coverage can be achieved during the sputtering process so that a continuous film can be deposited on the substrate without the broken or defective climbing portion of the film. Therefore, the yield of film deposition on the substrate can also be significantly increased.

    摘要翻译： 提供磁控溅射工艺。 首先，包括基材，包含Al或其合金或其它金属的靶或其熔点较高的合金的反应室和磁控管装置。 接下来，将基板设置在基板基板上。 反应室内的压力设定为0.1Pa〜0.35Pa，然后在反应室内引发溅射工艺，以在衬底上沉积膜。 因为反应室内的压力设定在0.1Pa〜0.35Pa，所以在溅射过程中可以实现更好的阶梯覆盖，使得连续的膜可以沉积在衬底上而没有膜的破损或有缺陷的攀登部分。 因此，也可以显着提高基板上的成膜率。

    Thin film transistor structure and manufacturing method thereof
    7.
    发明授权
    Thin film transistor structure and manufacturing method thereof 有权
    薄膜晶体管结构及其制造方法

    公开(公告)号：US07501652B2

    公开(公告)日：2009-03-10

    申请号：US10611896

    申请日：2003-07-03

    申请人： Yu-Chou Lee ,  Tsung-Chi Cheng

    发明人： Yu-Chou Lee ,  Tsung-Chi Cheng

    IPC分类号： H01L29/04 ,  H01L31/036 ,  H01L31/0376 ,  H01L31/20

    CPC分类号： H01L29/66765 ,  H01L29/458 ,  H01L29/4908

    摘要： A thin film transistor source/drain structure and the manufacturing method thereof are disclosed. The thin film transistor source/drain structure uses a sandwich structure to reduce the resistivity of the source/drain and upgrade the reliability. The sandwich structure preferably comprises a structure of AlNdN alloy/AlNd alloy/AlNdN alloy. The AlNdN alloy is used as a buffer layer or a diffusion barrier to prevent the AlNd alloy and an amorphous silicon layer from diffusing into each other. The other AlNdN alloy is used as a glue layer and to protect the AlNd alloy from being over-etched. The other AlNdN alloy can also prevent the AlNd alloy and the following formed ITO from contact and interaction.

    摘要翻译： 公开了薄膜晶体管源极/漏极结构及其制造方法。 薄膜晶体管源极/漏极结构使用夹层结构来降低源极/漏极的电阻率并提高可靠性。 夹层结构优选包括AlNdN合金/ AlNd合金/ AlNdN合金的结构。 AlNdN合金用作缓冲层或扩散阻挡层，以防止AlNd合金和非晶硅层彼此扩散。 另一种AlNdN合金用作胶层并保护AlNd合金不被过蚀刻。 另一种AlNdN合金还可以防止AlNd合金和以下形成的ITO接触和相互作用。

    SPUTTERING PROCESS FOR DEPOSITING INDIUM TIN OXIDE AND METHOD FOR FORMING INDIUM TIN OXIDE LAYER
    8.
    发明申请
    SPUTTERING PROCESS FOR DEPOSITING INDIUM TIN OXIDE AND METHOD FOR FORMING INDIUM TIN OXIDE LAYER 审中-公开
    用于沉积氧化铅的溅射工艺和形成氧化钛填料层的方法

    公开(公告)号：US20060144695A1

    公开(公告)日：2006-07-06

    申请号：US10907189

    申请日：2005-03-24

    申请人： Yu-Chou Lee ,  Tsung-Chi Cheng ,  Hung-I Hsu

    发明人： Yu-Chou Lee ,  Tsung-Chi Cheng ,  Hung-I Hsu

    IPC分类号： C23C14/00

    CPC分类号： C23C14/086

    摘要： A sputtering process of indium tin oxide (ITO) is provided. The sputtering process includes the following steps. First, a substrate is moved into a reaction chamber, wherein an ITO target is disposed inside the reaction chamber. Then, a plasma gas and a reaction gas are provided into the reaction chamber to form an ITO layer on the substrate. The reaction gas comprises at least hydrogen having a volume ratio of 1%˜4% based on the total gas volume in the reaction chamber. Furthermore, a method of forming an indium tin oxide layer is also provided.

    摘要翻译： 提供氧化铟锡（ITO）的溅射工艺。 溅射工艺包括以下步骤。 首先，将基板移动到反应室中，其中ITO靶设置在反应室内。 然后，将等离子体气体和反应气体提供到反应室中，以在基板上形成ITO层。 反应气体至少包含基于反应室中的总气体体积的体积比为1％〜4％的氢。 此外，还提供了形成氧化铟锡层的方法。

    Manufacturing method and structure of copper lines for a liquid crystal panel
    9.
    发明申请
    Manufacturing method and structure of copper lines for a liquid crystal panel 审中-公开

    公开(公告)号：US20050164592A1

    公开(公告)日：2005-07-28

    申请号：US11085907

    申请日：2005-03-21

    申请人： Yu-Chou Lee

    发明人： Yu-Chou Lee

    IPC分类号： G02F1/1362 ,  H01L21/768 ,  H01J9/00 ,  H01J9/02 ,  H01J9/24

    CPC分类号： H01L21/76877 ,  G02F1/136286

    摘要： In those conventional arts, for large-size LCD, the process of copper damascene interconnect has some problems of forming a uneven copper seed layer and forming hollows during electrical plating due to the electrical plating area being too large to electroplate uniformly. In this invention, it employs a Cu tape to directly stick on a substrate to replace forming a copper seed layer and electroplating. Hence, the invention avoids the problem of unevenness and hollows in those conventional arts and so the Cu lines can be applied to the large-size LCD.

    Robotic arm for preventing electrostatic damage
    10.
    发明申请
    Robotic arm for preventing electrostatic damage 审中-公开
    机器臂防止静电损伤

    公开(公告)号：US20050001438A1

    公开(公告)日：2005-01-06

    申请号：US10772712

    申请日：2004-02-05

    申请人： Yu-Chou Lee ,  Ying-Ming Wu ,  Chien-Yu Chen

    发明人： Yu-Chou Lee ,  Ying-Ming Wu ,  Chien-Yu Chen

    IPC分类号： B25J11/00 ,  B65G49/06 ,  B65G49/07 ,  H01L21/677

    CPC分类号： H01L21/67742 ,  B65G49/061

    摘要： A robotic arm that has a main body and pads thereon can prevent electrostatic damage. These pads are used to carry substrates between and in processing machines. A material of these pads is the same as or similar to the material of the substrate to lower the amount of the electrostatic charges produced during the manufacturing process. Therefore, the electrostatic charges cannot damage the electronic devices on the substrate.

    摘要翻译： 具有主体和其上的垫的机器人手臂可以防止静电损伤。 这些垫用于在处理机器之间和处理机器中携带衬底。 这些焊盘的材料与衬底的材料相同或类似，以降低在制造过程中产生的静电电荷的量。 因此，静电电荷不会损坏基板上的电子器件。