公开(公告)号：US06387757B1

公开(公告)日：2002-05-14

申请号：US09761912

申请日：2001-01-17

申请人： Wen-Ting Chu ,  Di-Son Kuo ,  Jake Yeh ,  Chia-Da Hsieh ,  Chuan-Li Chang ,  Sheng-Wei Tsaur

发明人： Wen-Ting Chu ,  Di-Son Kuo ,  Jake Yeh ,  Chia-Da Hsieh ,  Chuan-Li Chang ,  Sheng-Wei Tsaur

IPC分类号： H01L218247

CPC分类号： H01L27/11521 ,  H01L27/115

摘要： Within a method for fabricating a split gate field effect transistor (FET) within a semiconductor integrated circuit microelectronic fabrication, there is employed a sacrificial self aligned spacer layer which defines a control gate electrode channel within the split gate field effect transistor (FET). The sacrificial self aligned spacer layer is employed as part of an ion implantation mask employed for forming a source/drain region adjoining the control gate electrode channel within the split gate field effect transistor (FET). The sacrificial self aligned spacer layer is stripped from over the control gate electrode channel prior to forming over the control gate electrode channel a control gate electrode within the split gate field effect transistor.

摘要翻译： 在用于在半导体集成电路微电子制造中制造分裂栅极场效应晶体管（FET）的方法中，采用限定分裂栅极场效应晶体管（FET）内的控制栅电极通道的牺牲自对准间隔层。 牺牲自对准间隔层被用作用于形成与分离栅场效应晶体管（FET）内的控制栅电极通道相邻的源/漏区的离子注入掩模的一部分。 在控制栅电极通道上形成分割栅场效应晶体管内的控制栅极电极之前，将牺牲自对准间隔层从控制栅电极通道上剥离。

公开(公告)号：US06468863B2

公开(公告)日：2002-10-22

申请号：US09761276

申请日：2001-01-16

申请人： Chia-Ta Hsieh ,  Di-Son Kuo ,  Jake Yeh ,  Chuan-Li Chang ,  Wen-Ting Chu ,  Sheng-Wei Tsaur

发明人： Chia-Ta Hsieh ,  Di-Son Kuo ,  Jake Yeh ,  Chuan-Li Chang ,  Wen-Ting Chu ,  Sheng-Wei Tsaur

IPC分类号： H01L21336

CPC分类号： H01L27/11521 ,  H01L27/115 ,  H01L29/42324 ,  H01L29/7885

摘要： Within both a method for fabricating a split gate field effect transistor and the split gate field effect transistor fabricated employing the method, there is employed a patterned silicon nitride barrier dielectric layer formed covering a first portion of a floating gate and a first portion of a semiconductor substrate adjacent the first portion of the floating gate. Within the first portion of the semiconductor substrate there is eventually formed a source/drain region, and more particularly a source region, when fabricating the split gate field effect transistor. The patterned silicon nitride barrier dielectric layer inhibits when fabricating the split gate field effect transistor ion implant damage of the floating gate and oxidative loss of a floating gate electrode edge.

摘要翻译： 在制造分裂栅极场效应晶体管的方法和使用该方法制造的分裂栅极场效应晶体管的两者中，采用形成为覆盖浮置栅极的第一部分和半导体的第一部分的图案化氮化硅阻挡介电层 衬底邻近浮动栅极的第一部分。 在半导体衬底的第一部分内，当制造分裂栅极场效应晶体管时，最终形成源极/漏极区域，尤其是源极区域。 图案化的氮化硅阻挡介电层在制造分离栅场效应晶体管离子注入损坏浮栅和浮栅电极边缘的氧化损失时禁止。

公开(公告)号：US06403494B1

公开(公告)日：2002-06-11

申请号：US09638300

申请日：2000-08-14

申请人： Wen-Ting Chu ,  Di-Son Kuo ,  Jack Yeh ,  Chia-Ta Hsieh ,  Chuan-Li Chang

发明人： Wen-Ting Chu ,  Di-Son Kuo ,  Jack Yeh ,  Chia-Ta Hsieh ,  Chuan-Li Chang

IPC分类号： H01L2100

CPC分类号： H01L27/11521 ,  H01L27/115

摘要： A method is disclosed for forming a split-gate flash memory cell where the floating gate of the cell is self-aligned to a shallow trench isolation (STI), which in turn makes it self-aligned to source and to word line. This will advantageously affect a shrinkage in the size of the memory cell. In a first embodiment, the close self-alignment is made possible through a new use of an anti-reflective coating (ARC) in the various process steps of the making of the cell. In the second embodiment, a low-viscosity material is used in such a manner so as to enable self-alignment of the floating gate to the STI in a simple way.

摘要翻译： 公开了一种用于形成分裂栅极闪存单元的方法，其中单元的浮置栅极自对准到浅沟槽隔离（STI），其又使得其自对准到源极和字线。 这将有利地影响存储器单元的尺寸的收缩。 在第一实施例中，通过在制造电池的各种工艺步骤中新的使用抗反射涂层（ARC）使得紧密的自对准成为可能。 在第二实施例中，以这样的方式使用低粘度材料，以便能够以简单的方式使浮动栅极与STI的自对准。

公开(公告)号：US06417046B1

公开(公告)日：2002-07-09

申请号：US09563834

申请日：2000-05-05

申请人： Ming-Chou Ho ,  Wen-Ting Chu ,  Chang Song Lin ,  Chuan-Li Chang ,  Hsin-Ming Chen ,  Di-Son Kuo

发明人： Ming-Chou Ho ,  Wen-Ting Chu ,  Chang Song Lin ,  Chuan-Li Chang ,  Hsin-Ming Chen ,  Di-Son Kuo

IPC分类号： H01L21336

CPC分类号： H01L21/28211 ,  H01L21/28247 ,  H01L21/28273 ,  H01L29/42324 ,  H01L29/511 ,  H01L29/6659

摘要： A modified nitride spacer and making of the same are disclosed. The modified nitride spacer is formed adjacent a high-temperature oxide (HTO) layer which in turn is formed adjacent the sidewalls of a gate electrode. It is shown that the placement of an intervening oxide layer between the sidewalls of the gate electrode and the nitride spacer, in that order only, provides a significant improvement in charge retention in floating gate memory cells. Also, forming of the spacer from pure, undoped oxide only yields the same favorable results.

公开(公告)号：US6117732A

公开(公告)日：2000-09-12

申请号：US193671

申请日：1998-11-17

申请人： Wen-Ting Chu ,  Chuan-Li Chang ,  Ming-Chou Ho ,  Chang-Song Lin ,  Di-Son Kuo

发明人： Wen-Ting Chu ,  Chuan-Li Chang ,  Ming-Chou Ho ,  Chang-Song Lin ,  Di-Son Kuo

IPC分类号： H01L21/336 ,  H01L21/8247

CPC分类号： H01L29/66825

摘要： A method for fabricating a single polysilicon, non-volatile memory device, has been developed. The method features the use of a metal structure, comprised to contact an underlying control gate region, located in the semiconductor structure, in addition to providing the upper electrode, for a capacitor structure. The capacitor structure, in addition to the metal structure used as the upper electrode, is also comprised of an underlying capacitor dielectric layer, and an underlying polysilicon floating gate structure, used as the lower electrode of the capacitor structure. The creation of the capacitor structure results in performance increases realized via the additional control gate coupling capacitance, obtained via the novel configuration described in this invention.

摘要翻译： 已经开发了用于制造单个多晶硅，非易失性存储器件的方法。 该方法的特征在于，除了为电容器结构提供上电极之外，金属结构的使用还包括接触位于半导体结构中的底层控制栅极区域。 除了用作上电极的金属结构之外，电容器结构还包括用作电容器结构的下电极的下层电容器介电层和下面的多晶硅浮栅结构。 电容器结构的产生导致通过经由本发明中描述的新颖结构获得的附加控制栅极耦合电容实现的性能提高。

公开(公告)号：US6110782A

公开(公告)日：2000-08-29

申请号：US195651

申请日：1998-11-19

申请人： Wen-Ting Chu ,  Chuan-Li Chang ,  Ming-Chon Ho ,  Chang-Song Lin ,  Di-Son Kwo

发明人： Wen-Ting Chu ,  Chuan-Li Chang ,  Ming-Chon Ho ,  Chang-Song Lin ,  Di-Son Kwo

IPC分类号： H01L21/8234 ,  H01L21/8247

CPC分类号： H01L27/11526 ,  H01L21/823462 ,  H01L27/11541

摘要： A method for integrating salicide and high voltage device processes in the fabrication of high and low voltage devices on a single wafer is described. Isolation areas are formed on a semiconductor substrate surrounding and electrically isolating a low voltage device area from a high voltage device area. A gate oxide layer is grown in the device areas. A polysilicon layer is deposited overlying the gate oxide layer and isolation areas. A first photomask is formed over a portion of the high voltage device area wherein the first photomask also completely covers the low voltage device area. The polysilicon layer is etched away where it is not covered by the photomask to form a high voltage device. Ions are implanted to form lightly doped source and drain regions within the semiconductor substrate adjacent to the high voltage device wherein the first photomask protects the polysilicon layer in the low voltage device area from the ions. The first photomask is removed. A second photomask is formed over a portion of the low voltage device area where a gate electrode is to be formed wherein the second photomask also completely covers the high voltage device area. The polysilicon layer not covered by the second photomask is etched away to form the gate electrode. The second photomask is removed. The low voltage and high voltage area devices are silicided and the fabrication of the integrated circuit device is completed.

摘要翻译： 描述了在单个晶片上制造高电压和低压器件中的自对准硅化物和高电压器件工艺的集成方法。 在半导体衬底上形成隔离区域，该半导体衬底围绕低电压器件区域和高电压器件区域电隔离。 在器件区域中生长栅极氧化物层。 沉积覆盖栅极氧化物层和隔离区的多晶硅层。 第一光掩模形成在高电压器件区域的一部分上，其中第一光掩模也完全覆盖低电压器件区域。 多晶硅层被蚀刻掉，其未被光掩模覆盖以形成高压器件。 植入离子以在与高压器件相邻的半导体衬底内形成轻掺杂的源极和漏极区，其中第一光掩模保护低电压器件区域中的多晶硅层与离子。 第一个光掩模被删除。 第二光掩模形成在要形成栅电极的低电压器件区域的一部分上，其中第二光掩模也完全覆盖高电压器件区域。 蚀刻掉未被第二光掩模覆盖的多晶硅层以形成栅电极。 第二个光掩模被删除。 低电压和高电压区域的器件被硅化，并且完成了集成电路器件的制造。

公开(公告)号：US20100257756A1

公开(公告)日：2010-10-14

申请号：US12007814

申请日：2008-01-15

申请人： Chuan-Li Chang

发明人： Chuan-Li Chang

IPC分类号： A43C15/00

CPC分类号： A43C15/162

摘要： A thin-type spike intensifying structure is formed by bending a predetermined plate with a punch finishing work. The thin-type spike includes an assembly part and a spike sheet, wherein the assembly part provides for fixing and assembling the spike at a bottom of a sports shoe, and the spike sheet is disposed at a side of the assembly part and manifests an arc-shape design through bending and protrusion. By the arc-shape structure design, a rigid structure of the spike is intensified, and the spike can be manufactured with a thin metal, such that the spike can be firm and tolerable, and a product can be lighter, in order to improve its practicability and advancement.

摘要翻译： 通过用冲压加工工件弯曲预定的板来形成薄型尖峰增强结构。 薄型钉包括组装部分和钉片，其中组装部分提供用于在运动鞋的底部固定和组装钉，并且钉片设置在组装部分的一侧并且呈弧形 - 通过弯曲和突出设计。 通过弧形结构设计，尖峰的刚性结构增强，并且可以用薄金属制造尖峰，使得尖峰可以坚固和可容忍，并且产品可以更轻，以便改善其 实用性和进步。

公开(公告)号：US07370441B2

公开(公告)日：2008-05-13

申请号：US11325538

申请日：2006-01-05

申请人： Chuan-Li Chang

发明人： Chuan-Li Chang

IPC分类号： A43C15/00

CPC分类号： F16B37/14 ,  A43C15/161 ,  A43D100/14 ,  F16B35/06

摘要： A hobnail structure is composed of a connection rod and a cap installed on the connection rod, wherein the connection rod is a bolt, one end of which is provided with a ring of larger diameter with slant grooves having a same direction of deflection as that of threads of the aforementioned bolt located at rims of the ring. The cap is a cover, the bottom surface of which is provided with a slot hole, the diameter of which is smaller than that of the ring of the connection rod, and the slot hole is latched to the ring of the connection rod, so as to form a hobnail structure. Accordingly, the connection rod will not escape from the cap, resulting from an excessive exertion of a rotation force upon tightening, when the hobnail is screwed to a hole seat on a sole.

摘要翻译： 螺栓结构由安装在连接杆上的连接杆和盖组成，其中连接杆是螺栓，其一端设有较大直径的环，倾斜的槽具有相同的偏转方向 上述螺栓的螺纹位于环的边缘。 盖是盖，其底面设有槽孔，其直径小于连接杆的环的直径，并且槽孔被锁定到连接杆的环上，因此 形成一个巨型结构。 因此，当将锤头拧到鞋底上的孔座时，由于紧固时过度的旋转力而导致连接杆不会从帽中逸出。

公开(公告)号：US20070172331A1

公开(公告)日：2007-07-26

申请号：US11325538

申请日：2006-01-05

申请人： Chuan-Li Chang

发明人： Chuan-Li Chang

IPC分类号： F16B39/04

CPC分类号： F16B37/14 ,  A43C15/161 ,  A43D100/14 ,  F16B35/06

摘要： A hobnail structure is composed of a connection rod and a cap installed on the connection rod, wherein the connection rod is a bolt, one end of which is provided with a ring of larger diameter with slant grooves having a same direction of deflection as that of threads of the aforementioned bolt located at rims of the ring. The cap is a cover, the bottom surface of which is provided with a slot hole, the diameter of which is smaller than that of the ring of the connection rod, and the slot hole is latched to the ring of the connection rod, so as to form a hobnail structure. Accordingly, the connection rod will not escape from the cap, resulting from an excessive exertion of a rotation force upon tightening, when the hobnail is screwed to a hole seat on a sole.

摘要翻译： 螺栓结构由安装在连接杆上的连接杆和盖组成，其中连接杆是螺栓，其一端设有较大直径的环，倾斜的槽具有相同的偏转方向 上述螺栓的螺纹位于环的边缘。 盖是盖，其底面设有槽孔，其直径小于连接杆的环的直径，并且槽孔被锁定到连接杆的环上，因此 形成一个巨型结构。 因此，当将锤头拧到鞋底上的孔座时，由于紧固时过度的旋转力而导致连接杆不会从帽中逸出。