利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

24 条记录 (耗时 0.017 秒)

    VIA CONFIGURABLE ARCHITECTURE FOR CUSTOMIZATION OF ANALOG CIRCUITRY IN A SEMICONDUCTOR DEVICE
    4.
    发明申请
    VIA CONFIGURABLE ARCHITECTURE FOR CUSTOMIZATION OF ANALOG CIRCUITRY IN A SEMICONDUCTOR DEVICE 有权
    通过半导体器件中模拟电路自定义的可配置架构

    公开(公告)号：US20050224982A1

    公开(公告)日：2005-10-13

    申请号：US10907456

    申请日：2005-04-01

    申请人： James Kemerling ,  David Ihme ,  William Cox

    发明人： James Kemerling ,  David Ihme ,  William Cox

    IPC分类号： H01L27/118 ,  H03K19/177 ,  H01L23/52 ,  H01L21/4763

    CPC分类号： H03K19/17736 ,  H01L27/11807 ,  H01L2924/0002 ,  H03K19/17748 ,  H03K19/17796 ,  H01L2924/00

    摘要： A semiconductor device having a plurality of layers and a plurality of circuit elements arranged in tiles. At least one of the plurality of layers in the semiconductor device may be a via layer configured to determine the connections of the plurality of circuit elements. The semiconductor device may include an interconnection quilt having a plurality of metal layers disposed to interconnect the plurality of circuit elements. The plurality of circuit elements may be analog circuit element and/or digital circuit elements. The tiles may be analog tiles and digital tiles that form a mixed signal structured array.

    摘要翻译： 具有多个层的半导体器件和布置在瓦片中的多个电路元件。 半导体器件中的多个层中的至少一个可以是被配置为确定多个电路元件的连接的通孔层。 半导体器件可以包括具有设置成互连多个电路元件的多个金属层的互连被子。 多个电路元件可以是模拟电路元件和/或数字电路元件。 瓦片可以是形成混合信号结构阵列的模拟瓦片和数字瓦片。

    Configurable Integrated Circuit Capacitor Array Using Via Mask Layers
    7.
    发明申请
    Configurable Integrated Circuit Capacitor Array Using Via Mask Layers 有权
    可配置的集成电路电容阵列使用通过掩模层

    公开(公告)号：US20080108201A1

    公开(公告)日：2008-05-08

    申请号：US11965069

    申请日：2007-12-27

    申请人： David Ihme ,  James Kemerling ,  William Cox

    发明人： David Ihme ,  James Kemerling ,  William Cox

    IPC分类号： H01L21/20

    CPC分类号： H01G4/385 ,  H01L27/0805 ,  H01L2924/14 ,  H01L2924/00

    摘要： A semiconductor device having a plurality of layers and a capacitor array that includes a plurality of individual capacitors. At least one of the plurality of layers in the semiconductor device may be a via layer configured to determine the connections and capacitances of the plurality of individual capacitors in the capacitor array. The semiconductor device may include a metal structure disposed within the device to provide an electromagnetic shield for at least one of the plurality of individual capacitors in the capacitor array.

    摘要翻译： 具有多个层的半导体器件和包括多个单独的电容器的电容器阵列。 半导体器件中的多个层中的至少一个可以是被配置为确定电容器阵列中的多个单独电容器的连接和电容的通孔层。 半导体器件可以包括设置在器件内的金属结构，以为电容器阵列中的多个独立电容器中的至少一个提供电磁屏蔽。

    Caliper piston retractor tool
    9.
    发明申请
    Caliper piston retractor tool 审中-公开
    卡钳活塞牵引器工具

    公开(公告)号：US20050015979A1

    公开(公告)日：2005-01-27

    申请号：US10623301

    申请日：2003-07-18

    申请人： David Walters ,  William Cox

    发明人： David Walters ,  William Cox

    IPC分类号： B25B27/00 ,  B23P6/00

    CPC分类号： F16D65/0043 ,  B25B27/0035 ,  Y10T29/49233 ,  Y10T29/53909

    摘要： An apparatus and a method is provided for pushing back caliper pistons, such as for example, single, double or quadruple caliper pistons. The apparatus may be comprised of a first rod, a second rod, and a third rod. The first rod may be connected to the second and third rods so that when the first rod moves the second and third rods also move. The apparatus may also include a first plate, wherein the first rod, the second rod, and the third rod are connected to the first plate. The apparatus may further include a second or press plate which is connected to the second rod and the third rod. The apparatus may further include a third or tube plate and a fourth or wedge plate. The second and third rods may slide through first and second openings of the third and fourth plates.

    摘要翻译： 提供了用于推回卡钳活塞的装置和方法，例如单个，双重或四重卡钳活塞。 该装置可以包括第一杆，第二杆和第三杆。 第一杆可以连接到第二杆和第三杆，使得当第一杆移动时第二杆和第三杆也移动。 该装置还可以包括第一板，其中第一杆，第二杆和第三杆连接到第一板。 该装置还可以包括连接到第二杆和第三杆的第二或压板。 该装置还可以包括第三或管板和第四或楔形板。 第二和第三杆可以滑过第三和第四板的第一和第二开口。