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公开(公告)号：US06167236A
公开(公告)日：2000-12-26
申请号：US791208
申请日：1997-01-31
申请人： Ulrich Kaiser , Wolfgang Steinhagen
发明人： Ulrich Kaiser , Wolfgang Steinhagen
CPC分类号： G06K19/0701 , G06K19/0723
摘要： An improved damping modulation circuit (140) for a transponder (14) receives energy transmitted from a transmitter/receiver antenna (16) to produce a unique recognition signal in the transponder. The improved damping modulation circuit (140) includes a high fieldstrength circuit (152, 160, 174) that protects full-duplex transponder (14) from over-voltage through the use of voltage limiters (132), while still providing power to transponder (14). Low fieldstrength circuit (152) activates only minimal circuitry to provide the highest possible amount of power to full-duplex transponder (14). Medium fieldstrength circuit (152, 160) increases the fieldstrength in full-duplex transponder (14) for establishing a sufficient amount of current flow for proper modulation using only a medium amount of transponder (14) circuit elements.
摘要翻译： 用于应答器（14）的改进的阻尼调制电路（140）接收从发射机/接收机天线（16）发送的能量，以在应答器中产生唯一的识别信号。 改进的阻尼调制电路（140）包括通过使用电压限制器（132）保护全双工应答器（14）免于过电压的高场强电路（152,160,174），同时仍然向发射机应答器 14）。 低场强电路（152）仅激活最小电路以向全双工应答器（14）提供最高可能的功率。 中等强度电路（152,160）增加了全双工应答器（14）中的场强，用于仅使用中等数量的应答器（14）电路元件建立足够量的电流来进行适当的调制。
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2.发明授权
公开(公告)号：US5126745A
公开(公告)日：1992-06-30
申请号：US515374
申请日：1990-04-27
申请人： Wolfgang Steinhagen , Ulrich Kaiser
发明人： Wolfgang Steinhagen , Ulrich Kaiser
IPC分类号： H03B11/04
CPC分类号： H03B11/04
摘要： A circuit arrangement is described with the aid of which a control signal can be generated in dependence upon the occurrence of an extreme value of a sinusoidal oscillation. The circuit arrangement (10) includes a storage member (22) which is adapted to be charged via a diode (20) to one of the extreme values of the sinusoidal oscillation. A discharge path (26) for the storage member (22) is present, the time constant of which is so dimensioned that within the period duration of the sinusoidal oscillation an appreciable discharge of the storage member (22) takes place. A switch element (24) controllable by the charge voltage of the storage member (22) furnishes the control signal at its output (14) for the period of time during which the charge voltage at the storage member (22) is smaller than the extreme value of the sinusoidal oscillation. The circuit arrangement can be used in maintaining the oscillations of a resonance circuit stimulated to oscillate by means of a momentary HF carrier wave pulse.
摘要翻译： 描述电路布置，借助于此可以根据正弦波振荡的极值的出现产生控制信号。 电路装置（10）包括一个适于通过二极管（20）充电到正弦振荡的极值之一的存储构件（22）。 存在用于存储构件（22）的放电路径（26），其时间常数设定为在正弦振荡的持续时间内存在存储构件（22）的明显放电。 可由存储构件（22）的充电电压控制的开关元件（24）在其输出端（14）处提供控制信号在存储构件（22）处的充电电压小于极限的时间段 正弦振荡的值。 该电路装置可用于通过瞬时HF载波脉冲来维持被激励振荡的谐振电路的振荡。
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公开(公告)号：US06255901B1
公开(公告)日：2001-07-03
申请号：US09464091
申请日：1999-12-15
申请人： Wolfgang Steinhagen , Franz Prexl
发明人： Wolfgang Steinhagen , Franz Prexl
IPC分类号： H03D110
CPC分类号： H04L27/06
摘要： A demodulator circuit for demodulating a signal ASK-modulated with modulation pulses equal in duration, and having a small depth of modulation and large dynamic range comprises an amplitude limiter (10) through which an amplitude-dependent current flows when the amplitude of the signal to be demodulated exceeds its limiting threshold value. Furthermore comprised is an envelope detector (12) to the input of which the signal to be demodulated is applied, as well as a differentiating network (14) configured so that it differentiates the output signal of the envelope detector (12) and outputs a signal pulse only when the change in amplitude of this output signal is in one direction. A bandpass filter (18) in the demodulator circuit passes, from a signal derived from an amplitude-dependent current from the amplitude limiter (10), the frequency component attributed to the duration of the modulation pulses. A comparator (20) compares the output signal of the bandpass filter (18) to a fixed threshold value and outputs a signal pulse when this output signal exceeds the threshold value. A logic circuit (15) outputs the signal pulse existing in each case as the demodulated signal.
摘要翻译： 用于解调具有等于持续时间并具有较小调制深度和较大动态范围的调制脉冲ASK调制的信号的解调器电路包括幅度限制器（10），当幅度相关电流在信号幅度 被解调超过其限制阈值。 此外，还包括一个包络检测器（12），该信号检测器（12）被施加到要被解调的信号的输入端上，以及一个微分网络（14），其被配置成使得包络检测器（12）的输出信号微分并输出信号 只有当该输出信号的振幅变化在一个方向时才产生脉冲。 解调器电路中的带通滤波器（18）从来自幅度限制器（10）的与幅度相关的电流得到的信号中，使得归因于调制脉冲的持续时间的频率分量。 比较器（20）将带通滤波器（18）的输出信号与固定的阈值进行比较，并在该输出信号超过阈值时输出信号脉冲。 逻辑电路（15）将存在于每种情况下的信号脉冲作为解调信号输出。
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4.发明授权公开(公告)号：US06359496B1
公开(公告)日：2002-03-19
申请号：US09711774
申请日：2000-11-13
申请人： Wolfgang Steinhagen
发明人： Wolfgang Steinhagen
IPC分类号： H03K1716
CPC分类号： H03K17/063 , H03K17/145 , H03K17/6872
摘要： An analog switch includes two complementary MOS field-effect transitors (10, 12) whose source-drain circuits are located in parallel between the input terminal (18) and the output terminal (20) of the switch. A control signal for controlling the switch is applied to the gate of the MOS field-effect transistor (12) of the one channel type directly and to the gate of the MOS field-effect transistor (10) of the other channel type via a negator (16). Between the input terminal (18) and output terminal (20) of the switch the series source-drain circuits of three MOS field-effect transistors (22, 24, 26) are inserted, whereby the MOS field-effect transistor (24) located in the middle of the series circuit has a channel type opposite that of the other two MOS field-effect transistors (22, 26). The gates of all MOS field-effect transistors of the other channel type are each interconnected. The threshold voltages of the three MOS field-effect transistors (22, 24, 26) of the series circuit are lower than the threshold voltages of the two complementary MOS field-effect transitors (10, 12) whose source-drain circuits are connected in parallel.
摘要翻译： 模拟开关包括其源极 - 漏极电路并联在开关的输入端子（18）和输出端子（20）之间的两个互补MOS场效应晶体管（10,12）。 用于控制开关的控制信号直接通过一个通道类型的MOS场效应晶体管（12）的栅极和另一个通道类型的MOS场效应晶体管（10）的栅极经由一个反相器 （16）。 在开关的输入端子（18）和输出端子（20）之间插入三个MOS场效应晶体管（22,24,26）的串联源极 - 漏极电路，由此MOS场效应晶体管（24）位于 在串联电路的中间具有与其他两个MOS场效应晶体管（22,26）相反的沟道类型。 其他通道类型的所有MOS场效应晶体管的栅极都互相互连。 串联电路的三个MOS场效应晶体管（22,24,26）的阈值电压低于源极 - 漏极电路连接的两个互补MOS场效应晶体管（10,12）的阈值电压 平行。
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5.发明授权Circuit arrangement for converting an analog AC voltage signal to a digital signal 失效用于将模拟AC电压信号转换为数字信号的电路装置
公开(公告)号：US4524346A
公开(公告)日：1985-06-18
申请号：US394980
申请日：1982-07-02
摘要： Analog AC to digital signal converter includes a sampling circuit which cyclically samples the analog AC signal to form analog sampling values, and an analog-digital converter for converting the analog sampling values to digital sampling values. A sign integrator integrates the sign of the digital sampling values, and a compensating voltage generator generates a compensating voltage in dependence upon the integration result. A combination circuit combines the compensating voltage with the analog sampling value from the sampling means and applies the combination result to the analog-digital converter. The circuit compensates any DC voltage component contained in the analog AC signal and avoids interferences resulting from such DC voltage component.
摘要翻译： 模拟AC到数字信号转换器包括对模拟AC信号进行循环采样以形成模拟采样值的采样电路，以及用于将模拟采样值转换为数字采样值的模数转换器。 符号积分器集成数字采样值的符号，补偿电压发生器根据积分结果产生补偿电压。 组合电路将补偿电压与采样装置的模拟采样值相结合，并将组合结果应用于模数转换器。 该电路补偿模拟AC信号中包含的任何直流电压分量，并避免由这种直流电压分量产生的干扰。
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公开(公告)号：US20050046462A1
公开(公告)日：2005-03-03
申请号：US10901834
申请日：2004-07-27
申请人： Wolfgang Steinhagen
发明人： Wolfgang Steinhagen
CPC分类号： H03K17/063 , H03K2217/0018
摘要： A CMOS analog switch is provided that can handle negative input polarity. The semiconductor substrate wherein the analog switch is formed has a substrate area of n-conductivity type. First and second p-channel transistors are formed in the n-conductivity substrate area and each have a gate, a source connected to the input terminal and a drain connected to the output terminal. The analog switch further has a comparator for comparing a voltage level at the input terminal with ground level, a switch driven by an output of the comparator to selectively connect the n-conductivity area with the signal input terminal for a positive input voltage level or to ground for a negative input voltage level, and control circuitry providing gate control signals for the first and second p-channel transistors. The inherent substrate diodes are effectively kept from becoming conductive.
摘要翻译： 提供可以处理负输入极性的CMOS模拟开关。 其中形成模拟开关的半导体衬底具有n导电类型的衬底区域。 第一和第二p沟道晶体管形成在n导电性基板区域中，并且各自具有栅极，连接到输入端子的源极和连接到输出端子的漏极。 模拟开关还具有用于将输入端子处的电压电平与地电平进行比较的比较器，由比较器的输出驱动的开关，以选择性地将n导电区域与信号输入端子连接以获得正输入电压电平，或者将 用于负输入电压电平的接地，以及为第一和第二p沟道晶体管提供栅极控制信号的控制电路。 固有的衬底二极管有效地防止变得导电。
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公开(公告)号：US06861901B2
公开(公告)日：2005-03-01
申请号：US10459860
申请日：2003-06-12
CPC分类号： H03F3/45475 , H03F3/505 , H03F2200/513 , H03F2203/45138
摘要： A voltage follower comprising a first field-effect transistor (MN1) whose gate forms the input of the voltage follower. Further provided is a second field-effect transistor (MN2) whose drain connected to the gate forms the output of the voltage follower. The sources of the two field-effect transistors (MN1, MN2) are connected to each other and to the drain of a third field-effect transistor (MN3) serving as current source and to the gate of which a predefined bias voltage is applied. The invention employs in addition a fourth field-effect transistor (MN4) whose source-drain path is circuited between the output of the voltage follower and the drain of the third field-effect transistor (MN3) and whose gate is connected to the gate of the third field-effect transistor (MN3). As compared to prior art voltage followers the voltage follower in accordance with the invention comprises a wider voltage range in which it can be put to use. This can be made use of e.g. in amplitude shift-keyed (ASK) demodulators incorporating the voltage follower in accordance with the invention and which need to be operated with particularly small supply voltages.
摘要翻译： 一种电压跟随器，包括其栅极形成电压跟随器的输入的第一场效应晶体管（MN1）。 还提供了第二场效应晶体管（MN2），其漏极连接到栅极形成电压跟随器的输出。 两个场效应晶体管（MN1，MN2）的源极彼此连接并且连接到用作电流源的第三场效应晶体管（MN3）的漏极和施加了预定偏压的栅极。 本发明另外还应用了第四场效应晶体管（MN4），其源极 - 漏极路径在电压跟随器的输出端和第三场效应晶体管（MN3）的漏极之间被耦合，并且其栅极连接到 第三场效应晶体管（MN3）。 与现有技术的电压跟随器相比，根据本发明的电压跟随器包括可以投入使用的更宽的电压范围。 这可以被使用。 包括根据本发明的电压跟随器的幅度偏移键控（ASK）解调器，并且需要以特别小的电源电压来操作。
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公开(公告)号：US20080258795A1
公开(公告)日：2008-10-23
申请号：US12106058
申请日：2008-04-18
申请人： Franz Prexl , Hans Moormann , Wolfgang Steinhagen
发明人： Franz Prexl , Hans Moormann , Wolfgang Steinhagen
IPC分类号： H03K3/014
CPC分类号： H03B5/06 , H03K5/08 , H03K5/1515 , H03K5/2481 , H03K19/0013
摘要： A CMOS low frequency oscillator circuit comprising an amplifier (10) and an interface for connecting a first and a second terminal of an external crystal oscillator (14) in a feedback path of the amplifier (10). In one aspect, the oscillator circuit further comprises a regulated current source (24) supplying a regulated current to the amplifier (10) controlled by the voltage swing across the external crystal oscillator (14); and a constant current source (32) supplying a minimum constant current to the amplifier (10) independent of the voltage swing across the external crystal oscillator (14). In another aspect, the oscillator circuit further comprises an output stage (34) for converting an analog oscillator signal provided at the first and second terminals of the external crystal oscillator into a digital clock signal; wherein the output stage has a differential input (36) and a single-ended output (38) and includes a comparator (40) coupled with its differential input to the two terminals of the external crystal (14), the comparator (40) having a single-ended output; two parallel branches (42, 44) of series-connected inverters (42a, 42b, 42c, 44a, 44b, 44c), each branch having an input connected to the output of the comparator (40); a dynamic inverter (46) with complementary inputs each connected to a different output of the two parallel circuit branches (42, 44); and a plurality of series-connected output inverters (48, 50, 52).
摘要翻译： 一种CMOS低频振荡器电路，包括放大器（10）和用于在放大器（10）的反馈路径中连接外部晶体振荡器（14）的第一和第二端子的接口。 在一个方面，所述振荡器电路还包括调节电流源（24），所述调节电流源（24）通过所述外部晶体振荡器（14）上的电压摆幅来控制所述放大器（10）的调节电流; 以及恒定电流源（32），其独立于外部晶体振荡器（14）上的电压摆幅，向放大器（10）提供最小的恒定电流。 在另一方面，振荡器电路还包括用于将设置在外部晶体振荡器的第一和第二端子处的模拟振荡器信号转换为数字时钟信号的输出级（34） 其中所述输出级具有差分输入（36）和单端输出（38），并且包括与其差分输入耦合到所述外部晶体（14）的两个端子的比较器（40），所述比较器（40）具有 单端输出; 串联逆变器（42,4a，42b，42c，44a，44b，44c）的两个并联支路（42,44），每个分支具有连接到比较器（40）的输出的输入端。 具有互补输入的动态逆变器（46），其各自连接到所述两个并联电路分支（42,44）的不同输出端; 和多个串联连接的输出反相器（48,50,52）。
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公开(公告)号：US07129766B2
公开(公告)日：2006-10-31
申请号：US10901834
申请日：2004-07-27
申请人： Wolfgang Steinhagen
发明人： Wolfgang Steinhagen
IPC分类号： H03K17/687
CPC分类号： H03K17/063 , H03K2217/0018
摘要： A CMOS analog switch is provided that can handle negative input polarity. The semiconductor substrate wherein the analog switch is formed has a substrate area of n-conductivity type. First and second p-channel transistors are formed in the n-conductivity substrate area and each have a gate, a source connected to the input terminal and a drain connected to the output terminal. The analog switch further has a comparator for comparing a voltage level at the input terminal with ground level, a switch driven by an output of the comparator to selectively connect the n-conductivity area with the signal input terminal for a positive input voltage level or to ground for a negative input voltage level, and control circuitry providing gate control signals for the first and second p-channel transistors. The inherent substrate diodes are effectively kept from becoming conductive.
摘要翻译： 提供可以处理负输入极性的CMOS模拟开关。 其中形成模拟开关的半导体衬底具有n导电类型的衬底区域。 第一和第二p沟道晶体管形成在n导电性基板区域中，并且各自具有栅极，连接到输入端子的源极和连接到输出端子的漏极。 模拟开关还具有用于将输入端子处的电压电平与接地电平进行比较的比较器，由比较器的输出驱动的开关，以选择性地将n导电区域与信号输入端子连接用于正输入电压电平，或者将 用于负输入电压电平的接地，以及为第一和第二p沟道晶体管提供栅极控制信号的控制电路。 固有的衬底二极管有效地防止变得导电。
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公开(公告)号：US06982627B2
公开(公告)日：2006-01-03
申请号：US10460824
申请日：2003-06-13
CPC分类号： H03G3/3036 , G06K19/0701 , G06K19/0723
摘要： A transponder (1) comprising an antenna (4), a demodulator (5) and a signal processing circuit (6) which converts a modulated signal received via the antenna (4) into a signal suitable for processing in the demodulator (5). The signal processing circuit (6) comprises an amplifier (7) with a predefined amplification factor and a closed loop control circuit (8) serving to maintain the voltage swing of the processed signal applied at the input of the demodulator (5) substantially constant. In a preferred embodiment the closed loop control circuit comprises a capacitor which is continually discharged and differingly charged as a function of the strength of the output signal of the amplifier of the signal processing circuit, the voltage resulting across the capacitor controlling a controllable resistor connected in parallel to the input of the signal processing circuit and forming with a coupling capacitor a voltage divider.
摘要翻译： 一种应答器（1），包括天线（4），解调器（5）和信号处理电路（6），其将经由天线（4）接收的调制信号转换成适于在解调器（5）中处理的信号。 信号处理电路（6）包括具有预定放大系数的放大器（7）和用于保持在解调器（5）的输入处施加的处理信号的电压摆幅基本恒定的闭环控制电路（8）。 在优选实施例中，闭环控制电路包括电容器，该电容器作为信号处理电路的放大器的输出信号的强度的函数而不断地放电和差分充电，电容器的两端电压控制可控电阻器 平行于信号处理电路的输入并与耦合电容器形成分压器。
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