公开(公告)号：US09293394B2

公开(公告)日：2016-03-22

申请号：US14260205

申请日：2014-04-23

Applicant: XINTEC INC.

Inventor： Bai-Yao Lou ,  Tsang-Yu Liu ,  Chia-Sheng Lin ,  Tzu-Hsiang Hung

IPC: H01L23/00 ,  H01L23/48 ,  H01L23/498 ,  H01L23/04 ,  H01L23/31 ,  H01L21/768

CPC classification number: H01L23/481 ,  H01L21/76898 ,  H01L23/04 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/02371 ,  H01L2224/02372 ,  H01L2224/0392 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05025 ,  H01L2224/05548 ,  H01L2224/05572 ,  H01L2224/056 ,  H01L2224/05687 ,  H01L2224/0569 ,  H01L2224/06181 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/32225 ,  H01L2224/73153 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/00012 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00 ,  H01L2224/05552

Abstract: An embodiment of the invention provides a chip package which includes a substrate having a first surface and a second surface; a conducting pad structure located on the first surface; a dielectric layer located on the first surface of the substrate and the conducting pad structure, wherein the dielectric layer has an opening exposing a portion of the conducting pad structure; and a cap layer located on the dielectric layer and filled into the opening.

Abstract translation: 本发明的实施例提供一种芯片封装，其包括具有第一表面和第二表面的基板; 位于所述第一表面上的导电垫结构; 位于所述基板的所述第一表面上的电介质层和所述导电焊盘结构，其中所述电介质层具有暴露所述导电焊盘结构的一部分的开口; 以及位于电介质层上并填充到开口中的盖层。