Abstract:
The invention is directed to a fabrication method of copper interconnects using dual damascene processing. Using silicon to provide an active surface, palladium can be selectively deposited on silicon by immersion plating technique. After palladium deposition (about 1000 A thick), either a layer of cobalt phosphorus or alloy cobalt/nickel phosphorus or nickel phosphorus is deposited on palladium layer using electroless plating technique. This cobalt/phosphorus, cobalt nickel phosphorus alloy, or nickel phosphorus layer serves as a copper diffusion barrier. Via and trench are filled up by copper from electroless copper plating method and CMP is used to remove excess copper and planarize/polish the copper/dielectric surface.
Abstract:
A process for fabricating a vertical spiral inductor within a multichip module package is disclosed. The process consists of depositing a pattern of bottom lines by electroplating copper on a substrate and then depositing an insulation pattern. Next, depositing a pattern of permeable material to form a core and then depositing polyimide to define vias and permeable core insulation. The vias are filled by electroplating cooper. The vertical spiral inductor is formed defined by next depositing a pattern of top metal (e.g. Copper) lines by electroplating wherein the top metal lines are staggered with respect to the bottom metal lines. Lastly a top protective layer is deposited. The core made be made from a preamble or non-premable material.
Abstract:
An acoustic ink printing print head utilizing metal alloy 42 is disclosed. Additionally, a process for incorporating the metal alloy 42 (alloy with approximately 42% nickel and 58% iron) to build the liquid level control/aperture plate defining an AIP print head is disclosed. The process consists of fabricating a channel plate and an aperture plate from the metal alloy 42 and bonding the two structures together thereby defining the liquid level control/aperture plate.
Abstract:
A method of fabrication of copper interconnect by means of copper electroplating is disclosed. In the conventional method of fabricating copper interconnect for integrated circuits, critical steps such as deposition of copper seed layer and chemical mechanical polishing (CMP) are required. However in this invention, both the seed layer deposition and CMP are not required.
Abstract:
Low acoustic solid wave attenuation structures are formed with an electroformed nickel mold, and are incorporated within acoustic ink emitters, between the focusing lens and surface of an ink layer. The structures have characteristics of low attenuation of acoustic waves to increase the efficiency of acoustic wave transmission within the acoustic ink emitter. Using the described structures, acoustic ink printers can accurately emit materials having high viscosity, including hot melt inks.